Misha Brukman | bc9ccf6 | 2005-02-04 20:25:52 +0000 | [diff] [blame] | 1 | //===- AlphaInstrInfo.h - Alpha Instruction Information ---------*- C++ -*-===// |
Misha Brukman | 4633f1c | 2005-04-21 23:13:11 +0000 | [diff] [blame] | 2 | // |
Andrew Lenharth | 304d0f3 | 2005-01-22 23:41:55 +0000 | [diff] [blame] | 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
Chris Lattner | 4ee451d | 2007-12-29 20:36:04 +0000 | [diff] [blame] | 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
Misha Brukman | 4633f1c | 2005-04-21 23:13:11 +0000 | [diff] [blame] | 7 | // |
Andrew Lenharth | 304d0f3 | 2005-01-22 23:41:55 +0000 | [diff] [blame] | 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file contains the Alpha implementation of the TargetInstrInfo class. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #ifndef ALPHAINSTRUCTIONINFO_H |
| 15 | #define ALPHAINSTRUCTIONINFO_H |
| 16 | |
| 17 | #include "llvm/Target/TargetInstrInfo.h" |
| 18 | #include "AlphaRegisterInfo.h" |
| 19 | |
| 20 | namespace llvm { |
| 21 | |
Chris Lattner | 6410552 | 2008-01-01 01:03:04 +0000 | [diff] [blame] | 22 | class AlphaInstrInfo : public TargetInstrInfoImpl { |
Andrew Lenharth | 304d0f3 | 2005-01-22 23:41:55 +0000 | [diff] [blame] | 23 | const AlphaRegisterInfo RI; |
| 24 | public: |
| 25 | AlphaInstrInfo(); |
| 26 | |
| 27 | /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As |
| 28 | /// such, whenever a client has an instance of instruction info, it should |
| 29 | /// always be able to get register info as well (through this method). |
| 30 | /// |
Dan Gohman | c9f5f3f | 2008-05-14 01:58:56 +0000 | [diff] [blame] | 31 | virtual const AlphaRegisterInfo &getRegisterInfo() const { return RI; } |
Andrew Lenharth | 304d0f3 | 2005-01-22 23:41:55 +0000 | [diff] [blame] | 32 | |
Evan Cheng | 04ee5a1 | 2009-01-20 19:12:24 +0000 | [diff] [blame] | 33 | /// Return true if the instruction is a register to register move and return |
| 34 | /// the source and dest operands and their sub-register indices by reference. |
Andrew Lenharth | 304d0f3 | 2005-01-22 23:41:55 +0000 | [diff] [blame] | 35 | virtual bool isMoveInstr(const MachineInstr &MI, |
Evan Cheng | 04ee5a1 | 2009-01-20 19:12:24 +0000 | [diff] [blame] | 36 | unsigned &SrcReg, unsigned &DstReg, |
| 37 | unsigned &SrcSubIdx, unsigned &DstSubIdx) const; |
Chris Lattner | 4083960 | 2006-02-02 20:12:32 +0000 | [diff] [blame] | 38 | |
Dan Gohman | cbad42c | 2008-11-18 19:49:32 +0000 | [diff] [blame] | 39 | virtual unsigned isLoadFromStackSlot(const MachineInstr *MI, |
| 40 | int &FrameIndex) const; |
| 41 | virtual unsigned isStoreToStackSlot(const MachineInstr *MI, |
| 42 | int &FrameIndex) const; |
Chris Lattner | 0476b28 | 2006-10-24 16:41:36 +0000 | [diff] [blame] | 43 | |
Evan Cheng | b5cdaa2 | 2007-05-18 00:05:48 +0000 | [diff] [blame] | 44 | virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, |
Stuart Hastings | 3bf9125 | 2010-06-17 22:43:56 +0000 | [diff] [blame] | 45 | MachineBasicBlock *FBB, |
| 46 | const SmallVectorImpl<MachineOperand> &Cond, |
| 47 | DebugLoc DL) const; |
Jakob Stoklund Olesen | 99666a3 | 2010-07-11 01:08:23 +0000 | [diff] [blame^] | 48 | virtual void copyPhysReg(MachineBasicBlock &MBB, |
| 49 | MachineBasicBlock::iterator MI, DebugLoc DL, |
| 50 | unsigned DestReg, unsigned SrcReg, |
| 51 | bool KillSrc) const; |
Owen Anderson | f6372aa | 2008-01-01 21:11:32 +0000 | [diff] [blame] | 52 | virtual void storeRegToStackSlot(MachineBasicBlock &MBB, |
| 53 | MachineBasicBlock::iterator MBBI, |
| 54 | unsigned SrcReg, bool isKill, int FrameIndex, |
Evan Cheng | 746ad69 | 2010-05-06 19:06:44 +0000 | [diff] [blame] | 55 | const TargetRegisterClass *RC, |
| 56 | const TargetRegisterInfo *TRI) const; |
Owen Anderson | f6372aa | 2008-01-01 21:11:32 +0000 | [diff] [blame] | 57 | |
Owen Anderson | f6372aa | 2008-01-01 21:11:32 +0000 | [diff] [blame] | 58 | virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, |
| 59 | MachineBasicBlock::iterator MBBI, |
| 60 | unsigned DestReg, int FrameIndex, |
Evan Cheng | 746ad69 | 2010-05-06 19:06:44 +0000 | [diff] [blame] | 61 | const TargetRegisterClass *RC, |
| 62 | const TargetRegisterInfo *TRI) const; |
Owen Anderson | 43dbe05 | 2008-01-07 01:35:02 +0000 | [diff] [blame] | 63 | |
Dan Gohman | c54baa2 | 2008-12-03 18:43:12 +0000 | [diff] [blame] | 64 | virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF, |
| 65 | MachineInstr* MI, |
| 66 | const SmallVectorImpl<unsigned> &Ops, |
| 67 | int FrameIndex) const; |
Owen Anderson | 43dbe05 | 2008-01-07 01:35:02 +0000 | [diff] [blame] | 68 | |
Dan Gohman | c54baa2 | 2008-12-03 18:43:12 +0000 | [diff] [blame] | 69 | virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF, |
| 70 | MachineInstr* MI, |
| 71 | const SmallVectorImpl<unsigned> &Ops, |
| 72 | MachineInstr* LoadMI) const { |
Owen Anderson | 43dbe05 | 2008-01-07 01:35:02 +0000 | [diff] [blame] | 73 | return 0; |
| 74 | } |
| 75 | |
Andrew Lenharth | f81173f | 2006-10-31 16:49:55 +0000 | [diff] [blame] | 76 | bool AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, |
| 77 | MachineBasicBlock *&FBB, |
Evan Cheng | dc54d31 | 2009-02-09 07:14:22 +0000 | [diff] [blame] | 78 | SmallVectorImpl<MachineOperand> &Cond, |
| 79 | bool AllowModify) const; |
Evan Cheng | b5cdaa2 | 2007-05-18 00:05:48 +0000 | [diff] [blame] | 80 | unsigned RemoveBranch(MachineBasicBlock &MBB) const; |
Andrew Lenharth | f81173f | 2006-10-31 16:49:55 +0000 | [diff] [blame] | 81 | void insertNoop(MachineBasicBlock &MBB, |
| 82 | MachineBasicBlock::iterator MI) const; |
Owen Anderson | 44eb65c | 2008-08-14 22:49:33 +0000 | [diff] [blame] | 83 | bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const; |
Dan Gohman | 9911405 | 2009-06-03 20:30:14 +0000 | [diff] [blame] | 84 | |
| 85 | /// getGlobalBaseReg - Return a virtual register initialized with the |
| 86 | /// the global base register value. Output instructions required to |
| 87 | /// initialize the register in the function entry block, if necessary. |
| 88 | /// |
| 89 | unsigned getGlobalBaseReg(MachineFunction *MF) const; |
| 90 | |
| 91 | /// getGlobalRetAddr - Return a virtual register initialized with the |
| 92 | /// the global return address register value. Output instructions required to |
| 93 | /// initialize the register in the function entry block, if necessary. |
| 94 | /// |
| 95 | unsigned getGlobalRetAddr(MachineFunction *MF) const; |
Andrew Lenharth | 304d0f3 | 2005-01-22 23:41:55 +0000 | [diff] [blame] | 96 | }; |
| 97 | |
| 98 | } |
| 99 | |
| 100 | #endif |