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Andrew Trick07269262012-03-21 22:31:31 +00001; RUN: llc -march=x86-64 -mcpu=core2 -enable-misched -misched=shuffle -misched-bottomup < %s
Lang Hames182c34b2012-03-29 21:11:47 +00002; REQUIRES: asserts
Andrew Trickc6a19dd2012-03-21 04:12:19 +00003;
4; Interesting MachineScheduler cases.
Lang Hames616c8412012-03-29 19:54:28 +00005;
6; FIXME: There should be an assert in the coalescer that we're not rematting
7; "not-quite-dead" copies, but that breaks a lot of tests <rdar://problem/11148682>.
Andrew Trickc6a19dd2012-03-21 04:12:19 +00008
9declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
10
11; From oggenc.
12; After coalescing, we have a dead superreg (RAX) definition.
Andrew Trick07269262012-03-21 22:31:31 +000013;
14; CHECK: xorl %esi, %esi
15; CHECK: movl $32, %ecx
16; CHECK: rep;movsl
Andrew Trickc6a19dd2012-03-21 04:12:19 +000017define fastcc void @_preextrapolate_helper() nounwind uwtable ssp {
18entry:
19 br i1 undef, label %for.cond.preheader, label %if.end
20
21for.cond.preheader: ; preds = %entry
22 call void @llvm.memcpy.p0i8.p0i8.i64(i8* undef, i8* null, i64 128, i32 4, i1 false) nounwind
23 unreachable
24
25if.end: ; preds = %entry
26 ret void
27}