blob: 6ee2c349abc181438caee157e9cad67917a7666c [file] [log] [blame]
Evan Chengafff9412011-12-20 18:26:50 +00001; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
2; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
Chad Rosier49d6fc02012-06-12 19:25:13 +00003; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=ARM-LONG
4; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=THUMB-LONG
Derek Schuffed788b62013-05-14 16:26:38 +00005; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -mattr=-vfp2 | FileCheck %s --check-prefix=ARM-NOVFP
6; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -mattr=-vfp2 | FileCheck %s --check-prefix=THUMB-NOVFP
7
8; Note that some of these tests assume that relocations are either
9; movw/movt or constant pool loads. Different platforms will select
10; different approaches.
Chad Rosier42536af2011-11-05 20:16:15 +000011
12define i32 @t0(i1 zeroext %a) nounwind {
13 %1 = zext i1 %a to i32
14 ret i32 %1
15}
16
17define i32 @t1(i8 signext %a) nounwind {
18 %1 = sext i8 %a to i32
19 ret i32 %1
20}
21
22define i32 @t2(i8 zeroext %a) nounwind {
23 %1 = zext i8 %a to i32
24 ret i32 %1
25}
26
27define i32 @t3(i16 signext %a) nounwind {
28 %1 = sext i16 %a to i32
29 ret i32 %1
30}
31
32define i32 @t4(i16 zeroext %a) nounwind {
33 %1 = zext i16 %a to i32
34 ret i32 %1
35}
36
37define void @foo(i8 %a, i16 %b) nounwind {
38; ARM: foo
39; THUMB: foo
40;; Materialize i1 1
41; ARM: movw r2, #1
42;; zero-ext
43; ARM: and r2, r2, #1
44; THUMB: and r2, r2, #1
45 %1 = call i32 @t0(i1 zeroext 1)
46; ARM: sxtb r2, r1
47; ARM: mov r0, r2
48; THUMB: sxtb r2, r1
49; THUMB: mov r0, r2
50 %2 = call i32 @t1(i8 signext %a)
51; ARM: uxtb r2, r1
52; ARM: mov r0, r2
53; THUMB: uxtb r2, r1
54; THUMB: mov r0, r2
55 %3 = call i32 @t2(i8 zeroext %a)
56; ARM: sxth r2, r1
57; ARM: mov r0, r2
58; THUMB: sxth r2, r1
59; THUMB: mov r0, r2
60 %4 = call i32 @t3(i16 signext %b)
61; ARM: uxth r2, r1
62; ARM: mov r0, r2
63; THUMB: uxth r2, r1
64; THUMB: mov r0, r2
65 %5 = call i32 @t4(i16 zeroext %b)
66
67;; A few test to check materialization
68;; Note: i1 1 was materialized with t1 call
69; ARM: movw r1, #255
70%6 = call i32 @t2(i8 zeroext 255)
71; ARM: movw r1, #65535
72; THUMB: movw r1, #65535
73%7 = call i32 @t4(i16 zeroext 65535)
74 ret void
75}
Chad Rosier0eff39f2011-11-08 00:03:32 +000076
77define void @foo2() nounwind {
78 %1 = call signext i16 @t5()
79 %2 = call zeroext i16 @t6()
80 %3 = call signext i8 @t7()
81 %4 = call zeroext i8 @t8()
82 %5 = call zeroext i1 @t9()
83 ret void
84}
85
86declare signext i16 @t5();
87declare zeroext i16 @t6();
88declare signext i8 @t7();
89declare zeroext i8 @t8();
90declare zeroext i1 @t9();
Chad Rosierb74c8652011-12-02 20:25:18 +000091
92define i32 @t10(i32 %argc, i8** nocapture %argv) {
93entry:
94; ARM: @t10
Derek Schuffed788b62013-05-14 16:26:38 +000095; ARM: movw [[R0:l?r[0-9]*]], #0
96; ARM: movw [[R1:l?r[0-9]*]], #248
97; ARM: movw [[R2:l?r[0-9]*]], #187
98; ARM: movw [[R3:l?r[0-9]*]], #28
99; ARM: movw [[R4:l?r[0-9]*]], #40
100; ARM: movw [[R5:l?r[0-9]*]], #186
101; ARM: uxtb [[R0]], [[R0]]
102; ARM: uxtb [[R1]], [[R1]]
103; ARM: uxtb [[R2]], [[R2]]
104; ARM: uxtb [[R3]], [[R3]]
105; ARM: uxtb [[R4]], [[R4]]
106; ARM: str [[R4]], [sp]
107; ARM: uxtb [[R4]], [[R5]]
108; ARM: str [[R4]], [sp, #4]
109; ARM: bl {{_?}}bar
Chad Rosier49d6fc02012-06-12 19:25:13 +0000110; ARM-LONG: @t10
Derek Schuffed788b62013-05-14 16:26:38 +0000111; ARM-LONG: {{(movw)|(ldr)}} [[R:l?r[0-9]*]], {{(:lower16:L_bar\$non_lazy_ptr)|(.LCPI)}}
112; ARM-LONG: {{(movt [[R]], :upper16:L_bar\$non_lazy_ptr)?}}
113; ARM-LONG: ldr [[R]], {{\[}}[[R]]{{\]}}
114; ARM-LONG: blx [[R]]
Chad Rosierb74c8652011-12-02 20:25:18 +0000115; THUMB: @t10
Derek Schuffed788b62013-05-14 16:26:38 +0000116; THUMB: movs [[R0:l?r[0-9]*]], #0
117; THUMB: movt [[R0]], #0
118; THUMB: movs [[R1:l?r[0-9]*]], #248
119; THUMB: movt [[R1]], #0
120; THUMB: movs [[R2:l?r[0-9]*]], #187
121; THUMB: movt [[R2]], #0
122; THUMB: movs [[R3:l?r[0-9]*]], #28
123; THUMB: movt [[R3]], #0
124; THUMB: movw [[R4:l?r[0-9]*]], #40
125; THUMB: movt [[R4]], #0
126; THUMB: movw [[R5:l?r[0-9]*]], #186
127; THUMB: movt [[R5]], #0
128; THUMB: uxtb [[R0]], [[R0]]
129; THUMB: uxtb [[R1]], [[R1]]
130; THUMB: uxtb [[R2]], [[R2]]
131; THUMB: uxtb [[R3]], [[R3]]
132; THUMB: uxtb.w [[R4]], [[R4]]
133; THUMB: str.w [[R4]], [sp]
134; THUMB: uxtb.w [[R4]], [[R5]]
135; THUMB: str.w [[R4]], [sp, #4]
136; THUMB: bl {{_?}}bar
Chad Rosier49d6fc02012-06-12 19:25:13 +0000137; THUMB-LONG: @t10
Derek Schuffed788b62013-05-14 16:26:38 +0000138; THUMB-LONG: {{(movw)|(ldr.n)}} [[R:l?r[0-9]*]], {{(:lower16:L_bar\$non_lazy_ptr)|(.LCPI)}}
139; THUMB-LONG: {{(movt [[R]], :upper16:L_bar\$non_lazy_ptr)?}}
140; THUMB-LONG: ldr{{(.w)?}} [[R]], {{\[}}[[R]]{{\]}}
141; THUMB-LONG: blx [[R]]
Chad Rosierb74c8652011-12-02 20:25:18 +0000142 %call = call i32 @bar(i8 zeroext 0, i8 zeroext -8, i8 zeroext -69, i8 zeroext 28, i8 zeroext 40, i8 zeroext -70)
143 ret i32 0
144}
145
146declare i32 @bar(i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext)
Chad Rosier1c8fccb2012-05-23 18:38:57 +0000147
148define i32 @bar0(i32 %i) nounwind {
149 ret i32 0
150}
151
152define void @foo3() uwtable {
153; ARM: movw r0, #0
Derek Schuffed788b62013-05-14 16:26:38 +0000154; ARM: {{(movw r1, :lower16:_?bar0)|(ldr r1, .LCPI)}}
155; ARM: {{(movt r1, :upper16:_?bar0)|(ldr r1, \[r1\])}}
Chad Rosier1c8fccb2012-05-23 18:38:57 +0000156; ARM: blx r1
157; THUMB: movs r0, #0
Derek Schuffed788b62013-05-14 16:26:38 +0000158; THUMB: {{(movw r1, :lower16:_?bar0)|(ldr.n r1, .LCPI)}}
159; THUMB: {{(movt r1, :upper16:_?bar0)|(ldr r1, \[r1\])}}
Chad Rosier1c8fccb2012-05-23 18:38:57 +0000160; THUMB: blx r1
161 %fptr = alloca i32 (i32)*, align 8
162 store i32 (i32)* @bar0, i32 (i32)** %fptr, align 8
163 %1 = load i32 (i32)** %fptr, align 8
164 %call = call i32 %1(i32 0)
165 ret void
166}
Chad Rosier49d6fc02012-06-12 19:25:13 +0000167
168define i32 @LibCall(i32 %a, i32 %b) {
169entry:
170; ARM: LibCall
Derek Schuffed788b62013-05-14 16:26:38 +0000171; ARM: bl {{___udivsi3|__aeabi_uidiv}}
Chad Rosier49d6fc02012-06-12 19:25:13 +0000172; ARM-LONG: LibCall
Derek Schuffed788b62013-05-14 16:26:38 +0000173; ARM-LONG: {{(movw r2, :lower16:L___udivsi3\$non_lazy_ptr)|(ldr r2, .LCPI)}}
174; ARM-LONG: {{(movt r2, :upper16:L___udivsi3\$non_lazy_ptr)?}}
Chad Rosier49d6fc02012-06-12 19:25:13 +0000175; ARM-LONG: ldr r2, [r2]
176; ARM-LONG: blx r2
177; THUMB: LibCall
Derek Schuffed788b62013-05-14 16:26:38 +0000178; THUMB: bl {{___udivsi3|__aeabi_uidiv}}
Chad Rosier49d6fc02012-06-12 19:25:13 +0000179; THUMB-LONG: LibCall
Derek Schuffed788b62013-05-14 16:26:38 +0000180; THUMB-LONG: {{(movw r2, :lower16:L___udivsi3\$non_lazy_ptr)|(ldr.n r2, .LCPI)}}
181; THUMB-LONG: {{(movt r2, :upper16:L___udivsi3\$non_lazy_ptr)?}}
Chad Rosier49d6fc02012-06-12 19:25:13 +0000182; THUMB-LONG: ldr r2, [r2]
183; THUMB-LONG: blx r2
184 %tmp1 = udiv i32 %a, %b ; <i32> [#uses=1]
185 ret i32 %tmp1
186}
Jush Luee649832012-07-19 09:49:00 +0000187
Jush Lu2ff4e9d2012-08-16 05:15:53 +0000188; Test fastcc
189
190define fastcc void @fast_callee(float %i) ssp {
191entry:
192; ARM: fast_callee
193; ARM: vmov r0, s0
194; THUMB: fast_callee
195; THUMB: vmov r0, s0
196; ARM-NOVFP: fast_callee
197; ARM-NOVFP-NOT: s0
198; THUMB-NOVFP: fast_callee
199; THUMB-NOVFP-NOT: s0
200 call void @print(float %i)
201 ret void
202}
203
204define void @fast_caller() ssp {
205entry:
206; ARM: fast_caller
207; ARM: vldr s0,
208; THUMB: fast_caller
209; THUMB: vldr s0,
210; ARM-NOVFP: fast_caller
211; ARM-NOVFP: movw r0, #13107
212; ARM-NOVFP: movt r0, #16611
213; THUMB-NOVFP: fast_caller
214; THUMB-NOVFP: movw r0, #13107
215; THUMB-NOVFP: movt r0, #16611
216 call fastcc void @fast_callee(float 0x401C666660000000)
217 ret void
218}
219
220define void @no_fast_callee(float %i) ssp {
221entry:
222; ARM: no_fast_callee
223; ARM: vmov s0, r0
224; THUMB: no_fast_callee
225; THUMB: vmov s0, r0
226; ARM-NOVFP: no_fast_callee
227; ARM-NOVFP-NOT: s0
228; THUMB-NOVFP: no_fast_callee
229; THUMB-NOVFP-NOT: s0
230 call void @print(float %i)
231 ret void
232}
233
234define void @no_fast_caller() ssp {
235entry:
236; ARM: no_fast_caller
237; ARM: vmov r0, s0
238; THUMB: no_fast_caller
239; THUMB: vmov r0, s0
240; ARM-NOVFP: no_fast_caller
241; ARM-NOVFP: movw r0, #13107
242; ARM-NOVFP: movt r0, #16611
243; THUMB-NOVFP: no_fast_caller
244; THUMB-NOVFP: movw r0, #13107
245; THUMB-NOVFP: movt r0, #16611
246 call void @no_fast_callee(float 0x401C666660000000)
247 ret void
248}
249
250declare void @print(float)