blob: 492603fe7f069a7b0ccced99ea24a1ef9df42e18 [file] [log] [blame]
Rafael Espindola7bc59bc2006-05-14 22:18:28 +00001//===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file was developed by the "Instituto Nokia de Tecnologia" and
6// is distributed under the University of Illinois Open Source
7// License. See LICENSE.TXT for details.
8//
9//===----------------------------------------------------------------------===//
10//
11//
12//===----------------------------------------------------------------------===//
13
14#include "ARMTargetMachine.h"
Evan Chenga8e29892007-01-19 07:51:42 +000015#include "ARMTargetAsmInfo.h"
Rafael Espindolaec46ea32006-08-16 14:43:33 +000016#include "ARMFrameInfo.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000017#include "ARM.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000018#include "llvm/Module.h"
19#include "llvm/PassManager.h"
Evan Chenga8e29892007-01-19 07:51:42 +000020#include "llvm/Support/CommandLine.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000021#include "llvm/Target/TargetMachineRegistry.h"
Evan Chenga8e29892007-01-19 07:51:42 +000022#include "llvm/Target/TargetOptions.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000023using namespace llvm;
24
Evan Chenga8e29892007-01-19 07:51:42 +000025static cl::opt<bool> DisableLdStOpti("disable-arm-loadstore-opti", cl::Hidden,
26 cl::desc("Disable load store optimization pass"));
27
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000028namespace {
29 // Register the target.
30 RegisterTarget<ARMTargetMachine> X("arm", " ARM");
31}
32
33/// TargetMachine ctor - Create an ILP32 architecture model
34///
35ARMTargetMachine::ARMTargetMachine(const Module &M, const std::string &FS)
Evan Chengd44ecd82007-01-22 21:24:13 +000036 : Subtarget(M, FS),
37 DataLayout(Subtarget.isTargetDarwin() ?
38 std::string("e-p:32:32-d:32-l:32") :
39 std::string("e-p:32:32-d:64-l:64")),
40 InstrInfo(Subtarget),
Evan Cheng75e18c42007-01-20 02:09:25 +000041 FrameInfo(Subtarget) {}
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000042
43unsigned ARMTargetMachine::getModuleMatchQuality(const Module &M) {
44 std::string TT = M.getTargetTriple();
45 if (TT.size() >= 4 && std::string(TT.begin(), TT.begin()+4) == "arm-")
46 return 20;
47
48 if (M.getPointerSize() == Module::Pointer32)
49 return 1;
50 else
51 return 0;
52}
53
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000054
Evan Chenga8e29892007-01-19 07:51:42 +000055const TargetAsmInfo *ARMTargetMachine::createTargetAsmInfo() const {
56 return new ARMTargetAsmInfo(*this);
57}
58
59
Chris Lattner1911fd42006-09-04 04:14:57 +000060// Pass Pipeline Configuration
61bool ARMTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000062 PM.add(createARMISelDag(*this));
Chris Lattner1911fd42006-09-04 04:14:57 +000063 return false;
64}
Rafael Espindola71f3b942006-09-19 15:49:25 +000065
Evan Chenga8e29892007-01-19 07:51:42 +000066bool ARMTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
67 // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
68 if (!Fast && !DisableLdStOpti && !Subtarget.isThumb())
69 PM.add(createARMLoadStoreOptimizationPass());
70
71 PM.add(createARMConstantIslandPass());
Rafael Espindola71f3b942006-09-19 15:49:25 +000072 return true;
73}
74
Chris Lattner1911fd42006-09-04 04:14:57 +000075bool ARMTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
76 std::ostream &Out) {
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000077 // Output assembly language.
78 PM.add(createARMCodePrinterPass(Out, *this));
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000079 return false;
80}