Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2010 Jerome Glisse <glisse@freedesktop.org> |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * on the rights to use, copy, modify, merge, publish, distribute, sub |
| 8 | * license, and/or sell copies of the Software, and to permit persons to whom |
| 9 | * the Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, |
| 19 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR |
| 20 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE |
| 21 | * USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * Jerome Glisse |
| 25 | */ |
| 26 | #ifndef R600_PRIV_H |
| 27 | #define R600_PRIV_H |
| 28 | |
| 29 | #include <errno.h> |
| 30 | #include <stdint.h> |
| 31 | #include <stdlib.h> |
| 32 | #include <assert.h> |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 33 | #include <pipebuffer/pb_bufmgr.h> |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 34 | #include "r600.h" |
| 35 | |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 36 | struct radeon { |
| 37 | int fd; |
| 38 | int refcount; |
| 39 | unsigned device; |
| 40 | unsigned family; |
Jerome Glisse | 363dfb8 | 2010-09-20 11:58:00 -0400 | [diff] [blame] | 41 | enum chip_class chip_class; |
Jerome Glisse | eff1af6 | 2010-09-24 10:40:17 -0400 | [diff] [blame] | 42 | boolean use_mem_constant; /* true for evergreen */ |
Dave Airlie | 301ab49 | 2010-09-29 09:17:59 +1000 | [diff] [blame] | 43 | struct pb_manager *mman; /* malloc manager */ |
| 44 | struct pb_manager *kman; /* kernel bo manager */ |
| 45 | struct pb_manager *cman; /* cached bo manager */ |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 46 | }; |
| 47 | |
| 48 | struct radeon *r600_new(int fd, unsigned device); |
| 49 | void r600_delete(struct radeon *r600); |
| 50 | |
| 51 | struct r600_reg { |
Jerome Glisse | 5646964 | 2010-09-28 17:37:56 -0400 | [diff] [blame] | 52 | unsigned opcode; |
| 53 | unsigned offset_base; |
| 54 | unsigned offset; |
Jerome Glisse | ca35292 | 2010-09-21 20:24:51 -0400 | [diff] [blame] | 55 | unsigned need_bo; |
| 56 | unsigned flush_flags; |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 57 | }; |
| 58 | |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 59 | struct radeon_bo { |
| 60 | struct pipe_reference reference; |
| 61 | unsigned handle; |
| 62 | unsigned size; |
| 63 | unsigned alignment; |
| 64 | unsigned map_count; |
| 65 | void *data; |
| 66 | }; |
| 67 | |
Jerome Glisse | 294c9fc | 2010-10-04 10:06:13 -0400 | [diff] [blame] | 68 | struct r600_bo { |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 69 | struct pipe_reference reference; |
| 70 | struct pb_buffer *pb; |
Jerome Glisse | 674452f | 2010-10-04 10:37:32 -0400 | [diff] [blame^] | 71 | unsigned size; |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 72 | }; |
| 73 | |
| 74 | |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 75 | /* radeon_pciid.c */ |
| 76 | unsigned radeon_family_from_device(unsigned device); |
| 77 | |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 78 | /* r600_drm.c */ |
| 79 | struct radeon *radeon_decref(struct radeon *radeon); |
| 80 | |
| 81 | /* radeon_bo.c */ |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 82 | struct radeon_bo *radeon_bo(struct radeon *radeon, unsigned handle, |
| 83 | unsigned size, unsigned alignment, void *ptr); |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 84 | void radeon_bo_reference(struct radeon *radeon, struct radeon_bo **dst, |
| 85 | struct radeon_bo *src); |
| 86 | int radeon_bo_wait(struct radeon *radeon, struct radeon_bo *bo); |
| 87 | int radeon_bo_busy(struct radeon *radeon, struct radeon_bo *bo, uint32_t *domain); |
Dave Airlie | dbcd652 | 2010-09-30 09:07:07 +1000 | [diff] [blame] | 88 | void radeon_bo_pbmgr_flush_maps(struct pb_manager *_mgr); |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 89 | |
| 90 | /* radeon_bo_pb.c */ |
Jerome Glisse | 674452f | 2010-10-04 10:37:32 -0400 | [diff] [blame^] | 91 | struct radeon_bo *radeon_bo_pb_get_bo(struct pb_buffer *_buf); |
Dave Airlie | dbcd652 | 2010-09-30 09:07:07 +1000 | [diff] [blame] | 92 | struct pb_manager *radeon_bo_pbmgr_create(struct radeon *radeon); |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 93 | struct pb_buffer *radeon_bo_pb_create_buffer_from_handle(struct pb_manager *_mgr, |
| 94 | uint32_t handle); |
| 95 | |
Jerome Glisse | 674452f | 2010-10-04 10:37:32 -0400 | [diff] [blame^] | 96 | /* r600_hw_context.c */ |
| 97 | void r600_context_bo_reloc(struct r600_context *ctx, u32 *pm4, struct r600_bo *rbo); |
| 98 | struct r600_bo *r600_context_reg_bo(struct r600_context *ctx, unsigned offset); |
| 99 | int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg, unsigned nreg); |
| 100 | |
Jerome Glisse | 294c9fc | 2010-10-04 10:06:13 -0400 | [diff] [blame] | 101 | /* r600_bo.c */ |
| 102 | unsigned r600_bo_get_handle(struct r600_bo *bo); |
| 103 | unsigned r600_bo_get_size(struct r600_bo *bo); |
Jerome Glisse | 674452f | 2010-10-04 10:37:32 -0400 | [diff] [blame^] | 104 | static INLINE struct radeon_bo *r600_bo_get_bo(struct r600_bo *bo) |
| 105 | { |
| 106 | return radeon_bo_pb_get_bo(bo->pb); |
| 107 | } |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 108 | |
Jerome Glisse | 5646964 | 2010-09-28 17:37:56 -0400 | [diff] [blame] | 109 | #define CTX_RANGE_ID(ctx, offset) (((offset) >> (ctx)->hash_shift) & 255) |
| 110 | #define CTX_BLOCK_ID(ctx, offset) ((offset) & ((1 << (ctx)->hash_shift) - 1)) |
Jerome Glisse | a852615 | 2010-09-26 12:06:46 -0400 | [diff] [blame] | 111 | |
Jerome Glisse | 5646964 | 2010-09-28 17:37:56 -0400 | [diff] [blame] | 112 | static void inline r600_context_reg(struct r600_context *ctx, |
Jerome Glisse | a852615 | 2010-09-26 12:06:46 -0400 | [diff] [blame] | 113 | unsigned offset, unsigned value, |
| 114 | unsigned mask) |
| 115 | { |
Jerome Glisse | 5646964 | 2010-09-28 17:37:56 -0400 | [diff] [blame] | 116 | struct r600_range *range; |
| 117 | struct r600_block *block; |
Jerome Glisse | a852615 | 2010-09-26 12:06:46 -0400 | [diff] [blame] | 118 | unsigned id; |
| 119 | |
Jerome Glisse | 5646964 | 2010-09-28 17:37:56 -0400 | [diff] [blame] | 120 | range = &ctx->range[CTX_RANGE_ID(ctx, offset)]; |
| 121 | block = range->blocks[CTX_BLOCK_ID(ctx, offset)]; |
Jerome Glisse | a852615 | 2010-09-26 12:06:46 -0400 | [diff] [blame] | 122 | id = (offset - block->start_offset) >> 2; |
Jerome Glisse | 0282682 | 2010-09-27 17:00:07 -0400 | [diff] [blame] | 123 | block->reg[id] &= ~mask; |
| 124 | block->reg[id] |= value; |
Jerome Glisse | a852615 | 2010-09-26 12:06:46 -0400 | [diff] [blame] | 125 | if (!(block->status & R600_BLOCK_STATUS_DIRTY)) { |
Jerome Glisse | 0282682 | 2010-09-27 17:00:07 -0400 | [diff] [blame] | 126 | ctx->pm4_dirty_cdwords += block->pm4_ndwords; |
John Doe | dde1391 | 2010-09-30 17:30:25 -0400 | [diff] [blame] | 127 | block->status |= R600_BLOCK_STATUS_ENABLED; |
| 128 | block->status |= R600_BLOCK_STATUS_DIRTY; |
Jerome Glisse | a852615 | 2010-09-26 12:06:46 -0400 | [diff] [blame] | 129 | } |
Jerome Glisse | a852615 | 2010-09-26 12:06:46 -0400 | [diff] [blame] | 130 | } |
| 131 | |
Jerome Glisse | 5646964 | 2010-09-28 17:37:56 -0400 | [diff] [blame] | 132 | static inline void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block *block) |
| 133 | { |
Jerome Glisse | 5646964 | 2010-09-28 17:37:56 -0400 | [diff] [blame] | 134 | int id; |
| 135 | |
| 136 | for (int j = 0; j < block->nreg; j++) { |
| 137 | if (block->pm4_bo_index[j]) { |
| 138 | /* find relocation */ |
| 139 | id = block->pm4_bo_index[j]; |
Jerome Glisse | 5646964 | 2010-09-28 17:37:56 -0400 | [diff] [blame] | 140 | for (int k = 0; k < block->reloc[id].nreloc; k++) { |
| 141 | r600_context_bo_reloc(ctx, |
| 142 | &block->pm4[block->reloc[id].bo_pm4_index[k]], |
Jerome Glisse | 674452f | 2010-10-04 10:37:32 -0400 | [diff] [blame^] | 143 | block->reloc[id].bo); |
Jerome Glisse | 5646964 | 2010-09-28 17:37:56 -0400 | [diff] [blame] | 144 | } |
| 145 | } |
| 146 | } |
| 147 | memcpy(&ctx->pm4[ctx->pm4_cdwords], block->pm4, block->pm4_ndwords * 4); |
| 148 | ctx->pm4_cdwords += block->pm4_ndwords; |
| 149 | block->status ^= R600_BLOCK_STATUS_DIRTY; |
| 150 | } |
| 151 | |
John Doe | 40181ae | 2010-09-30 17:53:36 -0400 | [diff] [blame] | 152 | static inline int radeon_bo_map(struct radeon *radeon, struct radeon_bo *bo) |
| 153 | { |
| 154 | bo->map_count++; |
Dave Airlie | 1c2b3cb | 2010-10-04 16:26:46 +1000 | [diff] [blame] | 155 | return 0; |
John Doe | 40181ae | 2010-09-30 17:53:36 -0400 | [diff] [blame] | 156 | } |
| 157 | |
| 158 | static inline void radeon_bo_unmap(struct radeon *radeon, struct radeon_bo *bo) |
| 159 | { |
| 160 | bo->map_count--; |
| 161 | assert(bo->map_count >= 0); |
| 162 | } |
| 163 | |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 164 | #endif |