Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1 | // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 | // All Rights Reserved. |
| 3 | // |
| 4 | // Redistribution and use in source and binary forms, with or without |
| 5 | // modification, are permitted provided that the following conditions |
| 6 | // are met: |
| 7 | // |
| 8 | // - Redistributions of source code must retain the above copyright notice, |
| 9 | // this list of conditions and the following disclaimer. |
| 10 | // |
| 11 | // - Redistribution in binary form must reproduce the above copyright |
| 12 | // notice, this list of conditions and the following disclaimer in the |
| 13 | // documentation and/or other materials provided with the |
| 14 | // distribution. |
| 15 | // |
| 16 | // - Neither the name of Sun Microsystems or the names of contributors may |
| 17 | // be used to endorse or promote products derived from this software without |
| 18 | // specific prior written permission. |
| 19 | // |
| 20 | // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 21 | // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 22 | // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
| 23 | // FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
| 24 | // COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 25 | // INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 26 | // (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| 27 | // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 28 | // HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
| 29 | // STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 30 | // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED |
| 31 | // OF THE POSSIBILITY OF SUCH DAMAGE. |
| 32 | |
Leon Clarke | d91b9f7 | 2010-01-27 17:25:45 +0000 | [diff] [blame] | 33 | // The original source code covered by the above license above has been |
| 34 | // modified significantly by Google Inc. |
Ben Murdoch | 692be65 | 2012-01-10 18:47:50 +0000 | [diff] [blame] | 35 | // Copyright 2012 the V8 project authors. All rights reserved. |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 36 | |
| 37 | // A light-weight ARM Assembler |
| 38 | // Generates user mode instructions for the ARM architecture up to version 5 |
| 39 | |
| 40 | #ifndef V8_ARM_ASSEMBLER_ARM_H_ |
| 41 | #define V8_ARM_ASSEMBLER_ARM_H_ |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 42 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 43 | #include <stdio.h> |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 44 | #include <vector> |
| 45 | |
| 46 | #include "src/arm/constants-arm.h" |
| 47 | #include "src/assembler.h" |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 48 | |
| 49 | namespace v8 { |
| 50 | namespace internal { |
| 51 | |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 52 | // clang-format off |
| 53 | #define GENERAL_REGISTERS(V) \ |
| 54 | V(r0) V(r1) V(r2) V(r3) V(r4) V(r5) V(r6) V(r7) \ |
| 55 | V(r8) V(r9) V(r10) V(fp) V(ip) V(sp) V(lr) V(pc) |
| 56 | |
| 57 | #define ALLOCATABLE_GENERAL_REGISTERS(V) \ |
| 58 | V(r0) V(r1) V(r2) V(r3) V(r4) V(r5) V(r6) V(r7) V(r8) |
| 59 | |
| 60 | #define DOUBLE_REGISTERS(V) \ |
| 61 | V(d0) V(d1) V(d2) V(d3) V(d4) V(d5) V(d6) V(d7) \ |
| 62 | V(d8) V(d9) V(d10) V(d11) V(d12) V(d13) V(d14) V(d15) \ |
| 63 | V(d16) V(d17) V(d18) V(d19) V(d20) V(d21) V(d22) V(d23) \ |
| 64 | V(d24) V(d25) V(d26) V(d27) V(d28) V(d29) V(d30) V(d31) |
| 65 | |
| 66 | #define ALLOCATABLE_DOUBLE_REGISTERS(V) \ |
| 67 | V(d0) V(d1) V(d2) V(d3) V(d4) V(d5) V(d6) V(d7) \ |
| 68 | V(d8) V(d9) V(d10) V(d11) V(d12) V(d13) \ |
| 69 | V(d16) V(d17) V(d18) V(d19) V(d20) V(d21) V(d22) V(d23) \ |
| 70 | V(d24) V(d25) V(d26) V(d27) V(d28) V(d29) V(d30) V(d31) |
| 71 | |
| 72 | #define ALLOCATABLE_NO_VFP32_DOUBLE_REGISTERS(V) \ |
| 73 | V(d0) V(d1) V(d2) V(d3) V(d4) V(d5) V(d6) V(d7) \ |
| 74 | V(d8) V(d9) V(d10) V(d11) V(d12) V(d13) \ |
| 75 | // clang-format on |
| 76 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 77 | // CPU Registers. |
| 78 | // |
| 79 | // 1) We would prefer to use an enum, but enum values are assignment- |
| 80 | // compatible with int, which has caused code-generation bugs. |
| 81 | // |
| 82 | // 2) We would prefer to use a class instead of a struct but we don't like |
| 83 | // the register initialization to depend on the particular initialization |
| 84 | // order (which appears to be different on OS X, Linux, and Windows for the |
| 85 | // installed versions of C++ we tried). Using a struct permits C-style |
| 86 | // "initialization". Also, the Register objects cannot be const as this |
| 87 | // forces initialization stubs in MSVC, making us dependent on initialization |
| 88 | // order. |
| 89 | // |
| 90 | // 3) By not using an enum, we are possibly preventing the compiler from |
| 91 | // doing certain constant folds, which may significantly reduce the |
| 92 | // code generated for some assembly instructions (because they boil down |
| 93 | // to a few constants). If this is a problem, we could change the code |
| 94 | // such that we use an enum in optimized mode, and the struct in debug |
| 95 | // mode. This way we get the compile-time error checking in debug mode |
| 96 | // and best performance in optimized code. |
Steve Block | 9fac840 | 2011-05-12 15:51:54 +0100 | [diff] [blame] | 97 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 98 | struct Register { |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 99 | enum Code { |
| 100 | #define REGISTER_CODE(R) kCode_##R, |
| 101 | GENERAL_REGISTERS(REGISTER_CODE) |
| 102 | #undef REGISTER_CODE |
| 103 | kAfterLast, |
| 104 | kCode_no_reg = -1 |
| 105 | }; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 106 | |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 107 | static const int kNumRegisters = Code::kAfterLast; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 108 | |
| 109 | static Register from_code(int code) { |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 110 | DCHECK(code >= 0); |
| 111 | DCHECK(code < kNumRegisters); |
| 112 | Register r = {code}; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 113 | return r; |
| 114 | } |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 115 | const char* ToString(); |
| 116 | bool IsAllocatable() const; |
| 117 | bool is_valid() const { return 0 <= reg_code && reg_code < kNumRegisters; } |
| 118 | bool is(Register reg) const { return reg_code == reg.reg_code; } |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 119 | int code() const { |
| 120 | DCHECK(is_valid()); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 121 | return reg_code; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 122 | } |
| 123 | int bit() const { |
| 124 | DCHECK(is_valid()); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 125 | return 1 << reg_code; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 126 | } |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 127 | void set_code(int code) { |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 128 | reg_code = code; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 129 | DCHECK(is_valid()); |
| 130 | } |
| 131 | |
| 132 | // Unfortunately we can't make this private in a struct. |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 133 | int reg_code; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 134 | }; |
| 135 | |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 136 | // r7: context register |
| 137 | // r8: constant pool pointer register if FLAG_enable_embedded_constant_pool. |
| 138 | // r9: lithium scratch |
| 139 | #define DECLARE_REGISTER(R) const Register R = {Register::kCode_##R}; |
| 140 | GENERAL_REGISTERS(DECLARE_REGISTER) |
| 141 | #undef DECLARE_REGISTER |
| 142 | const Register no_reg = {Register::kCode_no_reg}; |
Ben Murdoch | 3ef787d | 2012-04-12 10:51:47 +0100 | [diff] [blame] | 143 | |
Leon Clarke | e46be81 | 2010-01-19 14:06:41 +0000 | [diff] [blame] | 144 | // Single word VFP register. |
| 145 | struct SwVfpRegister { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 146 | static const int kSizeInBytes = 4; |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 147 | bool is_valid() const { return 0 <= reg_code && reg_code < 32; } |
| 148 | bool is(SwVfpRegister reg) const { return reg_code == reg.reg_code; } |
Kristian Monsen | 0d5e116 | 2010-09-30 15:31:59 +0100 | [diff] [blame] | 149 | int code() const { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 150 | DCHECK(is_valid()); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 151 | return reg_code; |
Leon Clarke | e46be81 | 2010-01-19 14:06:41 +0000 | [diff] [blame] | 152 | } |
Kristian Monsen | 0d5e116 | 2010-09-30 15:31:59 +0100 | [diff] [blame] | 153 | int bit() const { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 154 | DCHECK(is_valid()); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 155 | return 1 << reg_code; |
Leon Clarke | e46be81 | 2010-01-19 14:06:41 +0000 | [diff] [blame] | 156 | } |
Kristian Monsen | 0d5e116 | 2010-09-30 15:31:59 +0100 | [diff] [blame] | 157 | void split_code(int* vm, int* m) const { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 158 | DCHECK(is_valid()); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 159 | *m = reg_code & 0x1; |
| 160 | *vm = reg_code >> 1; |
Kristian Monsen | 80d68ea | 2010-09-08 11:05:35 +0100 | [diff] [blame] | 161 | } |
Leon Clarke | e46be81 | 2010-01-19 14:06:41 +0000 | [diff] [blame] | 162 | |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 163 | int reg_code; |
Leon Clarke | e46be81 | 2010-01-19 14:06:41 +0000 | [diff] [blame] | 164 | }; |
| 165 | |
| 166 | |
| 167 | // Double word VFP register. |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 168 | struct DoubleRegister { |
| 169 | enum Code { |
| 170 | #define REGISTER_CODE(R) kCode_##R, |
| 171 | DOUBLE_REGISTERS(REGISTER_CODE) |
| 172 | #undef REGISTER_CODE |
| 173 | kAfterLast, |
| 174 | kCode_no_reg = -1 |
| 175 | }; |
| 176 | |
| 177 | static const int kMaxNumRegisters = Code::kAfterLast; |
| 178 | |
| 179 | inline static int NumRegisters(); |
| 180 | |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 181 | // A few double registers are reserved: one as a scratch register and one to |
| 182 | // hold 0.0, that does not fit in the immediate field of vmov instructions. |
| 183 | // d14: 0.0 |
| 184 | // d15: scratch register. |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 185 | static const int kSizeInBytes = 8; |
| 186 | |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 187 | const char* ToString(); |
| 188 | bool IsAllocatable() const; |
| 189 | bool is_valid() const { return 0 <= reg_code && reg_code < kMaxNumRegisters; } |
| 190 | bool is(DoubleRegister reg) const { return reg_code == reg.reg_code; } |
Kristian Monsen | 0d5e116 | 2010-09-30 15:31:59 +0100 | [diff] [blame] | 191 | int code() const { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 192 | DCHECK(is_valid()); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 193 | return reg_code; |
Leon Clarke | e46be81 | 2010-01-19 14:06:41 +0000 | [diff] [blame] | 194 | } |
Kristian Monsen | 0d5e116 | 2010-09-30 15:31:59 +0100 | [diff] [blame] | 195 | int bit() const { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 196 | DCHECK(is_valid()); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 197 | return 1 << reg_code; |
| 198 | } |
| 199 | |
| 200 | static DoubleRegister from_code(int code) { |
| 201 | DoubleRegister r = {code}; |
| 202 | return r; |
Leon Clarke | e46be81 | 2010-01-19 14:06:41 +0000 | [diff] [blame] | 203 | } |
Kristian Monsen | 0d5e116 | 2010-09-30 15:31:59 +0100 | [diff] [blame] | 204 | void split_code(int* vm, int* m) const { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 205 | DCHECK(is_valid()); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 206 | *m = (reg_code & 0x10) >> 4; |
| 207 | *vm = reg_code & 0x0F; |
Kristian Monsen | 80d68ea | 2010-09-08 11:05:35 +0100 | [diff] [blame] | 208 | } |
Leon Clarke | e46be81 | 2010-01-19 14:06:41 +0000 | [diff] [blame] | 209 | |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 210 | int reg_code; |
Leon Clarke | e46be81 | 2010-01-19 14:06:41 +0000 | [diff] [blame] | 211 | }; |
| 212 | |
| 213 | |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 214 | typedef DoubleRegister DwVfpRegister; |
Ben Murdoch | b0fe162 | 2011-05-05 13:52:32 +0100 | [diff] [blame] | 215 | |
| 216 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 217 | // Double word VFP register d0-15. |
| 218 | struct LowDwVfpRegister { |
| 219 | public: |
| 220 | static const int kMaxNumLowRegisters = 16; |
| 221 | operator DwVfpRegister() const { |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 222 | DwVfpRegister r = { reg_code }; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 223 | return r; |
| 224 | } |
| 225 | static LowDwVfpRegister from_code(int code) { |
| 226 | LowDwVfpRegister r = { code }; |
| 227 | return r; |
| 228 | } |
| 229 | |
| 230 | bool is_valid() const { |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 231 | return 0 <= reg_code && reg_code < kMaxNumLowRegisters; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 232 | } |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 233 | bool is(DwVfpRegister reg) const { return reg_code == reg.reg_code; } |
| 234 | bool is(LowDwVfpRegister reg) const { return reg_code == reg.reg_code; } |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 235 | int code() const { |
| 236 | DCHECK(is_valid()); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 237 | return reg_code; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 238 | } |
| 239 | SwVfpRegister low() const { |
| 240 | SwVfpRegister reg; |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 241 | reg.reg_code = reg_code * 2; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 242 | |
| 243 | DCHECK(reg.is_valid()); |
| 244 | return reg; |
| 245 | } |
| 246 | SwVfpRegister high() const { |
| 247 | SwVfpRegister reg; |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 248 | reg.reg_code = (reg_code * 2) + 1; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 249 | |
| 250 | DCHECK(reg.is_valid()); |
| 251 | return reg; |
| 252 | } |
| 253 | |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 254 | int reg_code; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 255 | }; |
| 256 | |
| 257 | |
| 258 | // Quad word NEON register. |
| 259 | struct QwNeonRegister { |
| 260 | static const int kMaxNumRegisters = 16; |
| 261 | |
| 262 | static QwNeonRegister from_code(int code) { |
| 263 | QwNeonRegister r = { code }; |
| 264 | return r; |
| 265 | } |
| 266 | |
| 267 | bool is_valid() const { |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 268 | return (0 <= reg_code) && (reg_code < kMaxNumRegisters); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 269 | } |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 270 | bool is(QwNeonRegister reg) const { return reg_code == reg.reg_code; } |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 271 | int code() const { |
| 272 | DCHECK(is_valid()); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 273 | return reg_code; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 274 | } |
| 275 | void split_code(int* vm, int* m) const { |
| 276 | DCHECK(is_valid()); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 277 | int encoded_code = reg_code << 1; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 278 | *m = (encoded_code & 0x10) >> 4; |
| 279 | *vm = encoded_code & 0x0F; |
| 280 | } |
| 281 | |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 282 | int reg_code; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 283 | }; |
| 284 | |
| 285 | |
| 286 | typedef QwNeonRegister QuadRegister; |
| 287 | |
Ben Murdoch | 097c5b2 | 2016-05-18 11:27:45 +0100 | [diff] [blame] | 288 | typedef QwNeonRegister Simd128Register; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 289 | |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 290 | // Support for the VFP registers s0 to s31 (d0 to d15). |
Leon Clarke | e46be81 | 2010-01-19 14:06:41 +0000 | [diff] [blame] | 291 | // Note that "s(N):s(N+1)" is the same as "d(N/2)". |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 292 | const SwVfpRegister s0 = { 0 }; |
| 293 | const SwVfpRegister s1 = { 1 }; |
| 294 | const SwVfpRegister s2 = { 2 }; |
| 295 | const SwVfpRegister s3 = { 3 }; |
| 296 | const SwVfpRegister s4 = { 4 }; |
| 297 | const SwVfpRegister s5 = { 5 }; |
| 298 | const SwVfpRegister s6 = { 6 }; |
| 299 | const SwVfpRegister s7 = { 7 }; |
| 300 | const SwVfpRegister s8 = { 8 }; |
| 301 | const SwVfpRegister s9 = { 9 }; |
| 302 | const SwVfpRegister s10 = { 10 }; |
| 303 | const SwVfpRegister s11 = { 11 }; |
| 304 | const SwVfpRegister s12 = { 12 }; |
| 305 | const SwVfpRegister s13 = { 13 }; |
| 306 | const SwVfpRegister s14 = { 14 }; |
| 307 | const SwVfpRegister s15 = { 15 }; |
| 308 | const SwVfpRegister s16 = { 16 }; |
| 309 | const SwVfpRegister s17 = { 17 }; |
| 310 | const SwVfpRegister s18 = { 18 }; |
| 311 | const SwVfpRegister s19 = { 19 }; |
| 312 | const SwVfpRegister s20 = { 20 }; |
| 313 | const SwVfpRegister s21 = { 21 }; |
| 314 | const SwVfpRegister s22 = { 22 }; |
| 315 | const SwVfpRegister s23 = { 23 }; |
| 316 | const SwVfpRegister s24 = { 24 }; |
| 317 | const SwVfpRegister s25 = { 25 }; |
| 318 | const SwVfpRegister s26 = { 26 }; |
| 319 | const SwVfpRegister s27 = { 27 }; |
| 320 | const SwVfpRegister s28 = { 28 }; |
| 321 | const SwVfpRegister s29 = { 29 }; |
| 322 | const SwVfpRegister s30 = { 30 }; |
| 323 | const SwVfpRegister s31 = { 31 }; |
Leon Clarke | e46be81 | 2010-01-19 14:06:41 +0000 | [diff] [blame] | 324 | |
Ben Murdoch | e0cee9b | 2011-05-25 10:26:03 +0100 | [diff] [blame] | 325 | const DwVfpRegister no_dreg = { -1 }; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 326 | const LowDwVfpRegister d0 = { 0 }; |
| 327 | const LowDwVfpRegister d1 = { 1 }; |
| 328 | const LowDwVfpRegister d2 = { 2 }; |
| 329 | const LowDwVfpRegister d3 = { 3 }; |
| 330 | const LowDwVfpRegister d4 = { 4 }; |
| 331 | const LowDwVfpRegister d5 = { 5 }; |
| 332 | const LowDwVfpRegister d6 = { 6 }; |
| 333 | const LowDwVfpRegister d7 = { 7 }; |
| 334 | const LowDwVfpRegister d8 = { 8 }; |
| 335 | const LowDwVfpRegister d9 = { 9 }; |
| 336 | const LowDwVfpRegister d10 = { 10 }; |
| 337 | const LowDwVfpRegister d11 = { 11 }; |
| 338 | const LowDwVfpRegister d12 = { 12 }; |
| 339 | const LowDwVfpRegister d13 = { 13 }; |
| 340 | const LowDwVfpRegister d14 = { 14 }; |
| 341 | const LowDwVfpRegister d15 = { 15 }; |
| 342 | const DwVfpRegister d16 = { 16 }; |
| 343 | const DwVfpRegister d17 = { 17 }; |
| 344 | const DwVfpRegister d18 = { 18 }; |
| 345 | const DwVfpRegister d19 = { 19 }; |
| 346 | const DwVfpRegister d20 = { 20 }; |
| 347 | const DwVfpRegister d21 = { 21 }; |
| 348 | const DwVfpRegister d22 = { 22 }; |
| 349 | const DwVfpRegister d23 = { 23 }; |
| 350 | const DwVfpRegister d24 = { 24 }; |
| 351 | const DwVfpRegister d25 = { 25 }; |
| 352 | const DwVfpRegister d26 = { 26 }; |
| 353 | const DwVfpRegister d27 = { 27 }; |
| 354 | const DwVfpRegister d28 = { 28 }; |
| 355 | const DwVfpRegister d29 = { 29 }; |
| 356 | const DwVfpRegister d30 = { 30 }; |
| 357 | const DwVfpRegister d31 = { 31 }; |
| 358 | |
| 359 | const QwNeonRegister q0 = { 0 }; |
| 360 | const QwNeonRegister q1 = { 1 }; |
| 361 | const QwNeonRegister q2 = { 2 }; |
| 362 | const QwNeonRegister q3 = { 3 }; |
| 363 | const QwNeonRegister q4 = { 4 }; |
| 364 | const QwNeonRegister q5 = { 5 }; |
| 365 | const QwNeonRegister q6 = { 6 }; |
| 366 | const QwNeonRegister q7 = { 7 }; |
| 367 | const QwNeonRegister q8 = { 8 }; |
| 368 | const QwNeonRegister q9 = { 9 }; |
| 369 | const QwNeonRegister q10 = { 10 }; |
| 370 | const QwNeonRegister q11 = { 11 }; |
| 371 | const QwNeonRegister q12 = { 12 }; |
| 372 | const QwNeonRegister q13 = { 13 }; |
| 373 | const QwNeonRegister q14 = { 14 }; |
| 374 | const QwNeonRegister q15 = { 15 }; |
| 375 | |
Leon Clarke | e46be81 | 2010-01-19 14:06:41 +0000 | [diff] [blame] | 376 | |
Ben Murdoch | 3ef787d | 2012-04-12 10:51:47 +0100 | [diff] [blame] | 377 | // Aliases for double registers. Defined using #define instead of |
| 378 | // "static const DwVfpRegister&" because Clang complains otherwise when a |
| 379 | // compilation unit that includes this header doesn't use the variables. |
| 380 | #define kFirstCalleeSavedDoubleReg d8 |
| 381 | #define kLastCalleeSavedDoubleReg d15 |
| 382 | #define kDoubleRegZero d14 |
| 383 | #define kScratchDoubleReg d15 |
Ben Murdoch | 7d3e7fc | 2011-07-12 16:37:06 +0100 | [diff] [blame] | 384 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 385 | |
| 386 | // Coprocessor register |
| 387 | struct CRegister { |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 388 | bool is_valid() const { return 0 <= reg_code && reg_code < 16; } |
| 389 | bool is(CRegister creg) const { return reg_code == creg.reg_code; } |
Kristian Monsen | 0d5e116 | 2010-09-30 15:31:59 +0100 | [diff] [blame] | 390 | int code() const { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 391 | DCHECK(is_valid()); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 392 | return reg_code; |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 393 | } |
Kristian Monsen | 0d5e116 | 2010-09-30 15:31:59 +0100 | [diff] [blame] | 394 | int bit() const { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 395 | DCHECK(is_valid()); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 396 | return 1 << reg_code; |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 397 | } |
| 398 | |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 399 | // Unfortunately we can't make this private in a struct. |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 400 | int reg_code; |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 401 | }; |
| 402 | |
| 403 | |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 404 | const CRegister no_creg = { -1 }; |
| 405 | |
| 406 | const CRegister cr0 = { 0 }; |
| 407 | const CRegister cr1 = { 1 }; |
| 408 | const CRegister cr2 = { 2 }; |
| 409 | const CRegister cr3 = { 3 }; |
| 410 | const CRegister cr4 = { 4 }; |
| 411 | const CRegister cr5 = { 5 }; |
| 412 | const CRegister cr6 = { 6 }; |
| 413 | const CRegister cr7 = { 7 }; |
| 414 | const CRegister cr8 = { 8 }; |
| 415 | const CRegister cr9 = { 9 }; |
| 416 | const CRegister cr10 = { 10 }; |
| 417 | const CRegister cr11 = { 11 }; |
| 418 | const CRegister cr12 = { 12 }; |
| 419 | const CRegister cr13 = { 13 }; |
| 420 | const CRegister cr14 = { 14 }; |
| 421 | const CRegister cr15 = { 15 }; |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 422 | |
| 423 | |
| 424 | // Coprocessor number |
| 425 | enum Coprocessor { |
| 426 | p0 = 0, |
| 427 | p1 = 1, |
| 428 | p2 = 2, |
| 429 | p3 = 3, |
| 430 | p4 = 4, |
| 431 | p5 = 5, |
| 432 | p6 = 6, |
| 433 | p7 = 7, |
| 434 | p8 = 8, |
| 435 | p9 = 9, |
| 436 | p10 = 10, |
| 437 | p11 = 11, |
| 438 | p12 = 12, |
| 439 | p13 = 13, |
| 440 | p14 = 14, |
| 441 | p15 = 15 |
| 442 | }; |
| 443 | |
| 444 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 445 | // ----------------------------------------------------------------------------- |
| 446 | // Machine instruction Operands |
| 447 | |
| 448 | // Class Operand represents a shifter operand in data processing instructions |
| 449 | class Operand BASE_EMBEDDED { |
| 450 | public: |
| 451 | // immediate |
| 452 | INLINE(explicit Operand(int32_t immediate, |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 453 | RelocInfo::Mode rmode = RelocInfo::NONE32)); |
Ben Murdoch | 69a99ed | 2011-11-30 16:03:39 +0000 | [diff] [blame] | 454 | INLINE(static Operand Zero()) { |
| 455 | return Operand(static_cast<int32_t>(0)); |
| 456 | } |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 457 | INLINE(explicit Operand(const ExternalReference& f)); |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 458 | explicit Operand(Handle<Object> handle); |
| 459 | INLINE(explicit Operand(Smi* value)); |
| 460 | |
| 461 | // rm |
| 462 | INLINE(explicit Operand(Register rm)); |
| 463 | |
| 464 | // rm <shift_op> shift_imm |
| 465 | explicit Operand(Register rm, ShiftOp shift_op, int shift_imm); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 466 | INLINE(static Operand SmiUntag(Register rm)) { |
| 467 | return Operand(rm, ASR, kSmiTagSize); |
| 468 | } |
| 469 | INLINE(static Operand PointerOffsetFromSmiKey(Register key)) { |
| 470 | STATIC_ASSERT(kSmiTag == 0 && kSmiTagSize < kPointerSizeLog2); |
| 471 | return Operand(key, LSL, kPointerSizeLog2 - kSmiTagSize); |
| 472 | } |
| 473 | INLINE(static Operand DoubleOffsetFromSmiKey(Register key)) { |
| 474 | STATIC_ASSERT(kSmiTag == 0 && kSmiTagSize < kDoubleSizeLog2); |
| 475 | return Operand(key, LSL, kDoubleSizeLog2 - kSmiTagSize); |
| 476 | } |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 477 | |
| 478 | // rm <shift_op> rs |
| 479 | explicit Operand(Register rm, ShiftOp shift_op, Register rs); |
| 480 | |
| 481 | // Return true if this is a register operand. |
| 482 | INLINE(bool is_reg() const); |
| 483 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 484 | // Return the number of actual instructions required to implement the given |
| 485 | // instruction for this particular operand. This can be a single instruction, |
| 486 | // if no load into the ip register is necessary, or anything between 2 and 4 |
| 487 | // instructions when we need to load from the constant pool (depending upon |
| 488 | // whether the constant pool entry is in the small or extended section). If |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 489 | // the instruction this operand is used for is a MOV or MVN instruction the |
| 490 | // actual instruction to use is required for this calculation. For other |
| 491 | // instructions instr is ignored. |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 492 | // |
| 493 | // The value returned is only valid as long as no entries are added to the |
| 494 | // constant pool between this call and the actual instruction being emitted. |
| 495 | int instructions_required(const Assembler* assembler, Instr instr = 0) const; |
| 496 | bool must_output_reloc_info(const Assembler* assembler) const; |
Kristian Monsen | 9dcf7e2 | 2010-06-28 14:14:28 +0100 | [diff] [blame] | 497 | |
| 498 | inline int32_t immediate() const { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 499 | DCHECK(!rm_.is_valid()); |
Kristian Monsen | 9dcf7e2 | 2010-06-28 14:14:28 +0100 | [diff] [blame] | 500 | return imm32_; |
| 501 | } |
| 502 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 503 | Register rm() const { return rm_; } |
Kristian Monsen | 50ef84f | 2010-07-29 15:18:00 +0100 | [diff] [blame] | 504 | Register rs() const { return rs_; } |
| 505 | ShiftOp shift_op() const { return shift_op_; } |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 506 | |
| 507 | private: |
| 508 | Register rm_; |
| 509 | Register rs_; |
| 510 | ShiftOp shift_op_; |
| 511 | int shift_imm_; // valid if rm_ != no_reg && rs_ == no_reg |
| 512 | int32_t imm32_; // valid if rm_ == no_reg |
| 513 | RelocInfo::Mode rmode_; |
| 514 | |
| 515 | friend class Assembler; |
| 516 | }; |
| 517 | |
| 518 | |
| 519 | // Class MemOperand represents a memory operand in load and store instructions |
| 520 | class MemOperand BASE_EMBEDDED { |
| 521 | public: |
| 522 | // [rn +/- offset] Offset/NegOffset |
| 523 | // [rn +/- offset]! PreIndex/NegPreIndex |
| 524 | // [rn], +/- offset PostIndex/NegPostIndex |
| 525 | // offset is any signed 32-bit value; offset is first loaded to register ip if |
| 526 | // it does not fit the addressing mode (12-bit unsigned and sign bit) |
| 527 | explicit MemOperand(Register rn, int32_t offset = 0, AddrMode am = Offset); |
| 528 | |
| 529 | // [rn +/- rm] Offset/NegOffset |
| 530 | // [rn +/- rm]! PreIndex/NegPreIndex |
| 531 | // [rn], +/- rm PostIndex/NegPostIndex |
| 532 | explicit MemOperand(Register rn, Register rm, AddrMode am = Offset); |
| 533 | |
| 534 | // [rn +/- rm <shift_op> shift_imm] Offset/NegOffset |
| 535 | // [rn +/- rm <shift_op> shift_imm]! PreIndex/NegPreIndex |
| 536 | // [rn], +/- rm <shift_op> shift_imm PostIndex/NegPostIndex |
| 537 | explicit MemOperand(Register rn, Register rm, |
| 538 | ShiftOp shift_op, int shift_imm, AddrMode am = Offset); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 539 | INLINE(static MemOperand PointerAddressFromSmiKey(Register array, |
| 540 | Register key, |
| 541 | AddrMode am = Offset)) { |
| 542 | STATIC_ASSERT(kSmiTag == 0 && kSmiTagSize < kPointerSizeLog2); |
| 543 | return MemOperand(array, key, LSL, kPointerSizeLog2 - kSmiTagSize, am); |
| 544 | } |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 545 | |
Kristian Monsen | 25f6136 | 2010-05-21 11:50:48 +0100 | [diff] [blame] | 546 | void set_offset(int32_t offset) { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 547 | DCHECK(rm_.is(no_reg)); |
Kristian Monsen | 25f6136 | 2010-05-21 11:50:48 +0100 | [diff] [blame] | 548 | offset_ = offset; |
| 549 | } |
| 550 | |
Ben Murdoch | e0cee9b | 2011-05-25 10:26:03 +0100 | [diff] [blame] | 551 | uint32_t offset() const { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 552 | DCHECK(rm_.is(no_reg)); |
Kristian Monsen | 25f6136 | 2010-05-21 11:50:48 +0100 | [diff] [blame] | 553 | return offset_; |
| 554 | } |
| 555 | |
Leon Clarke | f7060e2 | 2010-06-03 12:02:55 +0100 | [diff] [blame] | 556 | Register rn() const { return rn_; } |
| 557 | Register rm() const { return rm_; } |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 558 | AddrMode am() const { return am_; } |
Kristian Monsen | 25f6136 | 2010-05-21 11:50:48 +0100 | [diff] [blame] | 559 | |
Ben Murdoch | e0cee9b | 2011-05-25 10:26:03 +0100 | [diff] [blame] | 560 | bool OffsetIsUint12Encodable() const { |
| 561 | return offset_ >= 0 ? is_uint12(offset_) : is_uint12(-offset_); |
| 562 | } |
| 563 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 564 | private: |
| 565 | Register rn_; // base |
| 566 | Register rm_; // register offset |
| 567 | int32_t offset_; // valid if rm_ == no_reg |
| 568 | ShiftOp shift_op_; |
| 569 | int shift_imm_; // valid if rm_ != no_reg && rs_ == no_reg |
| 570 | AddrMode am_; // bits P, U, and W |
| 571 | |
| 572 | friend class Assembler; |
| 573 | }; |
| 574 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 575 | |
| 576 | // Class NeonMemOperand represents a memory operand in load and |
| 577 | // store NEON instructions |
| 578 | class NeonMemOperand BASE_EMBEDDED { |
Steve Block | d0582a6 | 2009-12-15 09:54:21 +0000 | [diff] [blame] | 579 | public: |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 580 | // [rn {:align}] Offset |
| 581 | // [rn {:align}]! PostIndex |
| 582 | explicit NeonMemOperand(Register rn, AddrMode am = Offset, int align = 0); |
Steve Block | d0582a6 | 2009-12-15 09:54:21 +0000 | [diff] [blame] | 583 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 584 | // [rn {:align}], rm PostIndex |
| 585 | explicit NeonMemOperand(Register rn, Register rm, int align = 0); |
Steve Block | d0582a6 | 2009-12-15 09:54:21 +0000 | [diff] [blame] | 586 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 587 | Register rn() const { return rn_; } |
| 588 | Register rm() const { return rm_; } |
| 589 | int align() const { return align_; } |
Ben Murdoch | 8b112d2 | 2011-06-08 16:22:53 +0100 | [diff] [blame] | 590 | |
Steve Block | d0582a6 | 2009-12-15 09:54:21 +0000 | [diff] [blame] | 591 | private: |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 592 | void SetAlignment(int align); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 593 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 594 | Register rn_; // base |
| 595 | Register rm_; // register increment |
| 596 | int align_; |
Steve Block | d0582a6 | 2009-12-15 09:54:21 +0000 | [diff] [blame] | 597 | }; |
| 598 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 599 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 600 | // Class NeonListOperand represents a list of NEON registers |
| 601 | class NeonListOperand BASE_EMBEDDED { |
| 602 | public: |
| 603 | explicit NeonListOperand(DoubleRegister base, int registers_count = 1); |
| 604 | DoubleRegister base() const { return base_; } |
| 605 | NeonListType type() const { return type_; } |
| 606 | private: |
| 607 | DoubleRegister base_; |
| 608 | NeonListType type_; |
| 609 | }; |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 610 | |
Steve Block | 1e0659c | 2011-05-24 12:43:12 +0100 | [diff] [blame] | 611 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 612 | struct VmovIndex { |
| 613 | unsigned char index; |
| 614 | }; |
| 615 | const VmovIndex VmovIndexLo = { 0 }; |
| 616 | const VmovIndex VmovIndexHi = { 1 }; |
Steve Block | 1e0659c | 2011-05-24 12:43:12 +0100 | [diff] [blame] | 617 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 618 | class Assembler : public AssemblerBase { |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 619 | public: |
| 620 | // Create an assembler. Instructions and relocation information are emitted |
| 621 | // into a buffer, with the instructions starting from the beginning and the |
| 622 | // relocation information starting from the end of the buffer. See CodeDesc |
| 623 | // for a detailed comment on the layout (globals.h). |
| 624 | // |
| 625 | // If the provided buffer is NULL, the assembler allocates and grows its own |
| 626 | // buffer, and buffer_size determines the initial buffer size. The buffer is |
| 627 | // owned by the assembler and deallocated upon destruction of the assembler. |
| 628 | // |
| 629 | // If the provided buffer is not NULL, the assembler uses the provided buffer |
| 630 | // for code generation and assumes its size to be buffer_size. If the buffer |
| 631 | // is too small, a fatal error occurs. No deallocation of the buffer is done |
| 632 | // upon destruction of the assembler. |
Ben Murdoch | 8b112d2 | 2011-06-08 16:22:53 +0100 | [diff] [blame] | 633 | Assembler(Isolate* isolate, void* buffer, int buffer_size); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 634 | virtual ~Assembler(); |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 635 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 636 | // GetCode emits any pending (non-emitted) code and fills the descriptor |
| 637 | // desc. GetCode() is idempotent; it returns the same result if no other |
| 638 | // Assembler functions are invoked in between GetCode() calls. |
| 639 | void GetCode(CodeDesc* desc); |
| 640 | |
| 641 | // Label operations & relative jumps (PPUM Appendix D) |
| 642 | // |
| 643 | // Takes a branch opcode (cc) and a label (L) and generates |
| 644 | // either a backward branch or a forward branch and links it |
| 645 | // to the label fixup chain. Usage: |
| 646 | // |
| 647 | // Label L; // unbound label |
| 648 | // j(cc, &L); // forward branch to unbound label |
| 649 | // bind(&L); // bind label to the current pc |
| 650 | // j(cc, &L); // backward branch to bound label |
| 651 | // bind(&L); // illegal: a label may be bound only once |
| 652 | // |
| 653 | // Note: The same Label can be used for forward and backward branches |
| 654 | // but it may be bound only once. |
| 655 | |
| 656 | void bind(Label* L); // binds an unbound label L to the current code position |
| 657 | |
| 658 | // Returns the branch offset to the given label from the current code position |
| 659 | // Links the label to the current position if it is still unbound |
| 660 | // Manages the jump elimination optimization if the second parameter is true. |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 661 | int branch_offset(Label* L); |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 662 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 663 | // Returns true if the given pc address is the start of a constant pool load |
| 664 | // instruction sequence. |
| 665 | INLINE(static bool is_constant_pool_load(Address pc)); |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 666 | |
| 667 | // Return the address in the constant pool of the code target address used by |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 668 | // the branch/call instruction at pc, or the object in a mov. |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 669 | INLINE(static Address constant_pool_entry_address(Address pc, |
| 670 | Address constant_pool)); |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 671 | |
| 672 | // Read/Modify the code target address in the branch/call instruction at pc. |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 673 | INLINE(static Address target_address_at(Address pc, Address constant_pool)); |
| 674 | INLINE(static void set_target_address_at( |
| 675 | Isolate* isolate, Address pc, Address constant_pool, Address target, |
| 676 | ICacheFlushMode icache_flush_mode = FLUSH_ICACHE_IF_NEEDED)); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 677 | INLINE(static Address target_address_at(Address pc, Code* code)) { |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 678 | Address constant_pool = code ? code->constant_pool() : NULL; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 679 | return target_address_at(pc, constant_pool); |
| 680 | } |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 681 | INLINE(static void set_target_address_at( |
| 682 | Isolate* isolate, Address pc, Code* code, Address target, |
| 683 | ICacheFlushMode icache_flush_mode = FLUSH_ICACHE_IF_NEEDED)) { |
| 684 | Address constant_pool = code ? code->constant_pool() : NULL; |
| 685 | set_target_address_at(isolate, pc, constant_pool, target, |
| 686 | icache_flush_mode); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 687 | } |
| 688 | |
| 689 | // Return the code target address at a call site from the return address |
| 690 | // of that call in the instruction stream. |
| 691 | INLINE(static Address target_address_from_return_address(Address pc)); |
| 692 | |
| 693 | // Given the address of the beginning of a call, return the address |
| 694 | // in the instruction stream that the call will return from. |
| 695 | INLINE(static Address return_address_from_call_start(Address pc)); |
| 696 | |
Steve Block | d0582a6 | 2009-12-15 09:54:21 +0000 | [diff] [blame] | 697 | // This sets the branch destination (which is in the constant pool on ARM). |
| 698 | // This is for calls and branches within generated code. |
Ben Murdoch | 3ef787d | 2012-04-12 10:51:47 +0100 | [diff] [blame] | 699 | inline static void deserialization_set_special_target_at( |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 700 | Isolate* isolate, Address constant_pool_entry, Code* code, |
| 701 | Address target); |
| 702 | |
| 703 | // This sets the internal reference at the pc. |
| 704 | inline static void deserialization_set_target_internal_reference_at( |
| 705 | Isolate* isolate, Address pc, Address target, |
| 706 | RelocInfo::Mode mode = RelocInfo::INTERNAL_REFERENCE); |
Steve Block | d0582a6 | 2009-12-15 09:54:21 +0000 | [diff] [blame] | 707 | |
| 708 | // Here we are patching the address in the constant pool, not the actual call |
| 709 | // instruction. The address in the constant pool is the same size as a |
| 710 | // pointer. |
Ben Murdoch | 3ef787d | 2012-04-12 10:51:47 +0100 | [diff] [blame] | 711 | static const int kSpecialTargetSize = kPointerSize; |
Steve Block | d0582a6 | 2009-12-15 09:54:21 +0000 | [diff] [blame] | 712 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 713 | // Size of an instruction. |
| 714 | static const int kInstrSize = sizeof(Instr); |
| 715 | |
Ben Murdoch | 7f4d5bd | 2010-06-15 11:15:29 +0100 | [diff] [blame] | 716 | // Distance between start of patched debug break slot and the emitted address |
| 717 | // to jump to. |
Ben Murdoch | 7f4d5bd | 2010-06-15 11:15:29 +0100 | [diff] [blame] | 718 | // Patched debug break slot code is: |
| 719 | // ldr ip, [pc, #0] @ emited address and start |
| 720 | // blx ip |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 721 | static const int kPatchDebugBreakSlotAddressOffset = 2 * kInstrSize; |
Ben Murdoch | 7f4d5bd | 2010-06-15 11:15:29 +0100 | [diff] [blame] | 722 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 723 | // Difference between address of current opcode and value read from pc |
| 724 | // register. |
| 725 | static const int kPcLoadDelta = 8; |
| 726 | |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 727 | static const int kDebugBreakSlotInstructions = 4; |
Ben Murdoch | 7f4d5bd | 2010-06-15 11:15:29 +0100 | [diff] [blame] | 728 | static const int kDebugBreakSlotLength = |
| 729 | kDebugBreakSlotInstructions * kInstrSize; |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 730 | |
| 731 | // --------------------------------------------------------------------------- |
| 732 | // Code generation |
| 733 | |
| 734 | // Insert the smallest number of nop instructions |
| 735 | // possible to align the pc offset to a multiple |
| 736 | // of m. m must be a power of 2 (>= 4). |
| 737 | void Align(int m); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 738 | // Insert the smallest number of zero bytes possible to align the pc offset |
| 739 | // to a mulitple of m. m must be a power of 2 (>= 2). |
| 740 | void DataAlign(int m); |
Kristian Monsen | 9dcf7e2 | 2010-06-28 14:14:28 +0100 | [diff] [blame] | 741 | // Aligns code to something that's optimal for a jump target for the platform. |
| 742 | void CodeTargetAlign(); |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 743 | |
| 744 | // Branch instructions |
| 745 | void b(int branch_offset, Condition cond = al); |
| 746 | void bl(int branch_offset, Condition cond = al); |
| 747 | void blx(int branch_offset); // v5 and above |
| 748 | void blx(Register target, Condition cond = al); // v5 and above |
| 749 | void bx(Register target, Condition cond = al); // v5 and above, plus v4t |
| 750 | |
| 751 | // Convenience branch instructions using labels |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 752 | void b(Label* L, Condition cond = al); |
| 753 | void b(Condition cond, Label* L) { b(L, cond); } |
| 754 | void bl(Label* L, Condition cond = al); |
| 755 | void bl(Condition cond, Label* L) { bl(L, cond); } |
| 756 | void blx(Label* L); // v5 and above |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 757 | |
| 758 | // Data-processing instructions |
Andrei Popescu | 3100271 | 2010-02-23 13:46:05 +0000 | [diff] [blame] | 759 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 760 | void and_(Register dst, Register src1, const Operand& src2, |
| 761 | SBit s = LeaveCC, Condition cond = al); |
| 762 | |
| 763 | void eor(Register dst, Register src1, const Operand& src2, |
| 764 | SBit s = LeaveCC, Condition cond = al); |
| 765 | |
| 766 | void sub(Register dst, Register src1, const Operand& src2, |
| 767 | SBit s = LeaveCC, Condition cond = al); |
| 768 | void sub(Register dst, Register src1, Register src2, |
| 769 | SBit s = LeaveCC, Condition cond = al) { |
| 770 | sub(dst, src1, Operand(src2), s, cond); |
| 771 | } |
| 772 | |
| 773 | void rsb(Register dst, Register src1, const Operand& src2, |
| 774 | SBit s = LeaveCC, Condition cond = al); |
| 775 | |
| 776 | void add(Register dst, Register src1, const Operand& src2, |
| 777 | SBit s = LeaveCC, Condition cond = al); |
Ben Murdoch | 7f4d5bd | 2010-06-15 11:15:29 +0100 | [diff] [blame] | 778 | void add(Register dst, Register src1, Register src2, |
| 779 | SBit s = LeaveCC, Condition cond = al) { |
| 780 | add(dst, src1, Operand(src2), s, cond); |
| 781 | } |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 782 | |
| 783 | void adc(Register dst, Register src1, const Operand& src2, |
| 784 | SBit s = LeaveCC, Condition cond = al); |
| 785 | |
| 786 | void sbc(Register dst, Register src1, const Operand& src2, |
| 787 | SBit s = LeaveCC, Condition cond = al); |
| 788 | |
| 789 | void rsc(Register dst, Register src1, const Operand& src2, |
| 790 | SBit s = LeaveCC, Condition cond = al); |
| 791 | |
| 792 | void tst(Register src1, const Operand& src2, Condition cond = al); |
| 793 | void tst(Register src1, Register src2, Condition cond = al) { |
| 794 | tst(src1, Operand(src2), cond); |
| 795 | } |
| 796 | |
| 797 | void teq(Register src1, const Operand& src2, Condition cond = al); |
| 798 | |
| 799 | void cmp(Register src1, const Operand& src2, Condition cond = al); |
| 800 | void cmp(Register src1, Register src2, Condition cond = al) { |
| 801 | cmp(src1, Operand(src2), cond); |
| 802 | } |
Steve Block | 1e0659c | 2011-05-24 12:43:12 +0100 | [diff] [blame] | 803 | void cmp_raw_immediate(Register src1, int raw_immediate, Condition cond = al); |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 804 | |
| 805 | void cmn(Register src1, const Operand& src2, Condition cond = al); |
| 806 | |
| 807 | void orr(Register dst, Register src1, const Operand& src2, |
| 808 | SBit s = LeaveCC, Condition cond = al); |
| 809 | void orr(Register dst, Register src1, Register src2, |
| 810 | SBit s = LeaveCC, Condition cond = al) { |
| 811 | orr(dst, src1, Operand(src2), s, cond); |
| 812 | } |
| 813 | |
| 814 | void mov(Register dst, const Operand& src, |
| 815 | SBit s = LeaveCC, Condition cond = al); |
| 816 | void mov(Register dst, Register src, SBit s = LeaveCC, Condition cond = al) { |
| 817 | mov(dst, Operand(src), s, cond); |
| 818 | } |
| 819 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 820 | // Load the position of the label relative to the generated code object |
| 821 | // pointer in a register. |
| 822 | void mov_label_offset(Register dst, Label* label); |
| 823 | |
Kristian Monsen | 9dcf7e2 | 2010-06-28 14:14:28 +0100 | [diff] [blame] | 824 | // ARMv7 instructions for loading a 32 bit immediate in two instructions. |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 825 | // The constant for movw and movt should be in the range 0-0xffff. |
Kristian Monsen | 9dcf7e2 | 2010-06-28 14:14:28 +0100 | [diff] [blame] | 826 | void movw(Register reg, uint32_t immediate, Condition cond = al); |
Kristian Monsen | 9dcf7e2 | 2010-06-28 14:14:28 +0100 | [diff] [blame] | 827 | void movt(Register reg, uint32_t immediate, Condition cond = al); |
| 828 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 829 | void bic(Register dst, Register src1, const Operand& src2, |
| 830 | SBit s = LeaveCC, Condition cond = al); |
| 831 | |
| 832 | void mvn(Register dst, const Operand& src, |
| 833 | SBit s = LeaveCC, Condition cond = al); |
| 834 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 835 | // Shift instructions |
| 836 | |
| 837 | void asr(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC, |
| 838 | Condition cond = al) { |
| 839 | if (src2.is_reg()) { |
| 840 | mov(dst, Operand(src1, ASR, src2.rm()), s, cond); |
| 841 | } else { |
| 842 | mov(dst, Operand(src1, ASR, src2.immediate()), s, cond); |
| 843 | } |
| 844 | } |
| 845 | |
| 846 | void lsl(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC, |
| 847 | Condition cond = al) { |
| 848 | if (src2.is_reg()) { |
| 849 | mov(dst, Operand(src1, LSL, src2.rm()), s, cond); |
| 850 | } else { |
| 851 | mov(dst, Operand(src1, LSL, src2.immediate()), s, cond); |
| 852 | } |
| 853 | } |
| 854 | |
| 855 | void lsr(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC, |
| 856 | Condition cond = al) { |
| 857 | if (src2.is_reg()) { |
| 858 | mov(dst, Operand(src1, LSR, src2.rm()), s, cond); |
| 859 | } else { |
| 860 | mov(dst, Operand(src1, LSR, src2.immediate()), s, cond); |
| 861 | } |
| 862 | } |
| 863 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 864 | // Multiply instructions |
| 865 | |
| 866 | void mla(Register dst, Register src1, Register src2, Register srcA, |
| 867 | SBit s = LeaveCC, Condition cond = al); |
| 868 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 869 | void mls(Register dst, Register src1, Register src2, Register srcA, |
| 870 | Condition cond = al); |
| 871 | |
| 872 | void sdiv(Register dst, Register src1, Register src2, |
| 873 | Condition cond = al); |
| 874 | |
| 875 | void udiv(Register dst, Register src1, Register src2, Condition cond = al); |
| 876 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 877 | void mul(Register dst, Register src1, Register src2, |
| 878 | SBit s = LeaveCC, Condition cond = al); |
| 879 | |
Emily Bernier | d0a1eb7 | 2015-03-24 16:35:39 -0400 | [diff] [blame] | 880 | void smmla(Register dst, Register src1, Register src2, Register srcA, |
| 881 | Condition cond = al); |
| 882 | |
| 883 | void smmul(Register dst, Register src1, Register src2, Condition cond = al); |
| 884 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 885 | void smlal(Register dstL, Register dstH, Register src1, Register src2, |
| 886 | SBit s = LeaveCC, Condition cond = al); |
| 887 | |
| 888 | void smull(Register dstL, Register dstH, Register src1, Register src2, |
| 889 | SBit s = LeaveCC, Condition cond = al); |
| 890 | |
| 891 | void umlal(Register dstL, Register dstH, Register src1, Register src2, |
| 892 | SBit s = LeaveCC, Condition cond = al); |
| 893 | |
| 894 | void umull(Register dstL, Register dstH, Register src1, Register src2, |
| 895 | SBit s = LeaveCC, Condition cond = al); |
| 896 | |
| 897 | // Miscellaneous arithmetic instructions |
| 898 | |
| 899 | void clz(Register dst, Register src, Condition cond = al); // v5 and above |
| 900 | |
Kristian Monsen | 50ef84f | 2010-07-29 15:18:00 +0100 | [diff] [blame] | 901 | // Saturating instructions. v6 and above. |
| 902 | |
| 903 | // Unsigned saturate. |
| 904 | // |
| 905 | // Saturate an optionally shifted signed value to an unsigned range. |
| 906 | // |
| 907 | // usat dst, #satpos, src |
| 908 | // usat dst, #satpos, src, lsl #sh |
| 909 | // usat dst, #satpos, src, asr #sh |
| 910 | // |
| 911 | // Register dst will contain: |
| 912 | // |
| 913 | // 0, if s < 0 |
| 914 | // (1 << satpos) - 1, if s > ((1 << satpos) - 1) |
| 915 | // s, otherwise |
| 916 | // |
| 917 | // where s is the contents of src after shifting (if used.) |
| 918 | void usat(Register dst, int satpos, const Operand& src, Condition cond = al); |
| 919 | |
Ben Murdoch | 7f4d5bd | 2010-06-15 11:15:29 +0100 | [diff] [blame] | 920 | // Bitfield manipulation instructions. v7 and above. |
| 921 | |
| 922 | void ubfx(Register dst, Register src, int lsb, int width, |
| 923 | Condition cond = al); |
| 924 | |
| 925 | void sbfx(Register dst, Register src, int lsb, int width, |
| 926 | Condition cond = al); |
| 927 | |
| 928 | void bfc(Register dst, int lsb, int width, Condition cond = al); |
| 929 | |
| 930 | void bfi(Register dst, Register src, int lsb, int width, |
| 931 | Condition cond = al); |
| 932 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 933 | void pkhbt(Register dst, Register src1, const Operand& src2, |
| 934 | Condition cond = al); |
| 935 | |
| 936 | void pkhtb(Register dst, Register src1, const Operand& src2, |
| 937 | Condition cond = al); |
| 938 | |
Emily Bernier | d0a1eb7 | 2015-03-24 16:35:39 -0400 | [diff] [blame] | 939 | void sxtb(Register dst, Register src, int rotate = 0, Condition cond = al); |
| 940 | void sxtab(Register dst, Register src1, Register src2, int rotate = 0, |
| 941 | Condition cond = al); |
| 942 | void sxth(Register dst, Register src, int rotate = 0, Condition cond = al); |
| 943 | void sxtah(Register dst, Register src1, Register src2, int rotate = 0, |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 944 | Condition cond = al); |
| 945 | |
Emily Bernier | d0a1eb7 | 2015-03-24 16:35:39 -0400 | [diff] [blame] | 946 | void uxtb(Register dst, Register src, int rotate = 0, Condition cond = al); |
| 947 | void uxtab(Register dst, Register src1, Register src2, int rotate = 0, |
| 948 | Condition cond = al); |
| 949 | void uxtb16(Register dst, Register src, int rotate = 0, Condition cond = al); |
| 950 | void uxth(Register dst, Register src, int rotate = 0, Condition cond = al); |
| 951 | void uxtah(Register dst, Register src1, Register src2, int rotate = 0, |
| 952 | Condition cond = al); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 953 | |
Ben Murdoch | 097c5b2 | 2016-05-18 11:27:45 +0100 | [diff] [blame] | 954 | // Reverse the bits in a register. |
| 955 | void rbit(Register dst, Register src, Condition cond = al); |
| 956 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 957 | // Status register access instructions |
| 958 | |
| 959 | void mrs(Register dst, SRegister s, Condition cond = al); |
| 960 | void msr(SRegisterFieldMask fields, const Operand& src, Condition cond = al); |
| 961 | |
| 962 | // Load/Store instructions |
| 963 | void ldr(Register dst, const MemOperand& src, Condition cond = al); |
| 964 | void str(Register src, const MemOperand& dst, Condition cond = al); |
| 965 | void ldrb(Register dst, const MemOperand& src, Condition cond = al); |
| 966 | void strb(Register src, const MemOperand& dst, Condition cond = al); |
| 967 | void ldrh(Register dst, const MemOperand& src, Condition cond = al); |
| 968 | void strh(Register src, const MemOperand& dst, Condition cond = al); |
| 969 | void ldrsb(Register dst, const MemOperand& src, Condition cond = al); |
| 970 | void ldrsh(Register dst, const MemOperand& src, Condition cond = al); |
Leon Clarke | f7060e2 | 2010-06-03 12:02:55 +0100 | [diff] [blame] | 971 | void ldrd(Register dst1, |
| 972 | Register dst2, |
| 973 | const MemOperand& src, Condition cond = al); |
| 974 | void strd(Register src1, |
| 975 | Register src2, |
| 976 | const MemOperand& dst, Condition cond = al); |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 977 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 978 | // Preload instructions |
| 979 | void pld(const MemOperand& address); |
| 980 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 981 | // Load/Store multiple instructions |
| 982 | void ldm(BlockAddrMode am, Register base, RegList dst, Condition cond = al); |
| 983 | void stm(BlockAddrMode am, Register base, RegList src, Condition cond = al); |
| 984 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 985 | // Exception-generating instructions and debugging support |
Teng-Hui Zhu | 3e5fa29 | 2010-11-09 16:16:48 -0800 | [diff] [blame] | 986 | void stop(const char* msg, |
| 987 | Condition cond = al, |
| 988 | int32_t code = kDefaultStopCode); |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 989 | |
| 990 | void bkpt(uint32_t imm16); // v5 and above |
Teng-Hui Zhu | 3e5fa29 | 2010-11-09 16:16:48 -0800 | [diff] [blame] | 991 | void svc(uint32_t imm24, Condition cond = al); |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 992 | |
Ben Murdoch | 097c5b2 | 2016-05-18 11:27:45 +0100 | [diff] [blame] | 993 | // Synchronization instructions |
| 994 | void dmb(BarrierOption option); |
| 995 | void dsb(BarrierOption option); |
| 996 | void isb(BarrierOption option); |
| 997 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 998 | // Coprocessor instructions |
| 999 | |
| 1000 | void cdp(Coprocessor coproc, int opcode_1, |
| 1001 | CRegister crd, CRegister crn, CRegister crm, |
| 1002 | int opcode_2, Condition cond = al); |
| 1003 | |
| 1004 | void cdp2(Coprocessor coproc, int opcode_1, |
| 1005 | CRegister crd, CRegister crn, CRegister crm, |
| 1006 | int opcode_2); // v5 and above |
| 1007 | |
| 1008 | void mcr(Coprocessor coproc, int opcode_1, |
| 1009 | Register rd, CRegister crn, CRegister crm, |
| 1010 | int opcode_2 = 0, Condition cond = al); |
| 1011 | |
| 1012 | void mcr2(Coprocessor coproc, int opcode_1, |
| 1013 | Register rd, CRegister crn, CRegister crm, |
| 1014 | int opcode_2 = 0); // v5 and above |
| 1015 | |
| 1016 | void mrc(Coprocessor coproc, int opcode_1, |
| 1017 | Register rd, CRegister crn, CRegister crm, |
| 1018 | int opcode_2 = 0, Condition cond = al); |
| 1019 | |
| 1020 | void mrc2(Coprocessor coproc, int opcode_1, |
| 1021 | Register rd, CRegister crn, CRegister crm, |
| 1022 | int opcode_2 = 0); // v5 and above |
| 1023 | |
| 1024 | void ldc(Coprocessor coproc, CRegister crd, const MemOperand& src, |
| 1025 | LFlag l = Short, Condition cond = al); |
| 1026 | void ldc(Coprocessor coproc, CRegister crd, Register base, int option, |
| 1027 | LFlag l = Short, Condition cond = al); |
| 1028 | |
| 1029 | void ldc2(Coprocessor coproc, CRegister crd, const MemOperand& src, |
| 1030 | LFlag l = Short); // v5 and above |
| 1031 | void ldc2(Coprocessor coproc, CRegister crd, Register base, int option, |
| 1032 | LFlag l = Short); // v5 and above |
| 1033 | |
Steve Block | d0582a6 | 2009-12-15 09:54:21 +0000 | [diff] [blame] | 1034 | // Support for VFP. |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1035 | // All these APIs support S0 to S31 and D0 to D31. |
Steve Block | d0582a6 | 2009-12-15 09:54:21 +0000 | [diff] [blame] | 1036 | |
Leon Clarke | d91b9f7 | 2010-01-27 17:25:45 +0000 | [diff] [blame] | 1037 | void vldr(const DwVfpRegister dst, |
| 1038 | const Register base, |
Ben Murdoch | e0cee9b | 2011-05-25 10:26:03 +0100 | [diff] [blame] | 1039 | int offset, |
| 1040 | const Condition cond = al); |
| 1041 | void vldr(const DwVfpRegister dst, |
| 1042 | const MemOperand& src, |
Leon Clarke | d91b9f7 | 2010-01-27 17:25:45 +0000 | [diff] [blame] | 1043 | const Condition cond = al); |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1044 | |
| 1045 | void vldr(const SwVfpRegister dst, |
| 1046 | const Register base, |
Ben Murdoch | e0cee9b | 2011-05-25 10:26:03 +0100 | [diff] [blame] | 1047 | int offset, |
| 1048 | const Condition cond = al); |
| 1049 | void vldr(const SwVfpRegister dst, |
| 1050 | const MemOperand& src, |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1051 | const Condition cond = al); |
| 1052 | |
Leon Clarke | d91b9f7 | 2010-01-27 17:25:45 +0000 | [diff] [blame] | 1053 | void vstr(const DwVfpRegister src, |
| 1054 | const Register base, |
Ben Murdoch | e0cee9b | 2011-05-25 10:26:03 +0100 | [diff] [blame] | 1055 | int offset, |
| 1056 | const Condition cond = al); |
| 1057 | void vstr(const DwVfpRegister src, |
| 1058 | const MemOperand& dst, |
Leon Clarke | d91b9f7 | 2010-01-27 17:25:45 +0000 | [diff] [blame] | 1059 | const Condition cond = al); |
Steve Block | 8defd9f | 2010-07-08 12:39:36 +0100 | [diff] [blame] | 1060 | |
Iain Merrick | 7568138 | 2010-08-19 15:07:18 +0100 | [diff] [blame] | 1061 | void vstr(const SwVfpRegister src, |
| 1062 | const Register base, |
Ben Murdoch | e0cee9b | 2011-05-25 10:26:03 +0100 | [diff] [blame] | 1063 | int offset, |
| 1064 | const Condition cond = al); |
| 1065 | void vstr(const SwVfpRegister src, |
| 1066 | const MemOperand& dst, |
Iain Merrick | 7568138 | 2010-08-19 15:07:18 +0100 | [diff] [blame] | 1067 | const Condition cond = al); |
| 1068 | |
Ben Murdoch | 8b112d2 | 2011-06-08 16:22:53 +0100 | [diff] [blame] | 1069 | void vldm(BlockAddrMode am, |
| 1070 | Register base, |
| 1071 | DwVfpRegister first, |
| 1072 | DwVfpRegister last, |
| 1073 | Condition cond = al); |
| 1074 | |
| 1075 | void vstm(BlockAddrMode am, |
| 1076 | Register base, |
| 1077 | DwVfpRegister first, |
| 1078 | DwVfpRegister last, |
| 1079 | Condition cond = al); |
| 1080 | |
| 1081 | void vldm(BlockAddrMode am, |
| 1082 | Register base, |
| 1083 | SwVfpRegister first, |
| 1084 | SwVfpRegister last, |
| 1085 | Condition cond = al); |
| 1086 | |
| 1087 | void vstm(BlockAddrMode am, |
| 1088 | Register base, |
| 1089 | SwVfpRegister first, |
| 1090 | SwVfpRegister last, |
| 1091 | Condition cond = al); |
| 1092 | |
Emily Bernier | d0a1eb7 | 2015-03-24 16:35:39 -0400 | [diff] [blame] | 1093 | void vmov(const SwVfpRegister dst, float imm); |
Steve Block | 8defd9f | 2010-07-08 12:39:36 +0100 | [diff] [blame] | 1094 | void vmov(const DwVfpRegister dst, |
Ben Murdoch | 3bec4d2 | 2010-07-22 14:51:16 +0100 | [diff] [blame] | 1095 | double imm, |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1096 | const Register scratch = no_reg); |
Ben Murdoch | 3bec4d2 | 2010-07-22 14:51:16 +0100 | [diff] [blame] | 1097 | void vmov(const SwVfpRegister dst, |
| 1098 | const SwVfpRegister src, |
| 1099 | const Condition cond = al); |
| 1100 | void vmov(const DwVfpRegister dst, |
Steve Block | 8defd9f | 2010-07-08 12:39:36 +0100 | [diff] [blame] | 1101 | const DwVfpRegister src, |
| 1102 | const Condition cond = al); |
Leon Clarke | e46be81 | 2010-01-19 14:06:41 +0000 | [diff] [blame] | 1103 | void vmov(const DwVfpRegister dst, |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1104 | const VmovIndex index, |
| 1105 | const Register src, |
| 1106 | const Condition cond = al); |
| 1107 | void vmov(const Register dst, |
| 1108 | const VmovIndex index, |
| 1109 | const DwVfpRegister src, |
| 1110 | const Condition cond = al); |
| 1111 | void vmov(const DwVfpRegister dst, |
Leon Clarke | e46be81 | 2010-01-19 14:06:41 +0000 | [diff] [blame] | 1112 | const Register src1, |
Steve Block | d0582a6 | 2009-12-15 09:54:21 +0000 | [diff] [blame] | 1113 | const Register src2, |
Leon Clarke | e46be81 | 2010-01-19 14:06:41 +0000 | [diff] [blame] | 1114 | const Condition cond = al); |
| 1115 | void vmov(const Register dst1, |
| 1116 | const Register dst2, |
| 1117 | const DwVfpRegister src, |
| 1118 | const Condition cond = al); |
| 1119 | void vmov(const SwVfpRegister dst, |
| 1120 | const Register src, |
| 1121 | const Condition cond = al); |
| 1122 | void vmov(const Register dst, |
| 1123 | const SwVfpRegister src, |
| 1124 | const Condition cond = al); |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1125 | void vcvt_f64_s32(const DwVfpRegister dst, |
| 1126 | const SwVfpRegister src, |
Steve Block | 1e0659c | 2011-05-24 12:43:12 +0100 | [diff] [blame] | 1127 | VFPConversionMode mode = kDefaultRoundToZero, |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1128 | const Condition cond = al); |
| 1129 | void vcvt_f32_s32(const SwVfpRegister dst, |
| 1130 | const SwVfpRegister src, |
Steve Block | 1e0659c | 2011-05-24 12:43:12 +0100 | [diff] [blame] | 1131 | VFPConversionMode mode = kDefaultRoundToZero, |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1132 | const Condition cond = al); |
| 1133 | void vcvt_f64_u32(const DwVfpRegister dst, |
| 1134 | const SwVfpRegister src, |
Steve Block | 1e0659c | 2011-05-24 12:43:12 +0100 | [diff] [blame] | 1135 | VFPConversionMode mode = kDefaultRoundToZero, |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1136 | const Condition cond = al); |
Ben Murdoch | 097c5b2 | 2016-05-18 11:27:45 +0100 | [diff] [blame] | 1137 | void vcvt_f32_u32(const SwVfpRegister dst, |
| 1138 | const SwVfpRegister src, |
| 1139 | VFPConversionMode mode = kDefaultRoundToZero, |
| 1140 | const Condition cond = al); |
| 1141 | void vcvt_s32_f32(const SwVfpRegister dst, |
| 1142 | const SwVfpRegister src, |
| 1143 | VFPConversionMode mode = kDefaultRoundToZero, |
| 1144 | const Condition cond = al); |
| 1145 | void vcvt_u32_f32(const SwVfpRegister dst, |
| 1146 | const SwVfpRegister src, |
| 1147 | VFPConversionMode mode = kDefaultRoundToZero, |
| 1148 | const Condition cond = al); |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1149 | void vcvt_s32_f64(const SwVfpRegister dst, |
| 1150 | const DwVfpRegister src, |
Steve Block | 1e0659c | 2011-05-24 12:43:12 +0100 | [diff] [blame] | 1151 | VFPConversionMode mode = kDefaultRoundToZero, |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1152 | const Condition cond = al); |
| 1153 | void vcvt_u32_f64(const SwVfpRegister dst, |
| 1154 | const DwVfpRegister src, |
Steve Block | 1e0659c | 2011-05-24 12:43:12 +0100 | [diff] [blame] | 1155 | VFPConversionMode mode = kDefaultRoundToZero, |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1156 | const Condition cond = al); |
| 1157 | void vcvt_f64_f32(const DwVfpRegister dst, |
| 1158 | const SwVfpRegister src, |
Steve Block | 1e0659c | 2011-05-24 12:43:12 +0100 | [diff] [blame] | 1159 | VFPConversionMode mode = kDefaultRoundToZero, |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1160 | const Condition cond = al); |
| 1161 | void vcvt_f32_f64(const SwVfpRegister dst, |
| 1162 | const DwVfpRegister src, |
Steve Block | 1e0659c | 2011-05-24 12:43:12 +0100 | [diff] [blame] | 1163 | VFPConversionMode mode = kDefaultRoundToZero, |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1164 | const Condition cond = al); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1165 | void vcvt_f64_s32(const DwVfpRegister dst, |
| 1166 | int fraction_bits, |
| 1167 | const Condition cond = al); |
Leon Clarke | e46be81 | 2010-01-19 14:06:41 +0000 | [diff] [blame] | 1168 | |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1169 | void vmrs(const Register dst, const Condition cond = al); |
| 1170 | void vmsr(const Register dst, const Condition cond = al); |
| 1171 | |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1172 | void vneg(const DwVfpRegister dst, |
| 1173 | const DwVfpRegister src, |
| 1174 | const Condition cond = al); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1175 | void vneg(const SwVfpRegister dst, const SwVfpRegister src, |
| 1176 | const Condition cond = al); |
Steve Block | 1e0659c | 2011-05-24 12:43:12 +0100 | [diff] [blame] | 1177 | void vabs(const DwVfpRegister dst, |
| 1178 | const DwVfpRegister src, |
| 1179 | const Condition cond = al); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1180 | void vabs(const SwVfpRegister dst, const SwVfpRegister src, |
| 1181 | const Condition cond = al); |
Leon Clarke | e46be81 | 2010-01-19 14:06:41 +0000 | [diff] [blame] | 1182 | void vadd(const DwVfpRegister dst, |
| 1183 | const DwVfpRegister src1, |
| 1184 | const DwVfpRegister src2, |
| 1185 | const Condition cond = al); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1186 | void vadd(const SwVfpRegister dst, const SwVfpRegister src1, |
| 1187 | const SwVfpRegister src2, const Condition cond = al); |
Leon Clarke | e46be81 | 2010-01-19 14:06:41 +0000 | [diff] [blame] | 1188 | void vsub(const DwVfpRegister dst, |
| 1189 | const DwVfpRegister src1, |
| 1190 | const DwVfpRegister src2, |
| 1191 | const Condition cond = al); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1192 | void vsub(const SwVfpRegister dst, const SwVfpRegister src1, |
| 1193 | const SwVfpRegister src2, const Condition cond = al); |
Leon Clarke | e46be81 | 2010-01-19 14:06:41 +0000 | [diff] [blame] | 1194 | void vmul(const DwVfpRegister dst, |
| 1195 | const DwVfpRegister src1, |
| 1196 | const DwVfpRegister src2, |
| 1197 | const Condition cond = al); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1198 | void vmul(const SwVfpRegister dst, const SwVfpRegister src1, |
| 1199 | const SwVfpRegister src2, const Condition cond = al); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1200 | void vmla(const DwVfpRegister dst, |
| 1201 | const DwVfpRegister src1, |
| 1202 | const DwVfpRegister src2, |
| 1203 | const Condition cond = al); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1204 | void vmla(const SwVfpRegister dst, const SwVfpRegister src1, |
| 1205 | const SwVfpRegister src2, const Condition cond = al); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1206 | void vmls(const DwVfpRegister dst, |
| 1207 | const DwVfpRegister src1, |
| 1208 | const DwVfpRegister src2, |
| 1209 | const Condition cond = al); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1210 | void vmls(const SwVfpRegister dst, const SwVfpRegister src1, |
| 1211 | const SwVfpRegister src2, const Condition cond = al); |
Leon Clarke | e46be81 | 2010-01-19 14:06:41 +0000 | [diff] [blame] | 1212 | void vdiv(const DwVfpRegister dst, |
| 1213 | const DwVfpRegister src1, |
| 1214 | const DwVfpRegister src2, |
| 1215 | const Condition cond = al); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1216 | void vdiv(const SwVfpRegister dst, const SwVfpRegister src1, |
| 1217 | const SwVfpRegister src2, const Condition cond = al); |
Leon Clarke | e46be81 | 2010-01-19 14:06:41 +0000 | [diff] [blame] | 1218 | void vcmp(const DwVfpRegister src1, |
| 1219 | const DwVfpRegister src2, |
Steve Block | d0582a6 | 2009-12-15 09:54:21 +0000 | [diff] [blame] | 1220 | const Condition cond = al); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1221 | void vcmp(const SwVfpRegister src1, const SwVfpRegister src2, |
| 1222 | const Condition cond = al); |
Iain Merrick | 7568138 | 2010-08-19 15:07:18 +0100 | [diff] [blame] | 1223 | void vcmp(const DwVfpRegister src1, |
| 1224 | const double src2, |
Iain Merrick | 7568138 | 2010-08-19 15:07:18 +0100 | [diff] [blame] | 1225 | const Condition cond = al); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1226 | void vcmp(const SwVfpRegister src1, const float src2, |
Russell Brenner | 90bac25 | 2010-11-18 13:33:46 -0800 | [diff] [blame] | 1227 | const Condition cond = al); |
Steve Block | 8defd9f | 2010-07-08 12:39:36 +0100 | [diff] [blame] | 1228 | void vsqrt(const DwVfpRegister dst, |
| 1229 | const DwVfpRegister src, |
| 1230 | const Condition cond = al); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1231 | void vsqrt(const SwVfpRegister dst, const SwVfpRegister src, |
| 1232 | const Condition cond = al); |
Steve Block | d0582a6 | 2009-12-15 09:54:21 +0000 | [diff] [blame] | 1233 | |
Emily Bernier | d0a1eb7 | 2015-03-24 16:35:39 -0400 | [diff] [blame] | 1234 | // ARMv8 rounding instructions. |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1235 | void vrinta(const SwVfpRegister dst, const SwVfpRegister src); |
Emily Bernier | d0a1eb7 | 2015-03-24 16:35:39 -0400 | [diff] [blame] | 1236 | void vrinta(const DwVfpRegister dst, const DwVfpRegister src); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1237 | void vrintn(const SwVfpRegister dst, const SwVfpRegister src); |
Emily Bernier | d0a1eb7 | 2015-03-24 16:35:39 -0400 | [diff] [blame] | 1238 | void vrintn(const DwVfpRegister dst, const DwVfpRegister src); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1239 | void vrintm(const SwVfpRegister dst, const SwVfpRegister src); |
Emily Bernier | d0a1eb7 | 2015-03-24 16:35:39 -0400 | [diff] [blame] | 1240 | void vrintm(const DwVfpRegister dst, const DwVfpRegister src); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1241 | void vrintp(const SwVfpRegister dst, const SwVfpRegister src); |
Emily Bernier | d0a1eb7 | 2015-03-24 16:35:39 -0400 | [diff] [blame] | 1242 | void vrintp(const DwVfpRegister dst, const DwVfpRegister src); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1243 | void vrintz(const SwVfpRegister dst, const SwVfpRegister src, |
| 1244 | const Condition cond = al); |
Emily Bernier | d0a1eb7 | 2015-03-24 16:35:39 -0400 | [diff] [blame] | 1245 | void vrintz(const DwVfpRegister dst, const DwVfpRegister src, |
| 1246 | const Condition cond = al); |
| 1247 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1248 | // Support for NEON. |
| 1249 | // All these APIs support D0 to D31 and Q0 to Q15. |
| 1250 | |
| 1251 | void vld1(NeonSize size, |
| 1252 | const NeonListOperand& dst, |
| 1253 | const NeonMemOperand& src); |
| 1254 | void vst1(NeonSize size, |
| 1255 | const NeonListOperand& src, |
| 1256 | const NeonMemOperand& dst); |
| 1257 | void vmovl(NeonDataType dt, QwNeonRegister dst, DwVfpRegister src); |
| 1258 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1259 | // Pseudo instructions |
Shimeng (Simon) Wang | 8a31eba | 2010-12-06 19:01:33 -0800 | [diff] [blame] | 1260 | |
| 1261 | // Different nop operations are used by the code generator to detect certain |
| 1262 | // states of the generated code. |
| 1263 | enum NopMarkerTypes { |
| 1264 | NON_MARKING_NOP = 0, |
| 1265 | DEBUG_BREAK_NOP, |
| 1266 | // IC markers. |
| 1267 | PROPERTY_ACCESS_INLINED, |
| 1268 | PROPERTY_ACCESS_INLINED_CONTEXT, |
| 1269 | PROPERTY_ACCESS_INLINED_CONTEXT_DONT_DELETE, |
| 1270 | // Helper values. |
| 1271 | LAST_CODE_MARKER, |
| 1272 | FIRST_IC_MARKER = PROPERTY_ACCESS_INLINED |
| 1273 | }; |
| 1274 | |
| 1275 | void nop(int type = 0); // 0 is the default non-marking type. |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1276 | |
| 1277 | void push(Register src, Condition cond = al) { |
| 1278 | str(src, MemOperand(sp, 4, NegPreIndex), cond); |
| 1279 | } |
| 1280 | |
| 1281 | void pop(Register dst, Condition cond = al) { |
| 1282 | ldr(dst, MemOperand(sp, 4, PostIndex), cond); |
| 1283 | } |
| 1284 | |
| 1285 | void pop() { |
| 1286 | add(sp, sp, Operand(kPointerSize)); |
| 1287 | } |
| 1288 | |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1289 | void vpush(DwVfpRegister src, Condition cond = al) { |
| 1290 | vstm(db_w, sp, src, src, cond); |
| 1291 | } |
| 1292 | |
| 1293 | void vpop(DwVfpRegister dst, Condition cond = al) { |
| 1294 | vldm(ia_w, sp, dst, dst, cond); |
| 1295 | } |
| 1296 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1297 | // Jump unconditionally to given label. |
| 1298 | void jmp(Label* L) { b(L, al); } |
| 1299 | |
| 1300 | // Check the code size generated from label to here. |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1301 | int SizeOfCodeGeneratedSince(Label* label) { |
| 1302 | return pc_offset() - label->pos(); |
| 1303 | } |
| 1304 | |
| 1305 | // Check the number of instructions generated from label to here. |
| 1306 | int InstructionsGeneratedSince(Label* label) { |
| 1307 | return SizeOfCodeGeneratedSince(label) / kInstrSize; |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1308 | } |
| 1309 | |
Steve Block | d0582a6 | 2009-12-15 09:54:21 +0000 | [diff] [blame] | 1310 | // Check whether an immediate fits an addressing mode 1 instruction. |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1311 | static bool ImmediateFitsAddrMode1Instruction(int32_t imm32); |
| 1312 | |
| 1313 | // Check whether an immediate fits an addressing mode 2 instruction. |
| 1314 | bool ImmediateFitsAddrMode2Instruction(int32_t imm32); |
Steve Block | d0582a6 | 2009-12-15 09:54:21 +0000 | [diff] [blame] | 1315 | |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1316 | // Class for scoping postponing the constant pool generation. |
| 1317 | class BlockConstPoolScope { |
| 1318 | public: |
| 1319 | explicit BlockConstPoolScope(Assembler* assem) : assem_(assem) { |
| 1320 | assem_->StartBlockConstPool(); |
| 1321 | } |
| 1322 | ~BlockConstPoolScope() { |
| 1323 | assem_->EndBlockConstPool(); |
| 1324 | } |
| 1325 | |
| 1326 | private: |
| 1327 | Assembler* assem_; |
| 1328 | |
| 1329 | DISALLOW_IMPLICIT_CONSTRUCTORS(BlockConstPoolScope); |
| 1330 | }; |
| 1331 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1332 | // Debugging |
| 1333 | |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1334 | // Mark generator continuation. |
| 1335 | void RecordGeneratorContinuation(); |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1336 | |
Ben Murdoch | 7f4d5bd | 2010-06-15 11:15:29 +0100 | [diff] [blame] | 1337 | // Mark address of a debug break slot. |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1338 | void RecordDebugBreakSlot(RelocInfo::Mode mode); |
Ben Murdoch | 7f4d5bd | 2010-06-15 11:15:29 +0100 | [diff] [blame] | 1339 | |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1340 | // Record the AST id of the CallIC being compiled, so that it can be placed |
| 1341 | // in the relocation information. |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1342 | void SetRecordedAstId(TypeFeedbackId ast_id) { |
| 1343 | DCHECK(recorded_ast_id_.IsNone()); |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1344 | recorded_ast_id_ = ast_id; |
| 1345 | } |
| 1346 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1347 | TypeFeedbackId RecordedAstId() { |
| 1348 | DCHECK(!recorded_ast_id_.IsNone()); |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1349 | return recorded_ast_id_; |
| 1350 | } |
| 1351 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1352 | void ClearRecordedAstId() { recorded_ast_id_ = TypeFeedbackId::None(); } |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1353 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1354 | // Record a comment relocation entry that can be used by a disassembler. |
Ben Murdoch | b0fe162 | 2011-05-05 13:52:32 +0100 | [diff] [blame] | 1355 | // Use --code-comments to enable. |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1356 | void RecordComment(const char* msg); |
| 1357 | |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1358 | // Record a deoptimization reason that can be used by a log or cpu profiler. |
| 1359 | // Use --trace-deopt to enable. |
Ben Murdoch | 097c5b2 | 2016-05-18 11:27:45 +0100 | [diff] [blame] | 1360 | void RecordDeoptReason(const int reason, int raw_position); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1361 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1362 | // Record the emission of a constant pool. |
| 1363 | // |
| 1364 | // The emission of constant pool depends on the size of the code generated and |
| 1365 | // the number of RelocInfo recorded. |
| 1366 | // The Debug mechanism needs to map code offsets between two versions of a |
| 1367 | // function, compiled with and without debugger support (see for example |
| 1368 | // Debug::PrepareForBreakPoints()). |
| 1369 | // Compiling functions with debugger support generates additional code |
| 1370 | // (DebugCodegen::GenerateSlot()). This may affect the emission of the |
| 1371 | // constant pools and cause the version of the code with debugger support to |
| 1372 | // have constant pools generated in different places. |
| 1373 | // Recording the position and size of emitted constant pools allows to |
| 1374 | // correctly compute the offset mappings between the different versions of a |
| 1375 | // function in all situations. |
| 1376 | // |
| 1377 | // The parameter indicates the size of the constant pool (in bytes), including |
| 1378 | // the marker and branch over the data. |
| 1379 | void RecordConstPool(int size); |
| 1380 | |
Ben Murdoch | b8e0da2 | 2011-05-16 14:20:40 +0100 | [diff] [blame] | 1381 | // Writes a single byte or word of data in the code stream. Used |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1382 | // for inline tables, e.g., jump-tables. CheckConstantPool() should be |
| 1383 | // called before any use of db/dd/dq/dp to ensure that constant pools |
Ben Murdoch | b8e0da2 | 2011-05-16 14:20:40 +0100 | [diff] [blame] | 1384 | // are not emitted as part of the tables generated. |
Ben Murdoch | b0fe162 | 2011-05-05 13:52:32 +0100 | [diff] [blame] | 1385 | void db(uint8_t data); |
| 1386 | void dd(uint32_t data); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1387 | void dq(uint64_t data); |
| 1388 | void dp(uintptr_t data) { dd(data); } |
Ben Murdoch | b0fe162 | 2011-05-05 13:52:32 +0100 | [diff] [blame] | 1389 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1390 | // Emits the address of the code stub's first instruction. |
| 1391 | void emit_code_stub_address(Code* stub); |
Teng-Hui Zhu | 3e5fa29 | 2010-11-09 16:16:48 -0800 | [diff] [blame] | 1392 | |
Ben Murdoch | da12d29 | 2016-06-02 14:46:10 +0100 | [diff] [blame] | 1393 | AssemblerPositionsRecorder* positions_recorder() { |
| 1394 | return &positions_recorder_; |
| 1395 | } |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1396 | |
| 1397 | // Read/patch instructions |
Ben Murdoch | 3ef787d | 2012-04-12 10:51:47 +0100 | [diff] [blame] | 1398 | Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); } |
| 1399 | void instr_at_put(int pos, Instr instr) { |
| 1400 | *reinterpret_cast<Instr*>(buffer_ + pos) = instr; |
| 1401 | } |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1402 | static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); } |
| 1403 | static void instr_at_put(byte* pc, Instr instr) { |
| 1404 | *reinterpret_cast<Instr*>(pc) = instr; |
| 1405 | } |
Steve Block | 1e0659c | 2011-05-24 12:43:12 +0100 | [diff] [blame] | 1406 | static Condition GetCondition(Instr instr); |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1407 | static bool IsBranch(Instr instr); |
| 1408 | static int GetBranchOffset(Instr instr); |
| 1409 | static bool IsLdrRegisterImmediate(Instr instr); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1410 | static bool IsVldrDRegisterImmediate(Instr instr); |
| 1411 | static Instr GetConsantPoolLoadPattern(); |
| 1412 | static Instr GetConsantPoolLoadMask(); |
| 1413 | static bool IsLdrPpRegOffset(Instr instr); |
| 1414 | static Instr GetLdrPpRegOffsetPattern(); |
| 1415 | static bool IsLdrPpImmediateOffset(Instr instr); |
| 1416 | static bool IsVldrDPpImmediateOffset(Instr instr); |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1417 | static int GetLdrRegisterImmediateOffset(Instr instr); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1418 | static int GetVldrDRegisterImmediateOffset(Instr instr); |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1419 | static Instr SetLdrRegisterImmediateOffset(Instr instr, int offset); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1420 | static Instr SetVldrDRegisterImmediateOffset(Instr instr, int offset); |
Kristian Monsen | 50ef84f | 2010-07-29 15:18:00 +0100 | [diff] [blame] | 1421 | static bool IsStrRegisterImmediate(Instr instr); |
| 1422 | static Instr SetStrRegisterImmediateOffset(Instr instr, int offset); |
| 1423 | static bool IsAddRegisterImmediate(Instr instr); |
| 1424 | static Instr SetAddRegisterImmediateOffset(Instr instr, int offset); |
Leon Clarke | f7060e2 | 2010-06-03 12:02:55 +0100 | [diff] [blame] | 1425 | static Register GetRd(Instr instr); |
Steve Block | 1e0659c | 2011-05-24 12:43:12 +0100 | [diff] [blame] | 1426 | static Register GetRn(Instr instr); |
| 1427 | static Register GetRm(Instr instr); |
Leon Clarke | f7060e2 | 2010-06-03 12:02:55 +0100 | [diff] [blame] | 1428 | static bool IsPush(Instr instr); |
| 1429 | static bool IsPop(Instr instr); |
| 1430 | static bool IsStrRegFpOffset(Instr instr); |
| 1431 | static bool IsLdrRegFpOffset(Instr instr); |
| 1432 | static bool IsStrRegFpNegOffset(Instr instr); |
| 1433 | static bool IsLdrRegFpNegOffset(Instr instr); |
Shimeng (Simon) Wang | 8a31eba | 2010-12-06 19:01:33 -0800 | [diff] [blame] | 1434 | static bool IsLdrPcImmediateOffset(Instr instr); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1435 | static bool IsVldrDPcImmediateOffset(Instr instr); |
| 1436 | static bool IsBlxReg(Instr instr); |
| 1437 | static bool IsBlxIp(Instr instr); |
Steve Block | 1e0659c | 2011-05-24 12:43:12 +0100 | [diff] [blame] | 1438 | static bool IsTstImmediate(Instr instr); |
| 1439 | static bool IsCmpRegister(Instr instr); |
| 1440 | static bool IsCmpImmediate(Instr instr); |
| 1441 | static Register GetCmpImmediateRegister(Instr instr); |
| 1442 | static int GetCmpImmediateRawImmediate(Instr instr); |
Shimeng (Simon) Wang | 8a31eba | 2010-12-06 19:01:33 -0800 | [diff] [blame] | 1443 | static bool IsNop(Instr instr, int type = NON_MARKING_NOP); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1444 | static bool IsMovImmed(Instr instr); |
| 1445 | static bool IsOrrImmed(Instr instr); |
| 1446 | static bool IsMovT(Instr instr); |
| 1447 | static Instr GetMovTPattern(); |
| 1448 | static bool IsMovW(Instr instr); |
| 1449 | static Instr GetMovWPattern(); |
| 1450 | static Instr EncodeMovwImmediate(uint32_t immediate); |
| 1451 | static Instr PatchMovwImmediate(Instr instruction, uint32_t immediate); |
| 1452 | static int DecodeShiftImm(Instr instr); |
| 1453 | static Instr PatchShiftImm(Instr instr, int immed); |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1454 | |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1455 | // Constants in pools are accessed via pc relative addressing, which can |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1456 | // reach +/-4KB for integer PC-relative loads and +/-1KB for floating-point |
| 1457 | // PC-relative loads, thereby defining a maximum distance between the |
| 1458 | // instruction and the accessed constant. |
| 1459 | static const int kMaxDistToIntPool = 4*KB; |
| 1460 | static const int kMaxDistToFPPool = 1*KB; |
| 1461 | // All relocations could be integer, it therefore acts as the limit. |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1462 | static const int kMinNumPendingConstants = 4; |
| 1463 | static const int kMaxNumPending32Constants = kMaxDistToIntPool / kInstrSize; |
| 1464 | static const int kMaxNumPending64Constants = kMaxDistToFPPool / kInstrSize; |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1465 | |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1466 | // Postpone the generation of the constant pool for the specified number of |
| 1467 | // instructions. |
| 1468 | void BlockConstPoolFor(int instructions); |
| 1469 | |
| 1470 | // Check if is time to emit a constant pool. |
Ben Murdoch | b0fe162 | 2011-05-05 13:52:32 +0100 | [diff] [blame] | 1471 | void CheckConstPool(bool force_emit, bool require_jump); |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1472 | |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1473 | void MaybeCheckConstPool() { |
| 1474 | if (pc_offset() >= next_buffer_check_) { |
| 1475 | CheckConstPool(false, true); |
| 1476 | } |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1477 | } |
| 1478 | |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1479 | int EmitEmbeddedConstantPool() { |
| 1480 | DCHECK(FLAG_enable_embedded_constant_pool); |
| 1481 | return constant_pool_builder_.Emit(this); |
| 1482 | } |
| 1483 | |
| 1484 | bool ConstantPoolAccessIsInOverflow() const { |
| 1485 | return constant_pool_builder_.NextAccess(ConstantPoolEntry::INTPTR) == |
| 1486 | ConstantPoolEntry::OVERFLOWED; |
| 1487 | } |
| 1488 | |
| 1489 | void PatchConstantPoolAccessInstruction(int pc_offset, int offset, |
| 1490 | ConstantPoolEntry::Access access, |
| 1491 | ConstantPoolEntry::Type type); |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1492 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1493 | protected: |
Ben Murdoch | 257744e | 2011-11-30 15:57:28 +0000 | [diff] [blame] | 1494 | // Relocation for a type-recording IC has the AST id added to it. This |
| 1495 | // member variable is a way to pass the information from the call site to |
| 1496 | // the relocation info. |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1497 | TypeFeedbackId recorded_ast_id_; |
Steve Block | 44f0eee | 2011-05-26 01:26:41 +0100 | [diff] [blame] | 1498 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1499 | int buffer_space() const { return reloc_info_writer.pos() - pc_; } |
| 1500 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1501 | // Decode branch instruction at pos and return branch target pos |
| 1502 | int target_at(int pos); |
| 1503 | |
| 1504 | // Patch branch instruction at pos to branch to given branch target pos |
| 1505 | void target_at_put(int pos, int target_pos); |
| 1506 | |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1507 | // Prevent contant pool emission until EndBlockConstPool is called. |
| 1508 | // Call to this function can be nested but must be followed by an equal |
| 1509 | // number of call to EndBlockConstpool. |
| 1510 | void StartBlockConstPool() { |
| 1511 | if (const_pool_blocked_nesting_++ == 0) { |
| 1512 | // Prevent constant pool checks happening by setting the next check to |
| 1513 | // the biggest possible offset. |
| 1514 | next_buffer_check_ = kMaxInt; |
| 1515 | } |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1516 | } |
| 1517 | |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1518 | // Resume constant pool emission. Need to be called as many time as |
| 1519 | // StartBlockConstPool to have an effect. |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1520 | void EndBlockConstPool() { |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1521 | if (--const_pool_blocked_nesting_ == 0) { |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1522 | #ifdef DEBUG |
| 1523 | // Max pool start (if we need a jump and an alignment). |
| 1524 | int start = pc_offset() + kInstrSize + 2 * kPointerSize; |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1525 | // Check the constant pool hasn't been blocked for too long. |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1526 | DCHECK((num_pending_32_bit_constants_ == 0) || |
| 1527 | (start + num_pending_64_bit_constants_ * kDoubleSize < |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1528 | (first_const_pool_32_use_ + kMaxDistToIntPool))); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1529 | DCHECK((num_pending_64_bit_constants_ == 0) || |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1530 | (start < (first_const_pool_64_use_ + kMaxDistToFPPool))); |
| 1531 | #endif |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1532 | // Two cases: |
| 1533 | // * no_const_pool_before_ >= next_buffer_check_ and the emission is |
| 1534 | // still blocked |
| 1535 | // * no_const_pool_before_ < next_buffer_check_ and the next emit will |
| 1536 | // trigger a check. |
| 1537 | next_buffer_check_ = no_const_pool_before_; |
| 1538 | } |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1539 | } |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1540 | |
| 1541 | bool is_const_pool_blocked() const { |
| 1542 | return (const_pool_blocked_nesting_ > 0) || |
| 1543 | (pc_offset() < no_const_pool_before_); |
| 1544 | } |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1545 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1546 | private: |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1547 | int next_buffer_check_; // pc offset of next buffer check |
| 1548 | |
| 1549 | // Code generation |
| 1550 | // The relocation writer's position is at least kGap bytes below the end of |
| 1551 | // the generated instructions. This is so that multi-instruction sequences do |
| 1552 | // not have to check for overflow. The same is true for writes of large |
| 1553 | // relocation info entries. |
| 1554 | static const int kGap = 32; |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1555 | |
| 1556 | // Constant pool generation |
| 1557 | // Pools are emitted in the instruction stream, preferably after unconditional |
| 1558 | // jumps or after returns from functions (in dead code locations). |
| 1559 | // If a long code sequence does not contain unconditional jumps, it is |
| 1560 | // necessary to emit the constant pool before the pool gets too far from the |
| 1561 | // location it is accessed from. In this case, we emit a jump over the emitted |
| 1562 | // constant pool. |
| 1563 | // Constants in the pool may be addresses of functions that gets relocated; |
| 1564 | // if so, a relocation info entry is associated to the constant pool entry. |
| 1565 | |
| 1566 | // Repeated checking whether the constant pool should be emitted is rather |
| 1567 | // expensive. By default we only check again once a number of instructions |
| 1568 | // has been generated. That also means that the sizing of the buffers is not |
| 1569 | // an exact science, and that we rely on some slop to not overrun buffers. |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1570 | static const int kCheckPoolIntervalInst = 32; |
| 1571 | static const int kCheckPoolInterval = kCheckPoolIntervalInst * kInstrSize; |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1572 | |
| 1573 | |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1574 | // Emission of the constant pool may be blocked in some code sequences. |
| 1575 | int const_pool_blocked_nesting_; // Block emission if this is not zero. |
| 1576 | int no_const_pool_before_; // Block emission before this pc offset. |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1577 | |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1578 | // Keep track of the first instruction requiring a constant pool entry |
| 1579 | // since the previous constant pool was emitted. |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1580 | int first_const_pool_32_use_; |
| 1581 | int first_const_pool_64_use_; |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1582 | |
| 1583 | // Relocation info generation |
| 1584 | // Each relocation is encoded as a variable size value |
| 1585 | static const int kMaxRelocSize = RelocInfoWriter::kMaxSize; |
| 1586 | RelocInfoWriter reloc_info_writer; |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1587 | |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1588 | // ConstantPoolEntry records are used during code generation as temporary |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1589 | // containers for constants and code target addresses until they are emitted |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1590 | // to the constant pool. These records are temporarily stored in a separate |
| 1591 | // buffer until a constant pool is emitted. |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1592 | // If every instruction in a long sequence is accessing the pool, we need one |
| 1593 | // pending relocation entry per instruction. |
Ben Murdoch | 3fb3ca8 | 2011-12-02 17:19:32 +0000 | [diff] [blame] | 1594 | |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1595 | // The buffers of pending constant pool entries. |
| 1596 | ConstantPoolEntry pending_32_bit_constants_buffer_[kMinNumPendingConstants]; |
| 1597 | ConstantPoolEntry pending_64_bit_constants_buffer_[kMinNumPendingConstants]; |
| 1598 | ConstantPoolEntry* pending_32_bit_constants_; |
| 1599 | ConstantPoolEntry* pending_64_bit_constants_; |
| 1600 | // Number of pending constant pool entries in the 32 bits buffer. |
| 1601 | int num_pending_32_bit_constants_; |
| 1602 | // Number of pending constant pool entries in the 64 bits buffer. |
| 1603 | int num_pending_64_bit_constants_; |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1604 | |
| 1605 | ConstantPoolBuilder constant_pool_builder_; |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1606 | |
| 1607 | // The bound position, before this we cannot do instruction elimination. |
| 1608 | int last_bound_pos_; |
| 1609 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1610 | // Code emission |
| 1611 | inline void CheckBuffer(); |
| 1612 | void GrowBuffer(); |
| 1613 | inline void emit(Instr x); |
| 1614 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1615 | // 32-bit immediate values |
| 1616 | void move_32_bit_immediate(Register rd, |
| 1617 | const Operand& x, |
| 1618 | Condition cond = al); |
| 1619 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1620 | // Instruction generation |
| 1621 | void addrmod1(Instr instr, Register rn, Register rd, const Operand& x); |
| 1622 | void addrmod2(Instr instr, Register rd, const MemOperand& x); |
| 1623 | void addrmod3(Instr instr, Register rd, const MemOperand& x); |
| 1624 | void addrmod4(Instr instr, Register rn, RegList rl); |
| 1625 | void addrmod5(Instr instr, CRegister crd, const MemOperand& x); |
| 1626 | |
| 1627 | // Labels |
| 1628 | void print(Label* L); |
| 1629 | void bind_to(Label* L, int pos); |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1630 | void next(Label* L); |
| 1631 | |
| 1632 | // Record reloc info for current pc_ |
| 1633 | void RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data = 0); |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1634 | ConstantPoolEntry::Access ConstantPoolAddEntry(int position, |
| 1635 | RelocInfo::Mode rmode, |
| 1636 | intptr_t value); |
| 1637 | ConstantPoolEntry::Access ConstantPoolAddEntry(int position, double value); |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1638 | |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1639 | friend class RelocInfo; |
| 1640 | friend class CodePatcher; |
Steve Block | 6ded16b | 2010-05-10 14:33:55 +0100 | [diff] [blame] | 1641 | friend class BlockConstPoolScope; |
Ben Murdoch | da12d29 | 2016-06-02 14:46:10 +0100 | [diff] [blame] | 1642 | AssemblerPositionsRecorder positions_recorder_; |
| 1643 | friend class AssemblerPositionsRecorder; |
Teng-Hui Zhu | 3e5fa29 | 2010-11-09 16:16:48 -0800 | [diff] [blame] | 1644 | friend class EnsureSpace; |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1645 | }; |
| 1646 | |
Teng-Hui Zhu | 3e5fa29 | 2010-11-09 16:16:48 -0800 | [diff] [blame] | 1647 | |
| 1648 | class EnsureSpace BASE_EMBEDDED { |
| 1649 | public: |
| 1650 | explicit EnsureSpace(Assembler* assembler) { |
| 1651 | assembler->CheckBuffer(); |
| 1652 | } |
| 1653 | }; |
| 1654 | |
| 1655 | |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 1656 | } // namespace internal |
| 1657 | } // namespace v8 |
Steve Block | a7e24c1 | 2009-10-30 11:49:00 +0000 | [diff] [blame] | 1658 | |
| 1659 | #endif // V8_ARM_ASSEMBLER_ARM_H_ |