Ben Murdoch | da12d29 | 2016-06-02 14:46:10 +0100 | [diff] [blame] | 1 | // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 | // All Rights Reserved. |
| 3 | // |
| 4 | // Redistribution and use in source and binary forms, with or without |
| 5 | // modification, are permitted provided that the following conditions |
| 6 | // are met: |
| 7 | // |
| 8 | // - Redistributions of source code must retain the above copyright notice, |
| 9 | // this list of conditions and the following disclaimer. |
| 10 | // |
| 11 | // - Redistribution in binary form must reproduce the above copyright |
| 12 | // notice, this list of conditions and the following disclaimer in the |
| 13 | // documentation and/or other materials provided with the |
| 14 | // distribution. |
| 15 | // |
| 16 | // - Neither the name of Sun Microsystems or the names of contributors may |
| 17 | // be used to endorse or promote products derived from this software without |
| 18 | // specific prior written permission. |
| 19 | // |
| 20 | // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 21 | // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 22 | // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
| 23 | // FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
| 24 | // COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 25 | // INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 26 | // (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| 27 | // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 28 | // HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
| 29 | // STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 30 | // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED |
| 31 | // OF THE POSSIBILITY OF SUCH DAMAGE. |
| 32 | |
| 33 | // The original source code covered by the above license above has been modified |
| 34 | // significantly by Google Inc. |
| 35 | // Copyright 2014 the V8 project authors. All rights reserved. |
| 36 | |
| 37 | #ifndef V8_S390_ASSEMBLER_S390_INL_H_ |
| 38 | #define V8_S390_ASSEMBLER_S390_INL_H_ |
| 39 | |
| 40 | #include "src/s390/assembler-s390.h" |
| 41 | |
| 42 | #include "src/assembler.h" |
| 43 | #include "src/debug/debug.h" |
| 44 | |
| 45 | namespace v8 { |
| 46 | namespace internal { |
| 47 | |
| 48 | bool CpuFeatures::SupportsCrankshaft() { return true; } |
| 49 | |
| 50 | void RelocInfo::apply(intptr_t delta) { |
| 51 | // Absolute code pointer inside code object moves with the code object. |
| 52 | if (IsInternalReference(rmode_)) { |
| 53 | // Jump table entry |
| 54 | Address target = Memory::Address_at(pc_); |
| 55 | Memory::Address_at(pc_) = target + delta; |
| 56 | } else if (IsCodeTarget(rmode_)) { |
| 57 | SixByteInstr instr = |
| 58 | Instruction::InstructionBits(reinterpret_cast<const byte*>(pc_)); |
| 59 | int32_t dis = static_cast<int32_t>(instr & 0xFFFFFFFF) * 2 // halfwords |
| 60 | - static_cast<int32_t>(delta); |
| 61 | instr >>= 32; // Clear the 4-byte displacement field. |
| 62 | instr <<= 32; |
| 63 | instr |= static_cast<uint32_t>(dis / 2); |
| 64 | Instruction::SetInstructionBits<SixByteInstr>(reinterpret_cast<byte*>(pc_), |
| 65 | instr); |
| 66 | } else { |
| 67 | // mov sequence |
| 68 | DCHECK(IsInternalReferenceEncoded(rmode_)); |
| 69 | Address target = Assembler::target_address_at(pc_, host_); |
| 70 | Assembler::set_target_address_at(isolate_, pc_, host_, target + delta, |
| 71 | SKIP_ICACHE_FLUSH); |
| 72 | } |
| 73 | } |
| 74 | |
| 75 | Address RelocInfo::target_internal_reference() { |
| 76 | if (IsInternalReference(rmode_)) { |
| 77 | // Jump table entry |
| 78 | return Memory::Address_at(pc_); |
| 79 | } else { |
| 80 | // mov sequence |
| 81 | DCHECK(IsInternalReferenceEncoded(rmode_)); |
| 82 | return Assembler::target_address_at(pc_, host_); |
| 83 | } |
| 84 | } |
| 85 | |
| 86 | Address RelocInfo::target_internal_reference_address() { |
| 87 | DCHECK(IsInternalReference(rmode_) || IsInternalReferenceEncoded(rmode_)); |
| 88 | return reinterpret_cast<Address>(pc_); |
| 89 | } |
| 90 | |
| 91 | Address RelocInfo::target_address() { |
| 92 | DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_)); |
| 93 | return Assembler::target_address_at(pc_, host_); |
| 94 | } |
| 95 | |
Ben Murdoch | da12d29 | 2016-06-02 14:46:10 +0100 | [diff] [blame] | 96 | Address RelocInfo::target_address_address() { |
| 97 | DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_) || |
| 98 | rmode_ == EMBEDDED_OBJECT || rmode_ == EXTERNAL_REFERENCE); |
| 99 | |
| 100 | // Read the address of the word containing the target_address in an |
| 101 | // instruction stream. |
| 102 | // The only architecture-independent user of this function is the serializer. |
| 103 | // The serializer uses it to find out how many raw bytes of instruction to |
| 104 | // output before the next target. |
| 105 | // For an instruction like LIS/ORI where the target bits are mixed into the |
| 106 | // instruction bits, the size of the target will be zero, indicating that the |
| 107 | // serializer should not step forward in memory after a target is resolved |
| 108 | // and written. |
| 109 | return reinterpret_cast<Address>(pc_); |
| 110 | } |
| 111 | |
| 112 | Address RelocInfo::constant_pool_entry_address() { |
| 113 | UNREACHABLE(); |
| 114 | return NULL; |
| 115 | } |
| 116 | |
| 117 | int RelocInfo::target_address_size() { return Assembler::kSpecialTargetSize; } |
| 118 | |
| 119 | void RelocInfo::set_target_address(Address target, |
| 120 | WriteBarrierMode write_barrier_mode, |
| 121 | ICacheFlushMode icache_flush_mode) { |
| 122 | DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_)); |
| 123 | Assembler::set_target_address_at(isolate_, pc_, host_, target, |
| 124 | icache_flush_mode); |
| 125 | if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL && |
| 126 | IsCodeTarget(rmode_)) { |
| 127 | Object* target_code = Code::GetCodeFromTargetAddress(target); |
| 128 | host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( |
| 129 | host(), this, HeapObject::cast(target_code)); |
| 130 | } |
| 131 | } |
| 132 | |
| 133 | Address Assembler::target_address_from_return_address(Address pc) { |
| 134 | // Returns the address of the call target from the return address that will |
| 135 | // be returned to after a call. |
| 136 | // Sequence is: |
| 137 | // BRASL r14, RI |
| 138 | return pc - kCallTargetAddressOffset; |
| 139 | } |
| 140 | |
| 141 | Address Assembler::return_address_from_call_start(Address pc) { |
| 142 | // Sequence is: |
| 143 | // BRASL r14, RI |
| 144 | return pc + kCallTargetAddressOffset; |
| 145 | } |
| 146 | |
| 147 | Handle<Object> Assembler::code_target_object_handle_at(Address pc) { |
| 148 | SixByteInstr instr = |
| 149 | Instruction::InstructionBits(reinterpret_cast<const byte*>(pc)); |
| 150 | int index = instr & 0xFFFFFFFF; |
| 151 | return code_targets_[index]; |
| 152 | } |
| 153 | |
Ben Murdoch | da12d29 | 2016-06-02 14:46:10 +0100 | [diff] [blame] | 154 | Object* RelocInfo::target_object() { |
| 155 | DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); |
| 156 | return reinterpret_cast<Object*>(Assembler::target_address_at(pc_, host_)); |
| 157 | } |
| 158 | |
| 159 | Handle<Object> RelocInfo::target_object_handle(Assembler* origin) { |
| 160 | DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); |
| 161 | if (rmode_ == EMBEDDED_OBJECT) { |
| 162 | return Handle<Object>( |
| 163 | reinterpret_cast<Object**>(Assembler::target_address_at(pc_, host_))); |
| 164 | } else { |
| 165 | return origin->code_target_object_handle_at(pc_); |
| 166 | } |
| 167 | } |
| 168 | |
| 169 | void RelocInfo::set_target_object(Object* target, |
| 170 | WriteBarrierMode write_barrier_mode, |
| 171 | ICacheFlushMode icache_flush_mode) { |
| 172 | DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); |
| 173 | Assembler::set_target_address_at(isolate_, pc_, host_, |
| 174 | reinterpret_cast<Address>(target), |
| 175 | icache_flush_mode); |
| 176 | if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL && |
| 177 | target->IsHeapObject()) { |
| 178 | host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( |
| 179 | host(), this, HeapObject::cast(target)); |
| 180 | } |
| 181 | } |
| 182 | |
| 183 | Address RelocInfo::target_external_reference() { |
| 184 | DCHECK(rmode_ == EXTERNAL_REFERENCE); |
| 185 | return Assembler::target_address_at(pc_, host_); |
| 186 | } |
| 187 | |
| 188 | Address RelocInfo::target_runtime_entry(Assembler* origin) { |
| 189 | DCHECK(IsRuntimeEntry(rmode_)); |
| 190 | return target_address(); |
| 191 | } |
| 192 | |
| 193 | void RelocInfo::set_target_runtime_entry(Address target, |
| 194 | WriteBarrierMode write_barrier_mode, |
| 195 | ICacheFlushMode icache_flush_mode) { |
| 196 | DCHECK(IsRuntimeEntry(rmode_)); |
| 197 | if (target_address() != target) |
| 198 | set_target_address(target, write_barrier_mode, icache_flush_mode); |
| 199 | } |
| 200 | |
| 201 | Handle<Cell> RelocInfo::target_cell_handle() { |
| 202 | DCHECK(rmode_ == RelocInfo::CELL); |
| 203 | Address address = Memory::Address_at(pc_); |
| 204 | return Handle<Cell>(reinterpret_cast<Cell**>(address)); |
| 205 | } |
| 206 | |
| 207 | Cell* RelocInfo::target_cell() { |
| 208 | DCHECK(rmode_ == RelocInfo::CELL); |
| 209 | return Cell::FromValueAddress(Memory::Address_at(pc_)); |
| 210 | } |
| 211 | |
| 212 | void RelocInfo::set_target_cell(Cell* cell, WriteBarrierMode write_barrier_mode, |
| 213 | ICacheFlushMode icache_flush_mode) { |
| 214 | DCHECK(rmode_ == RelocInfo::CELL); |
| 215 | Address address = cell->address() + Cell::kValueOffset; |
| 216 | Memory::Address_at(pc_) = address; |
| 217 | if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL) { |
| 218 | host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(host(), this, |
| 219 | cell); |
| 220 | } |
| 221 | } |
| 222 | |
| 223 | #if V8_TARGET_ARCH_S390X |
| 224 | // NOP(2byte) + PUSH + MOV + BASR = |
| 225 | // NOP + LAY + STG + IIHF + IILF + BASR |
| 226 | static const int kCodeAgingSequenceLength = 28; |
| 227 | static const int kCodeAgingTargetDelta = 14; // Jump past NOP + PUSH to IIHF |
| 228 | // LAY + 4 * STG + LA |
| 229 | static const int kNoCodeAgeSequenceLength = 34; |
| 230 | #else |
| 231 | #if (V8_HOST_ARCH_S390) |
| 232 | // NOP + NILH + LAY + ST + IILF + BASR |
| 233 | static const int kCodeAgingSequenceLength = 24; |
| 234 | static const int kCodeAgingTargetDelta = 16; // Jump past NOP to IILF |
| 235 | // NILH + LAY + 4 * ST + LA |
| 236 | static const int kNoCodeAgeSequenceLength = 30; |
| 237 | #else |
| 238 | // NOP + LAY + ST + IILF + BASR |
| 239 | static const int kCodeAgingSequenceLength = 20; |
| 240 | static const int kCodeAgingTargetDelta = 12; // Jump past NOP to IILF |
| 241 | // LAY + 4 * ST + LA |
| 242 | static const int kNoCodeAgeSequenceLength = 26; |
| 243 | #endif |
| 244 | #endif |
| 245 | |
| 246 | Handle<Object> RelocInfo::code_age_stub_handle(Assembler* origin) { |
| 247 | UNREACHABLE(); // This should never be reached on S390. |
| 248 | return Handle<Object>(); |
| 249 | } |
| 250 | |
| 251 | Code* RelocInfo::code_age_stub() { |
| 252 | DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); |
| 253 | return Code::GetCodeFromTargetAddress( |
| 254 | Assembler::target_address_at(pc_ + kCodeAgingTargetDelta, host_)); |
| 255 | } |
| 256 | |
| 257 | void RelocInfo::set_code_age_stub(Code* stub, |
| 258 | ICacheFlushMode icache_flush_mode) { |
| 259 | DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); |
| 260 | Assembler::set_target_address_at(isolate_, pc_ + kCodeAgingTargetDelta, host_, |
| 261 | stub->instruction_start(), |
| 262 | icache_flush_mode); |
| 263 | } |
| 264 | |
| 265 | Address RelocInfo::debug_call_address() { |
| 266 | DCHECK(IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()); |
| 267 | return Assembler::target_address_at(pc_, host_); |
| 268 | } |
| 269 | |
| 270 | void RelocInfo::set_debug_call_address(Address target) { |
| 271 | DCHECK(IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()); |
| 272 | Assembler::set_target_address_at(isolate_, pc_, host_, target); |
| 273 | if (host() != NULL) { |
| 274 | Object* target_code = Code::GetCodeFromTargetAddress(target); |
| 275 | host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( |
| 276 | host(), this, HeapObject::cast(target_code)); |
| 277 | } |
| 278 | } |
| 279 | |
| 280 | void RelocInfo::WipeOut() { |
| 281 | DCHECK(IsEmbeddedObject(rmode_) || IsCodeTarget(rmode_) || |
| 282 | IsRuntimeEntry(rmode_) || IsExternalReference(rmode_) || |
| 283 | IsInternalReference(rmode_) || IsInternalReferenceEncoded(rmode_)); |
| 284 | if (IsInternalReference(rmode_)) { |
| 285 | // Jump table entry |
| 286 | Memory::Address_at(pc_) = NULL; |
| 287 | } else if (IsInternalReferenceEncoded(rmode_)) { |
| 288 | // mov sequence |
| 289 | // Currently used only by deserializer, no need to flush. |
| 290 | Assembler::set_target_address_at(isolate_, pc_, host_, NULL, |
| 291 | SKIP_ICACHE_FLUSH); |
| 292 | } else { |
| 293 | Assembler::set_target_address_at(isolate_, pc_, host_, NULL); |
| 294 | } |
| 295 | } |
| 296 | |
Ben Murdoch | c561043 | 2016-08-08 18:44:38 +0100 | [diff] [blame^] | 297 | template <typename ObjectVisitor> |
Ben Murdoch | da12d29 | 2016-06-02 14:46:10 +0100 | [diff] [blame] | 298 | void RelocInfo::Visit(Isolate* isolate, ObjectVisitor* visitor) { |
| 299 | RelocInfo::Mode mode = rmode(); |
| 300 | if (mode == RelocInfo::EMBEDDED_OBJECT) { |
| 301 | visitor->VisitEmbeddedPointer(this); |
| 302 | } else if (RelocInfo::IsCodeTarget(mode)) { |
| 303 | visitor->VisitCodeTarget(this); |
| 304 | } else if (mode == RelocInfo::CELL) { |
| 305 | visitor->VisitCell(this); |
| 306 | } else if (mode == RelocInfo::EXTERNAL_REFERENCE) { |
| 307 | visitor->VisitExternalReference(this); |
| 308 | } else if (mode == RelocInfo::INTERNAL_REFERENCE) { |
| 309 | visitor->VisitInternalReference(this); |
| 310 | } else if (RelocInfo::IsCodeAgeSequence(mode)) { |
| 311 | visitor->VisitCodeAgeSequence(this); |
| 312 | } else if (RelocInfo::IsDebugBreakSlot(mode) && |
| 313 | IsPatchedDebugBreakSlotSequence()) { |
| 314 | visitor->VisitDebugTarget(this); |
| 315 | } else if (IsRuntimeEntry(mode)) { |
| 316 | visitor->VisitRuntimeEntry(this); |
| 317 | } |
| 318 | } |
| 319 | |
| 320 | template <typename StaticVisitor> |
| 321 | void RelocInfo::Visit(Heap* heap) { |
| 322 | RelocInfo::Mode mode = rmode(); |
| 323 | if (mode == RelocInfo::EMBEDDED_OBJECT) { |
| 324 | StaticVisitor::VisitEmbeddedPointer(heap, this); |
| 325 | } else if (RelocInfo::IsCodeTarget(mode)) { |
| 326 | StaticVisitor::VisitCodeTarget(heap, this); |
| 327 | } else if (mode == RelocInfo::CELL) { |
| 328 | StaticVisitor::VisitCell(heap, this); |
| 329 | } else if (mode == RelocInfo::EXTERNAL_REFERENCE) { |
| 330 | StaticVisitor::VisitExternalReference(this); |
| 331 | } else if (mode == RelocInfo::INTERNAL_REFERENCE) { |
| 332 | StaticVisitor::VisitInternalReference(this); |
| 333 | } else if (RelocInfo::IsCodeAgeSequence(mode)) { |
| 334 | StaticVisitor::VisitCodeAgeSequence(heap, this); |
| 335 | } else if (RelocInfo::IsDebugBreakSlot(mode) && |
| 336 | IsPatchedDebugBreakSlotSequence()) { |
| 337 | StaticVisitor::VisitDebugTarget(heap, this); |
| 338 | } else if (IsRuntimeEntry(mode)) { |
| 339 | StaticVisitor::VisitRuntimeEntry(this); |
| 340 | } |
| 341 | } |
| 342 | |
| 343 | // Operand constructors |
| 344 | Operand::Operand(intptr_t immediate, RelocInfo::Mode rmode) { |
| 345 | rm_ = no_reg; |
| 346 | imm_ = immediate; |
| 347 | rmode_ = rmode; |
| 348 | } |
| 349 | |
| 350 | Operand::Operand(const ExternalReference& f) { |
| 351 | rm_ = no_reg; |
| 352 | imm_ = reinterpret_cast<intptr_t>(f.address()); |
| 353 | rmode_ = RelocInfo::EXTERNAL_REFERENCE; |
| 354 | } |
| 355 | |
| 356 | Operand::Operand(Smi* value) { |
| 357 | rm_ = no_reg; |
| 358 | imm_ = reinterpret_cast<intptr_t>(value); |
| 359 | rmode_ = kRelocInfo_NONEPTR; |
| 360 | } |
| 361 | |
| 362 | Operand::Operand(Register rm) { |
| 363 | rm_ = rm; |
| 364 | rmode_ = kRelocInfo_NONEPTR; // S390 -why doesn't ARM do this? |
| 365 | } |
| 366 | |
| 367 | void Assembler::CheckBuffer() { |
| 368 | if (buffer_space() <= kGap) { |
| 369 | GrowBuffer(); |
| 370 | } |
| 371 | } |
| 372 | |
| 373 | int32_t Assembler::emit_code_target(Handle<Code> target, RelocInfo::Mode rmode, |
| 374 | TypeFeedbackId ast_id) { |
| 375 | DCHECK(RelocInfo::IsCodeTarget(rmode)); |
| 376 | if (rmode == RelocInfo::CODE_TARGET && !ast_id.IsNone()) { |
| 377 | SetRecordedAstId(ast_id); |
| 378 | RecordRelocInfo(RelocInfo::CODE_TARGET_WITH_ID); |
| 379 | } else { |
| 380 | RecordRelocInfo(rmode); |
| 381 | } |
| 382 | |
| 383 | int current = code_targets_.length(); |
| 384 | if (current > 0 && code_targets_.last().is_identical_to(target)) { |
| 385 | // Optimization if we keep jumping to the same code target. |
| 386 | current--; |
| 387 | } else { |
| 388 | code_targets_.Add(target); |
| 389 | } |
| 390 | return current; |
| 391 | } |
| 392 | |
| 393 | // Helper to emit the binary encoding of a 2 byte instruction |
| 394 | void Assembler::emit2bytes(uint16_t x) { |
| 395 | CheckBuffer(); |
| 396 | #if V8_TARGET_LITTLE_ENDIAN |
| 397 | // We need to emit instructions in big endian format as disassembler / |
| 398 | // simulator require the first byte of the instruction in order to decode |
| 399 | // the instruction length. Swap the bytes. |
| 400 | x = ((x & 0x00FF) << 8) | ((x & 0xFF00) >> 8); |
| 401 | #endif |
| 402 | *reinterpret_cast<uint16_t*>(pc_) = x; |
| 403 | pc_ += 2; |
| 404 | } |
| 405 | |
| 406 | // Helper to emit the binary encoding of a 4 byte instruction |
| 407 | void Assembler::emit4bytes(uint32_t x) { |
| 408 | CheckBuffer(); |
| 409 | #if V8_TARGET_LITTLE_ENDIAN |
| 410 | // We need to emit instructions in big endian format as disassembler / |
| 411 | // simulator require the first byte of the instruction in order to decode |
| 412 | // the instruction length. Swap the bytes. |
| 413 | x = ((x & 0x000000FF) << 24) | ((x & 0x0000FF00) << 8) | |
| 414 | ((x & 0x00FF0000) >> 8) | ((x & 0xFF000000) >> 24); |
| 415 | #endif |
| 416 | *reinterpret_cast<uint32_t*>(pc_) = x; |
| 417 | pc_ += 4; |
| 418 | } |
| 419 | |
| 420 | // Helper to emit the binary encoding of a 6 byte instruction |
| 421 | void Assembler::emit6bytes(uint64_t x) { |
| 422 | CheckBuffer(); |
| 423 | #if V8_TARGET_LITTLE_ENDIAN |
| 424 | // We need to emit instructions in big endian format as disassembler / |
| 425 | // simulator require the first byte of the instruction in order to decode |
| 426 | // the instruction length. Swap the bytes. |
| 427 | x = (static_cast<uint64_t>(x & 0xFF) << 40) | |
| 428 | (static_cast<uint64_t>((x >> 8) & 0xFF) << 32) | |
| 429 | (static_cast<uint64_t>((x >> 16) & 0xFF) << 24) | |
| 430 | (static_cast<uint64_t>((x >> 24) & 0xFF) << 16) | |
| 431 | (static_cast<uint64_t>((x >> 32) & 0xFF) << 8) | |
| 432 | (static_cast<uint64_t>((x >> 40) & 0xFF)); |
| 433 | x |= (*reinterpret_cast<uint64_t*>(pc_) >> 48) << 48; |
| 434 | #else |
| 435 | // We need to pad two bytes of zeros in order to get the 6-bytes |
| 436 | // stored from low address. |
| 437 | x = x << 16; |
| 438 | x |= *reinterpret_cast<uint64_t*>(pc_) & 0xFFFF; |
| 439 | #endif |
| 440 | // It is safe to store 8-bytes, as CheckBuffer() guarantees we have kGap |
| 441 | // space left over. |
| 442 | *reinterpret_cast<uint64_t*>(pc_) = x; |
| 443 | pc_ += 6; |
| 444 | } |
| 445 | |
| 446 | bool Operand::is_reg() const { return rm_.is_valid(); } |
| 447 | |
| 448 | // Fetch the 32bit value from the FIXED_SEQUENCE IIHF / IILF |
| 449 | Address Assembler::target_address_at(Address pc, Address constant_pool) { |
| 450 | // S390 Instruction! |
| 451 | // We want to check for instructions generated by Asm::mov() |
| 452 | Opcode op1 = Instruction::S390OpcodeValue(reinterpret_cast<const byte*>(pc)); |
| 453 | SixByteInstr instr_1 = |
| 454 | Instruction::InstructionBits(reinterpret_cast<const byte*>(pc)); |
| 455 | |
| 456 | if (BRASL == op1 || BRCL == op1) { |
| 457 | int32_t dis = static_cast<int32_t>(instr_1 & 0xFFFFFFFF) * 2; |
| 458 | return reinterpret_cast<Address>(reinterpret_cast<uint64_t>(pc) + dis); |
| 459 | } |
| 460 | |
| 461 | #if V8_TARGET_ARCH_S390X |
| 462 | int instr1_length = |
| 463 | Instruction::InstructionLength(reinterpret_cast<const byte*>(pc)); |
| 464 | Opcode op2 = Instruction::S390OpcodeValue( |
| 465 | reinterpret_cast<const byte*>(pc + instr1_length)); |
| 466 | SixByteInstr instr_2 = Instruction::InstructionBits( |
| 467 | reinterpret_cast<const byte*>(pc + instr1_length)); |
| 468 | // IIHF for hi_32, IILF for lo_32 |
| 469 | if (IIHF == op1 && IILF == op2) { |
| 470 | return reinterpret_cast<Address>(((instr_1 & 0xFFFFFFFF) << 32) | |
| 471 | ((instr_2 & 0xFFFFFFFF))); |
| 472 | } |
| 473 | #else |
| 474 | // IILF loads 32-bits |
| 475 | if (IILF == op1 || CFI == op1) { |
| 476 | return reinterpret_cast<Address>((instr_1 & 0xFFFFFFFF)); |
| 477 | } |
| 478 | #endif |
| 479 | |
| 480 | UNIMPLEMENTED(); |
| 481 | return (Address)0; |
| 482 | } |
| 483 | |
| 484 | // This sets the branch destination (which gets loaded at the call address). |
| 485 | // This is for calls and branches within generated code. The serializer |
| 486 | // has already deserialized the mov instructions etc. |
| 487 | // There is a FIXED_SEQUENCE assumption here |
| 488 | void Assembler::deserialization_set_special_target_at( |
| 489 | Isolate* isolate, Address instruction_payload, Code* code, Address target) { |
| 490 | set_target_address_at(isolate, instruction_payload, code, target); |
| 491 | } |
| 492 | |
| 493 | void Assembler::deserialization_set_target_internal_reference_at( |
| 494 | Isolate* isolate, Address pc, Address target, RelocInfo::Mode mode) { |
| 495 | if (RelocInfo::IsInternalReferenceEncoded(mode)) { |
| 496 | Code* code = NULL; |
| 497 | set_target_address_at(isolate, pc, code, target, SKIP_ICACHE_FLUSH); |
| 498 | } else { |
| 499 | Memory::Address_at(pc) = target; |
| 500 | } |
| 501 | } |
| 502 | |
| 503 | // This code assumes the FIXED_SEQUENCE of IIHF/IILF |
| 504 | void Assembler::set_target_address_at(Isolate* isolate, Address pc, |
| 505 | Address constant_pool, Address target, |
| 506 | ICacheFlushMode icache_flush_mode) { |
| 507 | // Check for instructions generated by Asm::mov() |
| 508 | Opcode op1 = Instruction::S390OpcodeValue(reinterpret_cast<const byte*>(pc)); |
| 509 | SixByteInstr instr_1 = |
| 510 | Instruction::InstructionBits(reinterpret_cast<const byte*>(pc)); |
| 511 | bool patched = false; |
| 512 | |
| 513 | if (BRASL == op1 || BRCL == op1) { |
| 514 | instr_1 >>= 32; // Zero out the lower 32-bits |
| 515 | instr_1 <<= 32; |
| 516 | int32_t halfwords = (target - pc) / 2; // number of halfwords |
| 517 | instr_1 |= static_cast<uint32_t>(halfwords); |
| 518 | Instruction::SetInstructionBits<SixByteInstr>(reinterpret_cast<byte*>(pc), |
| 519 | instr_1); |
| 520 | if (icache_flush_mode != SKIP_ICACHE_FLUSH) { |
| 521 | Assembler::FlushICache(isolate, pc, 6); |
| 522 | } |
| 523 | patched = true; |
| 524 | } else { |
| 525 | #if V8_TARGET_ARCH_S390X |
| 526 | int instr1_length = |
| 527 | Instruction::InstructionLength(reinterpret_cast<const byte*>(pc)); |
| 528 | Opcode op2 = Instruction::S390OpcodeValue( |
| 529 | reinterpret_cast<const byte*>(pc + instr1_length)); |
| 530 | SixByteInstr instr_2 = Instruction::InstructionBits( |
| 531 | reinterpret_cast<const byte*>(pc + instr1_length)); |
| 532 | // IIHF for hi_32, IILF for lo_32 |
| 533 | if (IIHF == op1 && IILF == op2) { |
| 534 | // IIHF |
| 535 | instr_1 >>= 32; // Zero out the lower 32-bits |
| 536 | instr_1 <<= 32; |
| 537 | instr_1 |= reinterpret_cast<uint64_t>(target) >> 32; |
| 538 | |
| 539 | Instruction::SetInstructionBits<SixByteInstr>(reinterpret_cast<byte*>(pc), |
| 540 | instr_1); |
| 541 | |
| 542 | // IILF |
| 543 | instr_2 >>= 32; |
| 544 | instr_2 <<= 32; |
| 545 | instr_2 |= reinterpret_cast<uint64_t>(target) & 0xFFFFFFFF; |
| 546 | |
| 547 | Instruction::SetInstructionBits<SixByteInstr>( |
| 548 | reinterpret_cast<byte*>(pc + instr1_length), instr_2); |
| 549 | if (icache_flush_mode != SKIP_ICACHE_FLUSH) { |
| 550 | Assembler::FlushICache(isolate, pc, 12); |
| 551 | } |
| 552 | patched = true; |
| 553 | } |
| 554 | #else |
| 555 | // IILF loads 32-bits |
| 556 | if (IILF == op1 || CFI == op1) { |
| 557 | instr_1 >>= 32; // Zero out the lower 32-bits |
| 558 | instr_1 <<= 32; |
| 559 | instr_1 |= reinterpret_cast<uint32_t>(target); |
| 560 | |
| 561 | Instruction::SetInstructionBits<SixByteInstr>(reinterpret_cast<byte*>(pc), |
| 562 | instr_1); |
| 563 | if (icache_flush_mode != SKIP_ICACHE_FLUSH) { |
| 564 | Assembler::FlushICache(isolate, pc, 6); |
| 565 | } |
| 566 | patched = true; |
| 567 | } |
| 568 | #endif |
| 569 | } |
| 570 | if (!patched) UNREACHABLE(); |
| 571 | } |
| 572 | |
| 573 | } // namespace internal |
| 574 | } // namespace v8 |
| 575 | |
| 576 | #endif // V8_S390_ASSEMBLER_S390_INL_H_ |