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Steve Blocka7e24c12009-10-30 11:49:00 +00001// Copyright 2009 the V8 project authors. All rights reserved.
2// Redistribution and use in source and binary forms, with or without
3// modification, are permitted provided that the following conditions are
4// met:
5//
6// * Redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer.
8// * Redistributions in binary form must reproduce the above
9// copyright notice, this list of conditions and the following
10// disclaimer in the documentation and/or other materials provided
11// with the distribution.
12// * Neither the name of Google Inc. nor the names of its
13// contributors may be used to endorse or promote products derived
14// from this software without specific prior written permission.
15//
16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
28
29// Declares a Simulator for ARM instructions if we are not generating a native
30// ARM binary. This Simulator allows us to run and debug ARM code generation on
31// regular desktop machines.
32// V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro,
33// which will start execution in the Simulator or forwards to the real entry
34// on a ARM HW platform.
35
36#ifndef V8_ARM_SIMULATOR_ARM_H_
37#define V8_ARM_SIMULATOR_ARM_H_
38
39#include "allocation.h"
40
41#if defined(__arm__)
42
43// When running without a simulator we call the entry directly.
44#define CALL_GENERATED_CODE(entry, p0, p1, p2, p3, p4) \
45 (entry(p0, p1, p2, p3, p4))
46
47// The stack limit beyond which we will throw stack overflow errors in
48// generated code. Because generated code on arm uses the C stack, we
49// just use the C stack limit.
50class SimulatorStack : public v8::internal::AllStatic {
51 public:
52 static inline uintptr_t JsLimitFromCLimit(uintptr_t c_limit) {
53 return c_limit;
54 }
Steve Blockd0582a62009-12-15 09:54:21 +000055
56 static inline uintptr_t RegisterCTryCatch(uintptr_t try_catch_address) {
57 return try_catch_address;
58 }
59
60 static inline void UnregisterCTryCatch() { }
Steve Blocka7e24c12009-10-30 11:49:00 +000061};
62
63
64// Call the generated regexp code directly. The entry function pointer should
65// expect seven int/pointer sized arguments and return an int.
66#define CALL_GENERATED_REGEXP_CODE(entry, p0, p1, p2, p3, p4, p5, p6) \
67 entry(p0, p1, p2, p3, p4, p5, p6)
68
Steve Blockd0582a62009-12-15 09:54:21 +000069#define TRY_CATCH_FROM_ADDRESS(try_catch_address) \
70 reinterpret_cast<TryCatch*>(try_catch_address)
71
72
Steve Blocka7e24c12009-10-30 11:49:00 +000073#else // defined(__arm__)
74
75// When running with the simulator transition into simulated execution at this
76// point.
77#define CALL_GENERATED_CODE(entry, p0, p1, p2, p3, p4) \
78 reinterpret_cast<Object*>( \
79 assembler::arm::Simulator::current()->Call(FUNCTION_ADDR(entry), 5, \
80 p0, p1, p2, p3, p4))
81
82#define CALL_GENERATED_REGEXP_CODE(entry, p0, p1, p2, p3, p4, p5, p6) \
83 assembler::arm::Simulator::current()->Call( \
84 FUNCTION_ADDR(entry), 7, p0, p1, p2, p3, p4, p5, p6)
85
Steve Blockd0582a62009-12-15 09:54:21 +000086#define TRY_CATCH_FROM_ADDRESS(try_catch_address) \
87 try_catch_address == NULL ? \
88 NULL : *(reinterpret_cast<TryCatch**>(try_catch_address))
89
90
Steve Blocka7e24c12009-10-30 11:49:00 +000091#include "constants-arm.h"
92
93
94namespace assembler {
95namespace arm {
96
97class Simulator {
98 public:
99 friend class Debugger;
Steve Blocka7e24c12009-10-30 11:49:00 +0000100 enum Register {
101 no_reg = -1,
102 r0 = 0, r1, r2, r3, r4, r5, r6, r7,
103 r8, r9, r10, r11, r12, r13, r14, r15,
104 num_registers,
105 sp = 13,
106 lr = 14,
Steve Blockd0582a62009-12-15 09:54:21 +0000107 pc = 15,
108 s0 = 0, s1, s2, s3, s4, s5, s6, s7,
109 s8, s9, s10, s11, s12, s13, s14, s15,
110 s16, s17, s18, s19, s20, s21, s22, s23,
111 s24, s25, s26, s27, s28, s29, s30, s31,
112 num_s_registers = 32,
113 d0 = 0, d1, d2, d3, d4, d5, d6, d7,
114 d8, d9, d10, d11, d12, d13, d14, d15,
115 num_d_registers = 16
Steve Blocka7e24c12009-10-30 11:49:00 +0000116 };
117
118 Simulator();
119 ~Simulator();
120
121 // The currently executing Simulator instance. Potentially there can be one
122 // for each native thread.
123 static Simulator* current();
124
125 // Accessors for register state. Reading the pc value adheres to the ARM
126 // architecture specification and is off by a 8 from the currently executing
127 // instruction.
128 void set_register(int reg, int32_t value);
129 int32_t get_register(int reg) const;
130
Steve Blockd0582a62009-12-15 09:54:21 +0000131 // Support for VFP.
132 void set_s_register(int reg, unsigned int value);
133 unsigned int get_s_register(int reg) const;
134 void set_d_register_from_double(int dreg, const double& dbl);
135 double get_double_from_d_register(int dreg);
136 void set_s_register_from_float(int sreg, const float dbl);
137 float get_float_from_s_register(int sreg);
138 void set_s_register_from_sinteger(int reg, const int value);
139 int get_sinteger_from_s_register(int reg);
140
Steve Blocka7e24c12009-10-30 11:49:00 +0000141 // Special case of set_register and get_register to access the raw PC value.
142 void set_pc(int32_t value);
143 int32_t get_pc() const;
144
145 // Accessor to the internal simulator stack area.
146 uintptr_t StackLimit() const;
147
148 // Executes ARM instructions until the PC reaches end_sim_pc.
149 void Execute();
150
151 // Call on program start.
152 static void Initialize();
153
154 // V8 generally calls into generated JS code with 5 parameters and into
155 // generated RegExp code with 7 parameters. This is a convenience function,
156 // which sets up the simulator state and grabs the result on return.
157 int32_t Call(byte* entry, int argument_count, ...);
158
Steve Blockd0582a62009-12-15 09:54:21 +0000159 // Push an address onto the JS stack.
160 uintptr_t PushAddress(uintptr_t address);
161
162 // Pop an address from the JS stack.
163 uintptr_t PopAddress();
164
Steve Blocka7e24c12009-10-30 11:49:00 +0000165 private:
166 enum special_values {
167 // Known bad pc value to ensure that the simulator does not execute
168 // without being properly setup.
169 bad_lr = -1,
170 // A pc value used to signal the simulator to stop execution. Generally
171 // the lr is set to this value on transition from native C code to
172 // simulated execution, so that the simulator can "return" to the native
173 // C code.
174 end_sim_pc = -2
175 };
176
177 // Unsupported instructions use Format to print an error and stop execution.
178 void Format(Instr* instr, const char* format);
179
180 // Checks if the current instruction should be executed based on its
181 // condition bits.
182 bool ConditionallyExecute(Instr* instr);
183
184 // Helper functions to set the conditional flags in the architecture state.
185 void SetNZFlags(int32_t val);
186 void SetCFlag(bool val);
187 void SetVFlag(bool val);
188 bool CarryFrom(int32_t left, int32_t right);
189 bool BorrowFrom(int32_t left, int32_t right);
190 bool OverflowFrom(int32_t alu_out,
191 int32_t left,
192 int32_t right,
193 bool addition);
194
Steve Blockd0582a62009-12-15 09:54:21 +0000195 // Support for VFP.
196 void Compute_FPSCR_Flags(double val1, double val2);
197 void Copy_FPSCR_to_APSR();
198
Steve Blocka7e24c12009-10-30 11:49:00 +0000199 // Helper functions to decode common "addressing" modes
200 int32_t GetShiftRm(Instr* instr, bool* carry_out);
201 int32_t GetImm(Instr* instr, bool* carry_out);
202 void HandleRList(Instr* instr, bool load);
203 void SoftwareInterrupt(Instr* instr);
204
205 // Read and write memory.
206 inline uint8_t ReadBU(int32_t addr);
207 inline int8_t ReadB(int32_t addr);
208 inline void WriteB(int32_t addr, uint8_t value);
209 inline void WriteB(int32_t addr, int8_t value);
210
211 inline uint16_t ReadHU(int32_t addr, Instr* instr);
212 inline int16_t ReadH(int32_t addr, Instr* instr);
213 // Note: Overloaded on the sign of the value.
214 inline void WriteH(int32_t addr, uint16_t value, Instr* instr);
215 inline void WriteH(int32_t addr, int16_t value, Instr* instr);
216
217 inline int ReadW(int32_t addr, Instr* instr);
218 inline void WriteW(int32_t addr, int value, Instr* instr);
219
220 // Executing is handled based on the instruction type.
221 void DecodeType01(Instr* instr); // both type 0 and type 1 rolled into one
222 void DecodeType2(Instr* instr);
223 void DecodeType3(Instr* instr);
224 void DecodeType4(Instr* instr);
225 void DecodeType5(Instr* instr);
226 void DecodeType6(Instr* instr);
227 void DecodeType7(Instr* instr);
228 void DecodeUnconditional(Instr* instr);
229
Steve Blockd0582a62009-12-15 09:54:21 +0000230 // Support for VFP.
231 void DecodeTypeVFP(Instr* instr);
232 void DecodeType6CoprocessorIns(Instr* instr);
233
Steve Blocka7e24c12009-10-30 11:49:00 +0000234 // Executes one instruction.
235 void InstructionDecode(Instr* instr);
236
237 // Runtime call support.
238 static void* RedirectExternalReference(void* external_function,
239 bool fp_return);
240
241 // For use in calls that take two double values, constructed from r0, r1, r2
242 // and r3.
243 void GetFpArgs(double* x, double* y);
244 void SetFpResult(const double& result);
245 void TrashCallerSaveRegisters();
246
Steve Blockd0582a62009-12-15 09:54:21 +0000247 // Architecture state.
Steve Blocka7e24c12009-10-30 11:49:00 +0000248 int32_t registers_[16];
249 bool n_flag_;
250 bool z_flag_;
251 bool c_flag_;
252 bool v_flag_;
253
Steve Blockd0582a62009-12-15 09:54:21 +0000254 // VFP architecture state.
255 unsigned int vfp_register[num_s_registers];
256 bool n_flag_FPSCR_;
257 bool z_flag_FPSCR_;
258 bool c_flag_FPSCR_;
259 bool v_flag_FPSCR_;
260
261 // VFP FP exception flags architecture state.
262 bool inv_op_vfp_flag_;
263 bool div_zero_vfp_flag_;
264 bool overflow_vfp_flag_;
265 bool underflow_vfp_flag_;
266 bool inexact_vfp_flag_;
267
268 // Simulator support.
Steve Blocka7e24c12009-10-30 11:49:00 +0000269 char* stack_;
270 bool pc_modified_;
271 int icount_;
272 static bool initialized_;
273
Steve Blockd0582a62009-12-15 09:54:21 +0000274 // Registered breakpoints.
Steve Blocka7e24c12009-10-30 11:49:00 +0000275 Instr* break_pc_;
276 instr_t break_instr_;
277};
278
279} } // namespace assembler::arm
280
281
282// The simulator has its own stack. Thus it has a different stack limit from
283// the C-based native code. Setting the c_limit to indicate a very small
284// stack cause stack overflow errors, since the simulator ignores the input.
285// This is unlikely to be an issue in practice, though it might cause testing
286// trouble down the line.
287class SimulatorStack : public v8::internal::AllStatic {
288 public:
289 static inline uintptr_t JsLimitFromCLimit(uintptr_t c_limit) {
290 return assembler::arm::Simulator::current()->StackLimit();
291 }
Steve Blockd0582a62009-12-15 09:54:21 +0000292
293 static inline uintptr_t RegisterCTryCatch(uintptr_t try_catch_address) {
294 assembler::arm::Simulator* sim = assembler::arm::Simulator::current();
295 return sim->PushAddress(try_catch_address);
296 }
297
298 static inline void UnregisterCTryCatch() {
299 assembler::arm::Simulator::current()->PopAddress();
300 }
Steve Blocka7e24c12009-10-30 11:49:00 +0000301};
302
303
304#endif // defined(__arm__)
305
306#endif // V8_ARM_SIMULATOR_ARM_H_