blob: e856e6346a1a773732fe9d26e47fefb5956f3592 [file] [log] [blame]
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001/*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
Greg Hackmann86eb1c62012-05-30 09:25:51 -070016#include <errno.h>
17#include <fcntl.h>
Greg Hackmann29724852012-07-23 15:31:10 -070018#include <poll.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070019#include <pthread.h>
20#include <stdio.h>
21#include <stdlib.h>
22
23#include <sys/ioctl.h>
24#include <sys/mman.h>
25#include <sys/time.h>
26#include <sys/resource.h>
27
28#include <s3c-fb.h>
29
30#include <EGL/egl.h>
31
Erik Gilling87e707e2012-06-29 17:35:13 -070032#define HWC_REMOVE_DEPRECATED_VERSIONS 1
33
Greg Hackmann86eb1c62012-05-30 09:25:51 -070034#include <cutils/log.h>
35#include <hardware/gralloc.h>
36#include <hardware/hardware.h>
37#include <hardware/hwcomposer.h>
38#include <hardware_legacy/uevent.h>
39#include <utils/Vector.h>
40
Greg Hackmannf4cc0c32012-05-30 09:28:52 -070041#include <sync/sync.h>
42
Greg Hackmann86eb1c62012-05-30 09:25:51 -070043#include "ion.h"
44#include "gralloc_priv.h"
Benoit Gobycdd61b32012-07-09 12:09:59 -070045#include "exynos_gscaler.h"
Greg Hackmann9130e702012-07-30 14:53:04 -070046#include "exynos_format.h"
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -070047#include "videodev2.h"
Greg Hackmann86eb1c62012-05-30 09:25:51 -070048
Greg Hackmannf6f2e542012-07-16 16:10:27 -070049struct hwc_callback_entry {
50 void (*callback)(void *, private_handle_t *);
51 void *data;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070052};
53typedef android::Vector<struct hwc_callback_entry> hwc_callback_queue_t;
54
Greg Hackmann31991d52012-07-13 13:23:11 -070055const size_t NUM_HW_WINDOWS = 5;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070056const size_t NO_FB_NEEDED = NUM_HW_WINDOWS + 1;
Greg Hackmann31991d52012-07-13 13:23:11 -070057const size_t MAX_PIXELS = 2560 * 1600 * 2;
Greg Hackmann49e51082012-07-31 09:50:38 -070058const size_t NUM_GSC_UNITS = 3;
Greg Hackmann9130e702012-07-30 14:53:04 -070059const size_t GSC_W_ALIGNMENT = 16;
60const size_t GSC_H_ALIGNMENT = 16;
Greg Hackmann49e51082012-07-31 09:50:38 -070061const int CAMERA_GSC_IDX = 2;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070062
Erik Gilling87e707e2012-06-29 17:35:13 -070063struct exynos5_hwc_composer_device_1_t;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070064
Greg Hackmann9130e702012-07-30 14:53:04 -070065struct exynos5_gsc_map_t {
66 enum {
67 GSC_NONE = 0,
68 GSC_M2M,
69 // TODO: GSC_LOCAL_PATH
70 } mode;
71 int idx;
72};
73
Greg Hackmann86eb1c62012-05-30 09:25:51 -070074struct exynos5_hwc_post_data_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -070075 exynos5_hwc_composer_device_1_t *pdev;
76 int overlay_map[NUM_HW_WINDOWS];
Greg Hackmann9130e702012-07-30 14:53:04 -070077 exynos5_gsc_map_t gsc_map[NUM_HW_WINDOWS];
Greg Hackmannf6f2e542012-07-16 16:10:27 -070078 hwc_layer_1_t overlays[NUM_HW_WINDOWS];
79 int num_overlays;
80 size_t fb_window;
81 int fence;
82 pthread_mutex_t completion_lock;
83 pthread_cond_t completion;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070084};
85
Greg Hackmann9130e702012-07-30 14:53:04 -070086const size_t NUM_GSC_DST_BUFS = 2;
87struct exynos5_gsc_data_t {
88 void *gsc;
89 exynos_gsc_img src_cfg;
90 exynos_gsc_img dst_cfg;
91 buffer_handle_t dst_buf[NUM_GSC_DST_BUFS];
92 size_t current_buf;
93};
94
Erik Gilling87e707e2012-06-29 17:35:13 -070095struct exynos5_hwc_composer_device_1_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -070096 hwc_composer_device_1_t base;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070097
Greg Hackmannf6f2e542012-07-16 16:10:27 -070098 int fd;
Greg Hackmann29724852012-07-23 15:31:10 -070099 int vsync_fd;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700100 exynos5_hwc_post_data_t bufs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700101
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700102 const private_module_t *gralloc_module;
Greg Hackmann9130e702012-07-30 14:53:04 -0700103 alloc_device_t *alloc_device;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700104 hwc_procs_t *procs;
105 pthread_t vsync_thread;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700106
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700107 int hdmi_fd;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700108 bool hdmi_hpd;
109 bool hdmi_mirroring;
110 void *hdmi_gsc;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700111 exynos_gsc_img hdmi_cfg;
Greg Hackmann9130e702012-07-30 14:53:04 -0700112
113 exynos5_gsc_data_t gsc[NUM_GSC_UNITS];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700114};
115
Greg Hackmann9130e702012-07-30 14:53:04 -0700116static void dump_handle(private_handle_t *h)
117{
118 ALOGV("\t\tformat = %d, width = %u, height = %u, stride = %u",
119 h->format, h->width, h->height, h->stride);
120}
121
Erik Gilling87e707e2012-06-29 17:35:13 -0700122static void dump_layer(hwc_layer_1_t const *l)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700123{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700124 ALOGV("\ttype=%d, flags=%08x, handle=%p, tr=%02x, blend=%04x, "
125 "{%d,%d,%d,%d}, {%d,%d,%d,%d}",
126 l->compositionType, l->flags, l->handle, l->transform,
127 l->blending,
128 l->sourceCrop.left,
129 l->sourceCrop.top,
130 l->sourceCrop.right,
131 l->sourceCrop.bottom,
132 l->displayFrame.left,
133 l->displayFrame.top,
134 l->displayFrame.right,
135 l->displayFrame.bottom);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700136
Greg Hackmann9130e702012-07-30 14:53:04 -0700137 if(l->handle && !(l->flags & HWC_SKIP_LAYER))
138 dump_handle(private_handle_t::dynamicCast(l->handle));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700139}
140
141static void dump_config(s3c_fb_win_config &c)
142{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700143 ALOGV("\tstate = %u", c.state);
144 if (c.state == c.S3C_FB_WIN_STATE_BUFFER) {
145 ALOGV("\t\tfd = %d, offset = %u, stride = %u, "
146 "x = %d, y = %d, w = %u, h = %u, "
147 "format = %u",
148 c.fd, c.offset, c.stride,
149 c.x, c.y, c.w, c.h,
150 c.format);
151 }
152 else if (c.state == c.S3C_FB_WIN_STATE_COLOR) {
153 ALOGV("\t\tcolor = %u", c.color);
154 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700155}
156
Greg Hackmann9130e702012-07-30 14:53:04 -0700157static void dump_gsc_img(exynos_gsc_img &c)
158{
159 ALOGV("\tx = %u, y = %u, w = %u, h = %u, fw = %u, fh = %u",
160 c.x, c.y, c.w, c.h, c.fw, c.fh);
161 ALOGV("\taddr = {%u, %u, %u}, rot = %u, cacheable = %u, drmMode = %u",
162 c.yaddr, c.uaddr, c.vaddr, c.rot, c.cacheable, c.drmMode);
163}
164
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700165inline int WIDTH(const hwc_rect &rect) { return rect.right - rect.left; }
166inline int HEIGHT(const hwc_rect &rect) { return rect.bottom - rect.top; }
Greg Hackmann31991d52012-07-13 13:23:11 -0700167template<typename T> inline T max(T a, T b) { return (a > b) ? a : b; }
168template<typename T> inline T min(T a, T b) { return (a < b) ? a : b; }
169
170static bool is_transformed(const hwc_layer_1_t &layer)
171{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700172 return layer.transform != 0;
Greg Hackmann31991d52012-07-13 13:23:11 -0700173}
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700174
Greg Hackmann9130e702012-07-30 14:53:04 -0700175static bool is_rotated(const hwc_layer_1_t &layer)
176{
177 return (layer.transform & HAL_TRANSFORM_ROT_90) ||
178 (layer.transform & HAL_TRANSFORM_ROT_180);
179}
180
Erik Gilling87e707e2012-06-29 17:35:13 -0700181static bool is_scaled(const hwc_layer_1_t &layer)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700182{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700183 return WIDTH(layer.displayFrame) != WIDTH(layer.sourceCrop) ||
184 HEIGHT(layer.displayFrame) != HEIGHT(layer.sourceCrop);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700185}
186
187static enum s3c_fb_pixel_format exynos5_format_to_s3c_format(int format)
188{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700189 switch (format) {
190 case HAL_PIXEL_FORMAT_RGBA_8888:
191 return S3C_FB_PIXEL_FORMAT_RGBA_8888;
192 case HAL_PIXEL_FORMAT_RGBX_8888:
193 return S3C_FB_PIXEL_FORMAT_RGBX_8888;
194 case HAL_PIXEL_FORMAT_RGBA_5551:
195 return S3C_FB_PIXEL_FORMAT_RGBA_5551;
196 case HAL_PIXEL_FORMAT_RGBA_4444:
197 return S3C_FB_PIXEL_FORMAT_RGBA_4444;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700198
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700199 default:
200 return S3C_FB_PIXEL_FORMAT_MAX;
201 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700202}
203
204static bool exynos5_format_is_supported(int format)
205{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700206 return exynos5_format_to_s3c_format(format) < S3C_FB_PIXEL_FORMAT_MAX;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700207}
208
209static bool exynos5_format_is_supported_by_gscaler(int format)
210{
Greg Hackmann9130e702012-07-30 14:53:04 -0700211 switch (format) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700212 case HAL_PIXEL_FORMAT_RGBX_8888:
213 case HAL_PIXEL_FORMAT_RGB_565:
214 case HAL_PIXEL_FORMAT_YV12:
Greg Hackmann9130e702012-07-30 14:53:04 -0700215 case HAL_PIXEL_FORMAT_YCbCr_420_P:
216 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
217 case HAL_PIXEL_FORMAT_CUSTOM_YCbCr_422_SP:
218 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
219 case HAL_PIXEL_FORMAT_CUSTOM_YCbCr_420_SP:
220 case HAL_PIXEL_FORMAT_YCbCr_422_I:
221 case HAL_PIXEL_FORMAT_CUSTOM_YCbCr_422_I:
222 case HAL_PIXEL_FORMAT_YCbCr_422_P:
223 case HAL_PIXEL_FORMAT_CbYCrY_422_I:
224 case HAL_PIXEL_FORMAT_CUSTOM_CbYCrY_422_I:
225 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
226 case HAL_PIXEL_FORMAT_CUSTOM_YCrCb_422_SP:
227 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
228 case HAL_PIXEL_FORMAT_CUSTOM_YCrCb_420_SP:
229 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
230 case HAL_PIXEL_FORMAT_CUSTOM_YCbCr_420_SP_TILED:
231 case HAL_PIXEL_FORMAT_CUSTOM_YCrCb_422_I:
232 case HAL_PIXEL_FORMAT_CUSTOM_CrYCbY_422_I:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700233 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700234
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700235 default:
236 return false;
237 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700238}
239
Greg Hackmann296668e2012-08-14 15:51:40 -0700240static bool exynos5_format_is_ycrcb(int format)
241{
242 return format == HAL_PIXEL_FORMAT_YV12;
243}
244
Greg Hackmann9130e702012-07-30 14:53:04 -0700245static bool exynos5_format_requires_gscaler(int format)
246{
247 return exynos5_format_is_supported_by_gscaler(format) &&
248 format != HAL_PIXEL_FORMAT_RGBX_8888;
249}
250
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700251static uint8_t exynos5_format_to_bpp(int format)
252{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700253 switch (format) {
254 case HAL_PIXEL_FORMAT_RGBA_8888:
255 case HAL_PIXEL_FORMAT_RGBX_8888:
256 return 32;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700257
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700258 case HAL_PIXEL_FORMAT_RGBA_5551:
259 case HAL_PIXEL_FORMAT_RGBA_4444:
260 return 16;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700261
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700262 default:
263 ALOGW("unrecognized pixel format %u", format);
264 return 0;
265 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700266}
267
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700268static bool exynos5_supports_gscaler(hwc_layer_1_t &layer, int format,
269 bool local_path)
Greg Hackmann9130e702012-07-30 14:53:04 -0700270{
271 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
272
273 int max_w = is_rotated(layer) ? 2048 : 4800;
274 int max_h = is_rotated(layer) ? 2048 : 3344;
275
276 bool rot90or270 = !!(layer.transform & HAL_TRANSFORM_ROT_90);
277 // n.b.: HAL_TRANSFORM_ROT_270 = HAL_TRANSFORM_ROT_90 |
278 // HAL_TRANSFORM_ROT_180
279
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700280 int src_w = WIDTH(layer.sourceCrop), src_h = HEIGHT(layer.sourceCrop);
281 int dest_w, dest_h;
282 if (rot90or270) {
283 dest_w = HEIGHT(layer.displayFrame);
284 dest_h = WIDTH(layer.displayFrame);
285 } else {
286 dest_w = WIDTH(layer.displayFrame);
287 dest_h = HEIGHT(layer.displayFrame);
288 }
289 int max_downscale = local_path ? 4 : 16;
290 const int max_upscale = 8;
291
Greg Hackmann9130e702012-07-30 14:53:04 -0700292 return exynos5_format_is_supported_by_gscaler(format) &&
293 handle->stride <= max_w &&
294 handle->stride % GSC_W_ALIGNMENT == 0 &&
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700295 src_w <= dest_w * max_downscale &&
296 dest_w <= src_w * max_upscale &&
Greg Hackmann9130e702012-07-30 14:53:04 -0700297 handle->height <= max_h &&
298 handle->height % GSC_H_ALIGNMENT == 0 &&
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700299 src_h <= dest_h * max_downscale &&
300 dest_h <= src_h * max_upscale &&
Greg Hackmann9130e702012-07-30 14:53:04 -0700301 // per 46.2
302 (!rot90or270 || layer.sourceCrop.top % 2 == 0) &&
303 (!rot90or270 || layer.sourceCrop.left % 2 == 0);
304 // per 46.3.1.6
305}
306
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700307int hdmi_get_config(struct exynos5_hwc_composer_device_1_t *dev)
308{
309 struct v4l2_dv_preset preset;
310 struct v4l2_dv_enum_preset enum_preset;
311 exynos_gsc_img *info = &dev->hdmi_cfg;
312 int index = 0;
313 bool found = false;
314 int ret;
315
316 if (ioctl(dev->hdmi_fd, VIDIOC_G_DV_PRESET, &preset) < 0) {
317 ALOGE("%s: g_dv_preset error, %d", __func__, errno);
318 return -1;
319 }
320
321 while (true) {
322 enum_preset.index = index++;
323 ret = ioctl(dev->hdmi_fd, VIDIOC_ENUM_DV_PRESETS, &enum_preset);
324
325 if (ret < 0) {
326 if (errno == EINVAL)
327 break;
328 ALOGE("%s: enum_dv_presets error, %d", __func__, errno);
329 return -1;
330 }
331
332 ALOGV("%s: %d preset=%02d width=%d height=%d name=%s",
333 __func__, enum_preset.index, enum_preset.preset,
334 enum_preset.width, enum_preset.height, enum_preset.name);
335
336 if (preset.preset == enum_preset.preset) {
337 info->w = enum_preset.width;
338 info->h = enum_preset.height;
339 info->fw = enum_preset.width;
340 info->fh = enum_preset.height;
341 info->format = HAL_PIXEL_FORMAT_YV12;
342 found = true;
343 }
344 }
345
346 return found ? 0 : -1;
347}
348
Benoit Gobycdd61b32012-07-09 12:09:59 -0700349static int hdmi_enable(struct exynos5_hwc_composer_device_1_t *dev)
350{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700351 if (dev->hdmi_mirroring)
352 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700353
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700354 exynos_gsc_img src_info;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700355 int src_w = 2560;
356 int src_h = 1600;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700357
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700358 dev->hdmi_gsc = exynos_gsc_create_exclusive(3, GSC_OUTPUT_MODE, GSC_OUT_TV);
359 if (!dev->hdmi_gsc) {
360 ALOGE("%s: exynos_gsc_create_exclusive failed", __func__);
361 return -ENODEV;
362 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700363
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700364 memset(&src_info, 0, sizeof(src_info));
Benoit Gobycdd61b32012-07-09 12:09:59 -0700365
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700366 src_info.w = src_w;
367 src_info.h = src_h;
368 src_info.fw = src_w;
369 src_info.fh = src_h;
370 src_info.format = HAL_PIXEL_FORMAT_BGRA_8888;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700371
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700372 int ret = exynos_gsc_config_exclusive(dev->hdmi_gsc, &src_info, &dev->hdmi_cfg);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700373 if (ret < 0) {
374 ALOGE("%s: exynos_gsc_config_exclusive failed %d", __func__, ret);
375 exynos_gsc_destroy(dev->hdmi_gsc);
376 dev->hdmi_gsc = NULL;
377 return ret;
378 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700379
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700380 dev->hdmi_mirroring = true;
381 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700382}
383
384static void hdmi_disable(struct exynos5_hwc_composer_device_1_t *dev)
385{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700386 if (!dev->hdmi_mirroring)
387 return;
388 exynos_gsc_destroy(dev->hdmi_gsc);
389 dev->hdmi_gsc = NULL;
390 dev->hdmi_mirroring = false;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700391}
392
393static int hdmi_output(struct exynos5_hwc_composer_device_1_t *dev, private_handle_t *fb)
394{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700395 exynos_gsc_img src_info;
396 exynos_gsc_img dst_info;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700397
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700398 memset(&src_info, 0, sizeof(src_info));
399 memset(&dst_info, 0, sizeof(dst_info));
Benoit Gobycdd61b32012-07-09 12:09:59 -0700400
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700401 src_info.yaddr = fb->fd;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700402
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700403 int ret = exynos_gsc_run_exclusive(dev->hdmi_gsc, &src_info, &dst_info);
404 if (ret < 0) {
405 ALOGE("%s: exynos_gsc_run_exclusive failed %d", __func__, ret);
406 return ret;
407 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700408
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700409 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700410}
411
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700412bool exynos5_supports_overlay(hwc_layer_1_t &layer, size_t i)
413{
Greg Hackmannd82ad202012-07-24 13:49:47 -0700414 if (layer.flags & HWC_SKIP_LAYER) {
415 ALOGV("\tlayer %u: skipping", i);
416 return false;
417 }
418
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700419 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700420
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700421 if (!handle) {
422 ALOGV("\tlayer %u: handle is NULL", i);
423 return false;
424 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700425 if (exynos5_format_requires_gscaler(handle->format)) {
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700426 if (!exynos5_supports_gscaler(layer, handle->format, false)) {
Greg Hackmann9130e702012-07-30 14:53:04 -0700427 ALOGV("\tlayer %u: gscaler required but not supported", i);
428 return false;
429 }
430 } else {
431 if (!exynos5_format_is_supported(handle->format)) {
432 ALOGV("\tlayer %u: pixel format %u not supported", i, handle->format);
433 return false;
434 }
435 if (is_scaled(layer)) {
436 ALOGV("\tlayer %u: scaling not supported", i);
437 return false;
438 }
439 if (is_transformed(layer)) {
440 ALOGV("\tlayer %u: transformations not supported", i);
441 return false;
442 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700443 }
444 if (layer.blending != HWC_BLENDING_NONE) {
445 // TODO: support this
446 ALOGV("\tlayer %u: blending not supported", i);
447 return false;
448 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700449
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700450 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700451}
452
Greg Hackmann31991d52012-07-13 13:23:11 -0700453inline bool intersect(const hwc_rect &r1, const hwc_rect &r2)
454{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700455 return !(r1.left > r2.right ||
456 r1.right < r2.left ||
457 r1.top > r2.bottom ||
458 r1.bottom < r2.top);
Greg Hackmann31991d52012-07-13 13:23:11 -0700459}
460
461inline hwc_rect intersection(const hwc_rect &r1, const hwc_rect &r2)
462{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700463 hwc_rect i;
464 i.top = max(r1.top, r2.top);
465 i.bottom = min(r1.bottom, r2.bottom);
466 i.left = max(r1.left, r2.left);
467 i.right = min(r1.right, r2.right);
468 return i;
Greg Hackmann31991d52012-07-13 13:23:11 -0700469}
470
Jesse Halle94046d2012-07-31 14:34:08 -0700471static int exynos5_prepare(hwc_composer_device_1_t *dev,
472 size_t numDisplays, hwc_display_contents_1_t** displays)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700473{
Jesse Halle94046d2012-07-31 14:34:08 -0700474 if (!numDisplays || !displays)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700475 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700476
Jesse Halle94046d2012-07-31 14:34:08 -0700477 ALOGV("preparing %u layers", displays[0]->numHwLayers);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700478
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700479 exynos5_hwc_composer_device_1_t *pdev =
480 (exynos5_hwc_composer_device_1_t *)dev;
481 memset(pdev->bufs.overlays, 0, sizeof(pdev->bufs.overlays));
Greg Hackmann9130e702012-07-30 14:53:04 -0700482 memset(pdev->bufs.gsc_map, 0, sizeof(pdev->bufs.gsc_map));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700483
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700484 bool force_fb = false;
485 if (pdev->hdmi_hpd) {
486 hdmi_enable(pdev);
487 force_fb = true;
488 } else {
489 hdmi_disable(pdev);
490 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700491
Erik Gilling87e707e2012-06-29 17:35:13 -0700492 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
493 pdev->bufs.overlay_map[i] = -1;
494
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700495 bool fb_needed = false;
496 size_t first_fb = 0, last_fb = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700497
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700498 // find unsupported overlays
Jesse Halle94046d2012-07-31 14:34:08 -0700499 for (size_t i = 0; i < displays[0]->numHwLayers; i++) {
500 hwc_layer_1_t &layer = displays[0]->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700501
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700502 if (layer.compositionType == HWC_BACKGROUND && !force_fb) {
503 ALOGV("\tlayer %u: background supported", i);
Jesse Halle94046d2012-07-31 14:34:08 -0700504 dump_layer(&displays[0]->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700505 continue;
506 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700507
Jesse Halle94046d2012-07-31 14:34:08 -0700508 if (exynos5_supports_overlay(displays[0]->hwLayers[i], i) && !force_fb) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700509 ALOGV("\tlayer %u: overlay supported", i);
510 layer.compositionType = HWC_OVERLAY;
Jesse Halle94046d2012-07-31 14:34:08 -0700511 dump_layer(&displays[0]->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700512 continue;
513 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700514
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700515 if (!fb_needed) {
516 first_fb = i;
517 fb_needed = true;
518 }
519 last_fb = i;
520 layer.compositionType = HWC_FRAMEBUFFER;
Greg Hackmann9130e702012-07-30 14:53:04 -0700521
Jesse Halle94046d2012-07-31 14:34:08 -0700522 dump_layer(&displays[0]->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700523 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700524
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700525 // can't composite overlays sandwiched between framebuffers
526 if (fb_needed)
527 for (size_t i = first_fb; i < last_fb; i++)
Jesse Halle94046d2012-07-31 14:34:08 -0700528 displays[0]->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700529
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700530 // Incrementally try to add our supported layers to hardware windows.
531 // If adding a layer would violate a hardware constraint, force it
532 // into the framebuffer and try again. (Revisiting the entire list is
533 // necessary because adding a layer to the framebuffer can cause other
534 // windows to retroactively violate constraints.)
535 bool changed;
536 do {
537 android::Vector<hwc_rect> rects;
538 android::Vector<hwc_rect> overlaps;
Greg Hackmann9130e702012-07-30 14:53:04 -0700539 size_t pixels_left, windows_left, gsc_left = NUM_GSC_UNITS;
Greg Hackmann31991d52012-07-13 13:23:11 -0700540
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700541 if (fb_needed) {
542 hwc_rect_t fb_rect;
543 fb_rect.top = fb_rect.left = 0;
544 fb_rect.right = pdev->gralloc_module->xres - 1;
545 fb_rect.bottom = pdev->gralloc_module->yres - 1;
546 pixels_left = MAX_PIXELS - pdev->gralloc_module->xres *
547 pdev->gralloc_module->yres;
548 windows_left = NUM_HW_WINDOWS - 1;
549 rects.push_back(fb_rect);
550 }
551 else {
552 pixels_left = MAX_PIXELS;
553 windows_left = NUM_HW_WINDOWS;
554 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700555 if (pdev->hdmi_mirroring)
556 gsc_left--;
557
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700558 changed = false;
Greg Hackmann31991d52012-07-13 13:23:11 -0700559
Jesse Halle94046d2012-07-31 14:34:08 -0700560 for (size_t i = 0; i < displays[0]->numHwLayers; i++) {
561 hwc_layer_1_t &layer = displays[0]->hwLayers[i];
Greg Hackmann9130e702012-07-30 14:53:04 -0700562 if (layer.flags & HWC_SKIP_LAYER)
563 continue;
564
565 private_handle_t *handle = private_handle_t::dynamicCast(
566 layer.handle);
Greg Hackmann31991d52012-07-13 13:23:11 -0700567
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700568 // we've already accounted for the framebuffer above
569 if (layer.compositionType == HWC_FRAMEBUFFER)
570 continue;
Greg Hackmann31991d52012-07-13 13:23:11 -0700571
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700572 // only layer 0 can be HWC_BACKGROUND, so we can
573 // unconditionally allow it without extra checks
574 if (layer.compositionType == HWC_BACKGROUND) {
575 windows_left--;
576 continue;
577 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700578
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700579 size_t pixels_needed = WIDTH(layer.displayFrame) *
580 HEIGHT(layer.displayFrame);
581 bool can_compose = windows_left && pixels_needed <= pixels_left;
Greg Hackmann9130e702012-07-30 14:53:04 -0700582 bool gsc_required = exynos5_format_requires_gscaler(handle->format);
583 if (gsc_required)
584 can_compose = can_compose && gsc_left;
Greg Hackmann31991d52012-07-13 13:23:11 -0700585
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700586 // hwc_rect_t right and bottom values are normally exclusive;
587 // the intersection logic is simpler if we make them inclusive
588 hwc_rect_t visible_rect = layer.displayFrame;
589 visible_rect.right--; visible_rect.bottom--;
Greg Hackmann31991d52012-07-13 13:23:11 -0700590
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700591 // no more than 2 layers can overlap on a given pixel
592 for (size_t j = 0; can_compose && j < overlaps.size(); j++) {
593 if (intersect(visible_rect, overlaps.itemAt(j)))
594 can_compose = false;
595 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700596
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700597 if (!can_compose) {
598 layer.compositionType = HWC_FRAMEBUFFER;
599 if (!fb_needed) {
600 first_fb = last_fb = i;
601 fb_needed = true;
602 }
603 else {
604 first_fb = min(i, first_fb);
605 last_fb = max(i, last_fb);
606 }
607 changed = true;
608 break;
609 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700610
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700611 for (size_t j = 0; j < rects.size(); j++) {
612 const hwc_rect_t &other_rect = rects.itemAt(j);
613 if (intersect(visible_rect, other_rect))
614 overlaps.push_back(intersection(visible_rect, other_rect));
615 }
616 rects.push_back(visible_rect);
617 pixels_left -= pixels_needed;
618 windows_left--;
Greg Hackmann9130e702012-07-30 14:53:04 -0700619 if (gsc_required)
620 gsc_left--;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700621 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700622
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700623 if (changed)
624 for (size_t i = first_fb; i < last_fb; i++)
Jesse Halle94046d2012-07-31 14:34:08 -0700625 displays[0]->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700626 } while(changed);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700627
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700628 unsigned int nextWindow = 0;
Greg Hackmann9130e702012-07-30 14:53:04 -0700629 int nextGsc = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700630
Jesse Halle94046d2012-07-31 14:34:08 -0700631 for (size_t i = 0; i < displays[0]->numHwLayers; i++) {
632 hwc_layer_1_t &layer = displays[0]->hwLayers[i];
Greg Hackmann9130e702012-07-30 14:53:04 -0700633 if (layer.flags & HWC_SKIP_LAYER)
634 continue;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700635
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700636 if (fb_needed && i == first_fb) {
637 ALOGV("assigning framebuffer to window %u\n",
638 nextWindow);
639 nextWindow++;
640 continue;
641 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700642
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700643 if (layer.compositionType != HWC_FRAMEBUFFER) {
644 ALOGV("assigning layer %u to window %u", i, nextWindow);
645 pdev->bufs.overlay_map[nextWindow] = i;
Greg Hackmann9130e702012-07-30 14:53:04 -0700646 if (layer.compositionType == HWC_OVERLAY) {
647 private_handle_t *handle =
648 private_handle_t::dynamicCast(layer.handle);
649 if (exynos5_format_requires_gscaler(handle->format)) {
650 ALOGV("\tusing gscaler %u", nextGsc);
651 pdev->bufs.gsc_map[i].mode =
652 exynos5_gsc_map_t::GSC_M2M;
653 pdev->bufs.gsc_map[i].idx = nextGsc++;
Greg Hackmann49e51082012-07-31 09:50:38 -0700654 if (nextGsc == CAMERA_GSC_IDX)
655 nextGsc++;
Greg Hackmann9130e702012-07-30 14:53:04 -0700656 }
657 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700658 nextWindow++;
659 }
660 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700661
Greg Hackmann9130e702012-07-30 14:53:04 -0700662 for (size_t i = nextGsc; i < NUM_GSC_UNITS; i++) {
663 for (size_t j = 0; j < NUM_GSC_DST_BUFS; j++)
664 if (pdev->gsc[i].dst_buf[j])
665 pdev->alloc_device->free(pdev->alloc_device,
666 pdev->gsc[i].dst_buf[j]);
667 memset(&pdev->gsc[i], 0, sizeof(pdev->gsc[i]));
668 }
669
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700670 if (fb_needed)
671 pdev->bufs.fb_window = first_fb;
672 else
673 pdev->bufs.fb_window = NO_FB_NEEDED;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700674
Greg Hackmann9130e702012-07-30 14:53:04 -0700675 return 0;
676}
677
678static inline bool gsc_dst_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
679{
680 return c1.x != c2.x ||
681 c1.y != c2.y ||
682 c1.w != c2.w ||
683 c1.h != c2.h ||
684 c1.format != c2.format ||
685 c1.rot != c2.rot ||
686 c1.cacheable != c2.cacheable ||
687 c1.drmMode != c2.drmMode;
688}
689
690static inline bool gsc_src_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
691{
692 return gsc_dst_cfg_changed(c1, c2) ||
693 c1.fw != c2.fw ||
694 c1.fh != c2.fh;
695}
696
697static int exynos5_config_gsc_m2m(hwc_layer_1_t &layer,
698 alloc_device_t* alloc_device, exynos5_gsc_data_t *gsc_data,
699 int gsc_idx)
700{
701 ALOGV("configuring gscaler %u for memory-to-memory", gsc_idx);
702
703 private_handle_t *src_handle = private_handle_t::dynamicCast(layer.handle);
704 buffer_handle_t dst_buf;
705 private_handle_t *dst_handle;
706 int ret = 0;
707
708 exynos_gsc_img src_cfg, dst_cfg;
709 memset(&src_cfg, 0, sizeof(src_cfg));
710 memset(&dst_cfg, 0, sizeof(dst_cfg));
711
712 src_cfg.x = layer.sourceCrop.left;
713 src_cfg.y = layer.sourceCrop.top;
714 src_cfg.w = WIDTH(layer.sourceCrop);
715 src_cfg.fw = src_handle->stride;
716 src_cfg.h = HEIGHT(layer.sourceCrop);
717 src_cfg.fh = src_handle->height;
718 src_cfg.yaddr = src_handle->fd;
Greg Hackmann296668e2012-08-14 15:51:40 -0700719 if (exynos5_format_is_ycrcb(src_handle->format)) {
720 src_cfg.uaddr = src_handle->fd2;
721 src_cfg.vaddr = src_handle->fd1;
722 } else {
723 src_cfg.uaddr = src_handle->fd1;
724 src_cfg.vaddr = src_handle->fd2;
725 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700726 src_cfg.format = src_handle->format;
727
728 dst_cfg.x = 0;
729 dst_cfg.y = 0;
730 dst_cfg.w = WIDTH(layer.displayFrame);
731 dst_cfg.h = HEIGHT(layer.displayFrame);
Greg Hackmanna00c0432012-07-31 15:20:00 -0700732 dst_cfg.format = HAL_PIXEL_FORMAT_BGRA_8888;
Greg Hackmann9130e702012-07-30 14:53:04 -0700733 dst_cfg.rot = layer.transform;
734
735 ALOGV("source configuration:");
736 dump_gsc_img(src_cfg);
737
738 if (gsc_src_cfg_changed(src_cfg, gsc_data->src_cfg) ||
739 gsc_dst_cfg_changed(dst_cfg, gsc_data->dst_cfg)) {
740 int dst_stride;
741 int usage = GRALLOC_USAGE_SW_READ_NEVER |
742 GRALLOC_USAGE_SW_WRITE_NEVER |
743 GRALLOC_USAGE_HW_COMPOSER;
744 // TODO: add GRALLOC_USAGE_PROTECTED if source buffer is also protected
745
746 int w = ALIGN(WIDTH(layer.displayFrame), GSC_W_ALIGNMENT);
747 int h = ALIGN(HEIGHT(layer.displayFrame), GSC_H_ALIGNMENT);
748
749 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
750 if (gsc_data->dst_buf[i]) {
751 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
752 gsc_data->dst_buf[i] = NULL;
753 }
754
755 int ret = alloc_device->alloc(alloc_device, w, h,
756 HAL_PIXEL_FORMAT_RGBX_8888, usage, &gsc_data->dst_buf[i],
757 &dst_stride);
758 if (ret < 0) {
759 ALOGE("failed to allocate destination buffer: %s",
760 strerror(-ret));
761 goto err_alloc;
762 }
763 }
764
765 gsc_data->current_buf = 0;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700766 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700767
Greg Hackmann9130e702012-07-30 14:53:04 -0700768 dst_buf = gsc_data->dst_buf[gsc_data->current_buf];
769 dst_handle = private_handle_t::dynamicCast(dst_buf);
770
771 dst_cfg.fw = dst_handle->stride;
772 dst_cfg.fh = dst_handle->height;
773 dst_cfg.yaddr = dst_handle->fd;
774
775 ALOGV("destination configuration:");
776 dump_gsc_img(dst_cfg);
777
778 gsc_data->gsc = exynos_gsc_create_exclusive(gsc_idx, GSC_M2M_MODE,
779 GSC_DUMMY);
780 if (!gsc_data->gsc) {
781 ALOGE("failed to create gscaler handle");
782 ret = -1;
783 goto err_alloc;
784 }
785
786 ret = exynos_gsc_config_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
787 if (ret < 0) {
788 ALOGE("failed to configure gscaler %u", gsc_idx);
789 goto err_gsc_config;
790 }
791
792 ret = exynos_gsc_run_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
793 if (ret < 0) {
794 ALOGE("failed to run gscaler %u", gsc_idx);
795 goto err_gsc_config;
796 }
797
798 gsc_data->src_cfg = src_cfg;
799 gsc_data->dst_cfg = dst_cfg;
800
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700801 return 0;
Greg Hackmann9130e702012-07-30 14:53:04 -0700802
803err_gsc_config:
804 exynos_gsc_destroy(gsc_data->gsc);
805 gsc_data->gsc = NULL;
806err_alloc:
807 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
808 if (gsc_data->dst_buf[i]) {
809 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
810 gsc_data->dst_buf[i] = NULL;
811 }
812 }
813 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700814}
815
816static void exynos5_config_handle(private_handle_t *handle,
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700817 hwc_rect_t &sourceCrop, hwc_rect_t &displayFrame,
818 s3c_fb_win_config &cfg)
819{
820 cfg.state = cfg.S3C_FB_WIN_STATE_BUFFER;
821 cfg.fd = handle->fd;
822 cfg.x = displayFrame.left;
823 cfg.y = displayFrame.top;
824 cfg.w = WIDTH(displayFrame);
825 cfg.h = HEIGHT(displayFrame);
826 cfg.format = exynos5_format_to_s3c_format(handle->format);
827 uint8_t bpp = exynos5_format_to_bpp(handle->format);
828 cfg.offset = (sourceCrop.top * handle->stride + sourceCrop.left) * bpp / 8;
829 cfg.stride = handle->stride * bpp / 8;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700830}
831
Erik Gilling87e707e2012-06-29 17:35:13 -0700832static void exynos5_config_overlay(hwc_layer_1_t *layer, s3c_fb_win_config &cfg,
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700833 const private_module_t *gralloc_module)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700834{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700835 if (layer->compositionType == HWC_BACKGROUND) {
836 hwc_color_t color = layer->backgroundColor;
837 cfg.state = cfg.S3C_FB_WIN_STATE_COLOR;
838 cfg.color = (color.r << 16) | (color.g << 8) | color.b;
839 cfg.x = 0;
840 cfg.y = 0;
841 cfg.w = gralloc_module->xres;
842 cfg.h = gralloc_module->yres;
843 return;
844 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700845
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700846 private_handle_t *handle = private_handle_t::dynamicCast(layer->handle);
847 exynos5_config_handle(handle, layer->sourceCrop, layer->displayFrame, cfg);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700848}
849
850static void exynos5_post_callback(void *data, private_handle_t *fb)
851{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700852 exynos5_hwc_post_data_t *pdata = (exynos5_hwc_post_data_t *)data;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700853
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700854 struct s3c_fb_win_config_data win_data;
855 struct s3c_fb_win_config *config = win_data.config;
856 memset(config, 0, sizeof(win_data.config));
Greg Hackmann9130e702012-07-30 14:53:04 -0700857
858 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
859 if ( pdata->overlay_map[i] != -1) {
860 hwc_layer_1_t &layer = pdata->overlays[i];
861 private_handle_t *handle =
862 private_handle_t::dynamicCast(layer.handle);
863
864 if (layer.acquireFenceFd != -1) {
865 int err = sync_wait(layer.acquireFenceFd, 100);
866 if (err != 0)
867 ALOGW("fence for layer %zu didn't signal in 100 ms: %s",
868 i, strerror(errno));
869 close(layer.acquireFenceFd);
870 }
871
872 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
873 int gsc_idx = pdata->gsc_map[i].idx;
874 exynos5_config_gsc_m2m(layer, pdata->pdev->alloc_device,
875 &pdata->pdev->gsc[gsc_idx], gsc_idx);
876 }
877 }
878 }
879
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700880 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
881 if (i == pdata->fb_window) {
882 hwc_rect_t rect = { 0, 0, fb->width, fb->height };
883 exynos5_config_handle(fb, rect, rect, config[i]);
884 } else if ( pdata->overlay_map[i] != -1) {
Greg Hackmann9130e702012-07-30 14:53:04 -0700885 hwc_layer_1_t &layer = pdata->overlays[i];
886 private_handle_t *handle =
887 private_handle_t::dynamicCast(layer.handle);
888
889 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
890 int gsc_idx = pdata->gsc_map[i].idx;
891 exynos5_gsc_data_t &gsc = pdata->pdev->gsc[gsc_idx];
892
893 if (!gsc.gsc) {
894 ALOGE("failed to queue gscaler %u input for layer %u",
895 gsc_idx, i);
896 continue;
897 }
898
899 int err = exynos_gsc_stop_exclusive(gsc.gsc);
900 exynos_gsc_destroy(gsc.gsc);
901 gsc.gsc = NULL;
902 if (err < 0) {
903 ALOGE("failed to dequeue gscaler output for layer %u", i);
904 continue;
905 }
906
907 buffer_handle_t dst_buf = gsc.dst_buf[gsc.current_buf];
908 gsc.current_buf = (gsc.current_buf + 1) % NUM_GSC_DST_BUFS;
909 private_handle_t *dst_handle =
910 private_handle_t::dynamicCast(dst_buf);
911 exynos5_config_handle(dst_handle, layer.sourceCrop,
912 layer.displayFrame, config[i]);
913 }
914 else {
915 exynos5_config_overlay(&layer, config[i],
916 pdata->pdev->gralloc_module);
Erik Gilling87e707e2012-06-29 17:35:13 -0700917 }
918 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700919 ALOGV("window %u configuration:", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700920 dump_config(config[i]);
921 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700922
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700923 int ret = ioctl(pdata->pdev->fd, S3CFB_WIN_CONFIG, &win_data);
924 if (ret < 0)
925 ALOGE("ioctl S3CFB_WIN_CONFIG failed: %d", errno);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700926
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700927 if (pdata->pdev->hdmi_mirroring)
928 hdmi_output(pdata->pdev, fb);
Benoit Gobycdd61b32012-07-09 12:09:59 -0700929
Erik Gilling87e707e2012-06-29 17:35:13 -0700930 pthread_mutex_lock(&pdata->completion_lock);
931 pdata->fence = win_data.fence;
932 pthread_cond_signal(&pdata->completion);
933 pthread_mutex_unlock(&pdata->completion_lock);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700934}
935
Jesse Halle94046d2012-07-31 14:34:08 -0700936static int exynos5_set(struct hwc_composer_device_1 *dev,
937 size_t numDisplays, hwc_display_contents_1_t** displays)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700938{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700939 exynos5_hwc_composer_device_1_t *pdev =
940 (exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700941
Jesse Halle94046d2012-07-31 14:34:08 -0700942 if (!numDisplays || !displays || !displays[0] || !displays[0]->dpy || !displays[0]->sur)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700943 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700944
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700945 hwc_callback_queue_t *queue = NULL;
946 pthread_mutex_t *lock = NULL;
947 exynos5_hwc_post_data_t *data = NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700948
Jesse Halle94046d2012-07-31 14:34:08 -0700949 if (displays[0]->numHwLayers) {
Erik Gilling87e707e2012-06-29 17:35:13 -0700950 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
951 if (pdev->bufs.overlay_map[i] != -1) {
952 pdev->bufs.overlays[i] =
Jesse Halle94046d2012-07-31 14:34:08 -0700953 displays[0]->hwLayers[pdev->bufs.overlay_map[i]];
Erik Gilling87e707e2012-06-29 17:35:13 -0700954 }
955 }
956
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700957 data = (exynos5_hwc_post_data_t *)
958 malloc(sizeof(exynos5_hwc_post_data_t));
959 memcpy(data, &pdev->bufs, sizeof(pdev->bufs));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700960
Erik Gilling87e707e2012-06-29 17:35:13 -0700961 data->fence = -1;
962 pthread_mutex_init(&data->completion_lock, NULL);
963 pthread_cond_init(&data->completion, NULL);
964
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700965 if (pdev->bufs.fb_window == NO_FB_NEEDED) {
966 exynos5_post_callback(data, NULL);
967 } else {
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700968
Erik Gilling87e707e2012-06-29 17:35:13 -0700969 struct hwc_callback_entry entry;
970 entry.callback = exynos5_post_callback;
971 entry.data = data;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700972
Erik Gilling87e707e2012-06-29 17:35:13 -0700973 queue = reinterpret_cast<hwc_callback_queue_t *>(
974 pdev->gralloc_module->queue);
975 lock = const_cast<pthread_mutex_t *>(
976 &pdev->gralloc_module->queue_lock);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700977
Erik Gilling87e707e2012-06-29 17:35:13 -0700978 pthread_mutex_lock(lock);
979 queue->push_front(entry);
980 pthread_mutex_unlock(lock);
981
Jesse Halle94046d2012-07-31 14:34:08 -0700982 EGLBoolean success = eglSwapBuffers((EGLDisplay)displays[0]->dpy,
983 (EGLSurface)displays[0]->sur);
Erik Gilling87e707e2012-06-29 17:35:13 -0700984 if (!success) {
985 ALOGE("HWC_EGL_ERROR");
Jesse Halle94046d2012-07-31 14:34:08 -0700986 if (displays[0]) {
Erik Gilling87e707e2012-06-29 17:35:13 -0700987 pthread_mutex_lock(lock);
988 queue->removeAt(0);
989 pthread_mutex_unlock(lock);
990 free(data);
991 }
992 return HWC_EGL_ERROR;
993 }
994 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700995 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700996
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700997
Erik Gilling87e707e2012-06-29 17:35:13 -0700998 pthread_mutex_lock(&data->completion_lock);
999 while (data->fence == -1)
1000 pthread_cond_wait(&data->completion, &data->completion_lock);
1001 pthread_mutex_unlock(&data->completion_lock);
1002
1003 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1004 if (pdev->bufs.overlay_map[i] != -1) {
1005 int dup_fd = dup(data->fence);
1006 if (dup_fd < 0)
1007 ALOGW("release fence dup failed: %s", strerror(errno));
Jesse Halle94046d2012-07-31 14:34:08 -07001008 displays[0]->hwLayers[pdev->bufs.overlay_map[i]].releaseFenceFd = dup_fd;
Erik Gilling87e707e2012-06-29 17:35:13 -07001009 }
1010 }
1011 close(data->fence);
1012 free(data);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001013 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001014}
1015
Erik Gilling87e707e2012-06-29 17:35:13 -07001016static void exynos5_registerProcs(struct hwc_composer_device_1* dev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001017 hwc_procs_t const* procs)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001018{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001019 struct exynos5_hwc_composer_device_1_t* pdev =
1020 (struct exynos5_hwc_composer_device_1_t*)dev;
1021 pdev->procs = const_cast<hwc_procs_t *>(procs);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001022}
1023
Erik Gilling87e707e2012-06-29 17:35:13 -07001024static int exynos5_query(struct hwc_composer_device_1* dev, int what, int *value)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001025{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001026 struct exynos5_hwc_composer_device_1_t *pdev =
1027 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001028
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001029 switch (what) {
1030 case HWC_BACKGROUND_LAYER_SUPPORTED:
1031 // we support the background layer
1032 value[0] = 1;
1033 break;
1034 case HWC_VSYNC_PERIOD:
1035 // vsync period in nanosecond
1036 value[0] = 1000000000.0 / pdev->gralloc_module->fps;
1037 break;
1038 default:
1039 // unsupported query
1040 return -EINVAL;
1041 }
1042 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001043}
1044
Jesse Halle94046d2012-07-31 14:34:08 -07001045static int exynos5_eventControl(struct hwc_composer_device_1 *dev, int dpy,
1046 int event, int enabled)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001047{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001048 struct exynos5_hwc_composer_device_1_t *pdev =
1049 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001050
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001051 switch (event) {
1052 case HWC_EVENT_VSYNC:
1053 __u32 val = !!enabled;
1054 int err = ioctl(pdev->fd, S3CFB_SET_VSYNC_INT, &val);
1055 if (err < 0) {
1056 ALOGE("vsync ioctl failed");
1057 return -errno;
1058 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001059
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001060 return 0;
1061 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001062
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001063 return -EINVAL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001064}
1065
Benoit Gobycdd61b32012-07-09 12:09:59 -07001066static void handle_hdmi_uevent(struct exynos5_hwc_composer_device_1_t *pdev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001067 const char *buff, int len)
Benoit Gobycdd61b32012-07-09 12:09:59 -07001068{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001069 const char *s = buff;
1070 s += strlen(s) + 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001071
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001072 while (*s) {
1073 if (!strncmp(s, "SWITCH_STATE=", strlen("SWITCH_STATE=")))
1074 pdev->hdmi_hpd = atoi(s + strlen("SWITCH_STATE=")) == 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001075
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001076 s += strlen(s) + 1;
1077 if (s - buff >= len)
1078 break;
1079 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001080
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001081 if (pdev->hdmi_hpd) {
1082 if (hdmi_get_config(pdev)) {
1083 ALOGE("Error reading HDMI configuration");
1084 pdev->hdmi_hpd = false;
1085 return;
1086 }
1087 }
1088
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001089 ALOGV("HDMI HPD changed to %s", pdev->hdmi_hpd ? "enabled" : "disabled");
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001090 if (pdev->hdmi_hpd)
1091 ALOGI("HDMI Resolution changed to %dx%d", pdev->hdmi_cfg.h, pdev->hdmi_cfg.w);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001092
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001093 if (pdev->procs && pdev->procs->invalidate)
1094 pdev->procs->invalidate(pdev->procs);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001095}
1096
Greg Hackmann29724852012-07-23 15:31:10 -07001097static void handle_vsync_event(struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001098{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001099 if (!pdev->procs || !pdev->procs->vsync)
1100 return;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001101
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001102 int err = lseek(pdev->vsync_fd, 0, SEEK_SET);
1103 if (err < 0) {
1104 ALOGE("error seeking to vsync timestamp: %s", strerror(errno));
1105 return;
1106 }
1107
Greg Hackmann29724852012-07-23 15:31:10 -07001108 char buf[4096];
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001109 err = read(pdev->vsync_fd, buf, sizeof(buf));
Greg Hackmann29724852012-07-23 15:31:10 -07001110 if (err < 0) {
1111 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1112 return;
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001113 }
Greg Hackmann29724852012-07-23 15:31:10 -07001114 buf[sizeof(buf) - 1] = '\0';
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001115
Greg Hackmann29724852012-07-23 15:31:10 -07001116 errno = 0;
1117 uint64_t timestamp = strtoull(buf, NULL, 0);
1118 if (!errno)
1119 pdev->procs->vsync(pdev->procs, 0, timestamp);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001120}
1121
1122static void *hwc_vsync_thread(void *data)
1123{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001124 struct exynos5_hwc_composer_device_1_t *pdev =
1125 (struct exynos5_hwc_composer_device_1_t *)data;
1126 char uevent_desc[4096];
1127 memset(uevent_desc, 0, sizeof(uevent_desc));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001128
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001129 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001130
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001131 uevent_init();
Greg Hackmann29724852012-07-23 15:31:10 -07001132
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001133 char temp[4096];
1134 int err = read(pdev->vsync_fd, temp, sizeof(temp));
1135 if (err < 0) {
1136 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1137 return NULL;
1138 }
1139
Greg Hackmann29724852012-07-23 15:31:10 -07001140 struct pollfd fds[2];
1141 fds[0].fd = pdev->vsync_fd;
1142 fds[0].events = POLLPRI;
1143 fds[1].fd = uevent_get_fd();
1144 fds[1].events = POLLIN;
1145
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001146 while (true) {
Greg Hackmann29724852012-07-23 15:31:10 -07001147 int err = poll(fds, 2, -1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001148
Greg Hackmann29724852012-07-23 15:31:10 -07001149 if (err > 0) {
1150 if (fds[0].revents & POLLPRI) {
1151 handle_vsync_event(pdev);
1152 }
1153 else if (fds[1].revents & POLLIN) {
1154 int len = uevent_next_event(uevent_desc,
1155 sizeof(uevent_desc) - 2);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001156
Greg Hackmann29724852012-07-23 15:31:10 -07001157 bool hdmi = !strcmp(uevent_desc,
1158 "change@/devices/virtual/switch/hdmi");
1159 if (hdmi)
1160 handle_hdmi_uevent(pdev, uevent_desc, len);
1161 }
1162 }
1163 else if (err == -1) {
1164 if (errno == EINTR)
1165 break;
1166 ALOGE("error in vsync thread: %s", strerror(errno));
1167 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001168 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001169
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001170 return NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001171}
1172
Jesse Halle94046d2012-07-31 14:34:08 -07001173static int exynos5_blank(struct hwc_composer_device_1 *dev, int dpy, int blank)
Colin Cross00359a82012-07-12 17:54:17 -07001174{
1175 struct exynos5_hwc_composer_device_1_t *pdev =
1176 (struct exynos5_hwc_composer_device_1_t *)dev;
1177
1178 int fb_blank = blank ? FB_BLANK_POWERDOWN : FB_BLANK_UNBLANK;
1179 int err = ioctl(pdev->fd, FBIOBLANK, fb_blank);
1180 if (err < 0) {
1181 ALOGE("%sblank ioctl failed", blank ? "" : "un");
1182 return -errno;
1183 }
1184
1185 return 0;
1186}
1187
Erik Gilling87e707e2012-06-29 17:35:13 -07001188struct hwc_methods_1 exynos5_methods = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001189 eventControl: exynos5_eventControl,
Colin Cross00359a82012-07-12 17:54:17 -07001190 blank: exynos5_blank,
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001191};
1192
1193static int exynos5_close(hw_device_t* device);
1194
1195static int exynos5_open(const struct hw_module_t *module, const char *name,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001196 struct hw_device_t **device)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001197{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001198 int ret;
1199 int sw_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001200
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001201 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
1202 return -EINVAL;
1203 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001204
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001205 struct exynos5_hwc_composer_device_1_t *dev;
1206 dev = (struct exynos5_hwc_composer_device_1_t *)malloc(sizeof(*dev));
1207 memset(dev, 0, sizeof(*dev));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001208
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001209 if (hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
1210 (const struct hw_module_t **)&dev->gralloc_module)) {
1211 ALOGE("failed to get gralloc hw module");
1212 ret = -EINVAL;
1213 goto err_get_module;
1214 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001215
Greg Hackmann9130e702012-07-30 14:53:04 -07001216 if (gralloc_open((const hw_module_t *)dev->gralloc_module,
1217 &dev->alloc_device)) {
1218 ALOGE("failed to open gralloc");
1219 ret = -EINVAL;
1220 goto err_get_module;
1221 }
1222
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001223 dev->fd = open("/dev/graphics/fb0", O_RDWR);
1224 if (dev->fd < 0) {
1225 ALOGE("failed to open framebuffer");
1226 ret = dev->fd;
Greg Hackmann9130e702012-07-30 14:53:04 -07001227 goto err_open_fb;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001228 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001229
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001230 dev->hdmi_fd = open("/dev/video16", O_RDWR);
1231 if (dev->hdmi_fd < 0) {
1232 ALOGE("failed to open hdmi device");
1233 ret = dev->hdmi_fd;
1234 goto err_ioctl;
1235 }
1236
Greg Hackmann29724852012-07-23 15:31:10 -07001237 dev->vsync_fd = open("/sys/devices/platform/exynos5-fb.1/vsync", O_RDONLY);
1238 if (dev->vsync_fd < 0) {
1239 ALOGE("failed to open vsync attribute");
1240 ret = dev->vsync_fd;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001241 goto err_hdmi;
Greg Hackmann29724852012-07-23 15:31:10 -07001242 }
1243
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001244 sw_fd = open("/sys/class/switch/hdmi/state", O_RDONLY);
1245 if (sw_fd) {
1246 char val;
1247 if (read(sw_fd, &val, 1) == 1 && val == '1')
1248 dev->hdmi_hpd = true;
1249 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001250
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001251 dev->base.common.tag = HARDWARE_DEVICE_TAG;
1252 dev->base.common.version = HWC_DEVICE_API_VERSION_1_0;
1253 dev->base.common.module = const_cast<hw_module_t *>(module);
1254 dev->base.common.close = exynos5_close;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001255
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001256 dev->base.prepare = exynos5_prepare;
1257 dev->base.set = exynos5_set;
1258 dev->base.registerProcs = exynos5_registerProcs;
1259 dev->base.query = exynos5_query;
1260 dev->base.methods = &exynos5_methods;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001261
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001262 dev->bufs.pdev = dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001263
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001264 *device = &dev->base.common;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001265
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001266 ret = pthread_create(&dev->vsync_thread, NULL, hwc_vsync_thread, dev);
1267 if (ret) {
1268 ALOGE("failed to start vsync thread: %s", strerror(ret));
1269 ret = -ret;
Greg Hackmann29724852012-07-23 15:31:10 -07001270 goto err_vsync;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001271 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001272
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001273 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001274
Greg Hackmann29724852012-07-23 15:31:10 -07001275err_vsync:
1276 close(dev->vsync_fd);
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001277err_hdmi:
1278 close(dev->hdmi_fd);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001279err_ioctl:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001280 close(dev->fd);
Greg Hackmann9130e702012-07-30 14:53:04 -07001281err_open_fb:
1282 gralloc_close(dev->alloc_device);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001283err_get_module:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001284 free(dev);
1285 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001286}
1287
1288static int exynos5_close(hw_device_t *device)
1289{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001290 struct exynos5_hwc_composer_device_1_t *dev =
1291 (struct exynos5_hwc_composer_device_1_t *)device;
Greg Hackmann29724852012-07-23 15:31:10 -07001292 pthread_kill(dev->vsync_thread, SIGTERM);
1293 pthread_join(dev->vsync_thread, NULL);
Greg Hackmann9130e702012-07-30 14:53:04 -07001294 for (size_t i = 0; i < NUM_GSC_UNITS; i++) {
1295 if (dev->gsc[i].gsc)
1296 exynos_gsc_destroy(dev->gsc[i].gsc);
1297 for (size_t j = 0; i < NUM_GSC_DST_BUFS; j++)
1298 if (dev->gsc[i].dst_buf[j])
1299 dev->alloc_device->free(dev->alloc_device, dev->gsc[i].dst_buf[j]);
1300 }
1301 gralloc_close(dev->alloc_device);
Greg Hackmann29724852012-07-23 15:31:10 -07001302 close(dev->vsync_fd);
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001303 close(dev->hdmi_fd);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001304 close(dev->fd);
1305 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001306}
1307
1308static struct hw_module_methods_t exynos5_hwc_module_methods = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001309 open: exynos5_open,
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001310};
1311
1312hwc_module_t HAL_MODULE_INFO_SYM = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001313 common: {
1314 tag: HARDWARE_MODULE_TAG,
1315 module_api_version: HWC_MODULE_API_VERSION_0_1,
1316 hal_api_version: HARDWARE_HAL_API_VERSION,
1317 id: HWC_HARDWARE_MODULE_ID,
1318 name: "Samsung exynos5 hwcomposer module",
1319 author: "Google",
1320 methods: &exynos5_hwc_module_methods,
1321 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001322};