platform,target: mdm9640: support glink for sdxhedgehog target

On sdxhedgehog, enabling glink to communicate with RPM.

Change-Id: I200b9dde8c8b0bbfeef6361bd991cbd336efd964
diff --git a/platform/mdm9640/include/platform/iomap.h b/platform/mdm9640/include/platform/iomap.h
index a55687c..6981256 100644
--- a/platform/mdm9640/include/platform/iomap.h
+++ b/platform/mdm9640/include/platform/iomap.h
@@ -219,4 +219,11 @@
 /* Register for finding out if single ended or differential clock enablement */
 #define TCSR_PHY_CLK_SCHEME_SEL     0x01956044
 
+/* RPM MSG RAM */
+#define RPM_SS_MSG_RAM_START_ADDRESS_BASE_PHYS 0x00060000
+#define RPM_SS_MSG_RAM_START_ADDRESS_BASE      RPM_SS_MSG_RAM_START_ADDRESS_BASE_PHYS
+#define RPM_SS_MSG_RAM_START_ADDRESS_BASE_SIZE 0x00006000
+/* notify RPM via IPC interrupt*/
+#define APCS_HLOS_IPC_INTERRUPT_0 APCS_ALIAS0_IPC_INTERRUPT
+
 #endif
diff --git a/platform/mdm9640/include/platform/irqs.h b/platform/mdm9640/include/platform/irqs.h
index a9e8fc5..b1d958b 100644
--- a/platform/mdm9640/include/platform/irqs.h
+++ b/platform/mdm9640/include/platform/irqs.h
@@ -47,6 +47,7 @@
 
 #define SDCC1_PWRCTL_IRQ                       (GIC_SPI_START + 138)
 
+#define GLINK_IPC_IRQ                          (GIC_SPI_START + 168)
 /* Retrofit universal macro names */
 #define INT_USB_HS                             USB1_HS_IRQ
 
diff --git a/platform/mdm9640/platform.c b/platform/mdm9640/platform.c
index db301ee..50b34ea 100644
--- a/platform/mdm9640/platform.c
+++ b/platform/mdm9640/platform.c
@@ -214,3 +214,10 @@
 		   readl(USB3_PHY_REVISION_ID1) << 8 | readl(USB3_PHY_REVISION_ID0);
 }
 
+bool platform_is_glink_enabled()
+{
+	if (platform_is_sdxhedgehog())
+		return 1;
+	else
+		return 0;
+}
diff --git a/project/mdm9640.mk b/project/mdm9640.mk
index d72ee16..997f92c 100644
--- a/project/mdm9640.mk
+++ b/project/mdm9640.mk
@@ -50,6 +50,11 @@
 DEFINES += SMD_SUPPORT=1
 endif
 
+ENABLE_GLINK_SUPPORT := 1
+ifeq ($(ENABLE_GLINK_SUPPORT),1)
+DEFINES += GLINK_SUPPORT=1
+endif
+
 # Reset USB clock from target code
 DEFINES += USB_RESET_FROM_CLK=1
 
diff --git a/target/mdm9640/init.c b/target/mdm9640/init.c
index b335731..bb6eb13 100644
--- a/target/mdm9640/init.c
+++ b/target/mdm9640/init.c
@@ -56,6 +56,7 @@
 #include <boot_device.h>
 #include <qmp_phy.h>
 #include <crypto5_wrapper.h>
+#include <rpm-glink.h>
 
 extern void smem_ptable_init(void);
 extern void smem_add_modem_partitions(struct ptable *flash_ptable);
@@ -151,7 +152,14 @@
 
 	spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
 	if(!platform_is_sdxhedgehog())
+	{
 		rpm_smd_init();
+	}
+	else
+	{
+		/* Initialize Glink */
+		rpm_glink_init();
+	}
 
 	if (platform_boot_dev_isemmc()) {
 		target_sdc_init();
@@ -421,7 +429,14 @@
 		crypto_eng_cleanup();
 
 	if(!platform_is_sdxhedgehog())
+	{
 		rpm_smd_uninit();
+	}
+	else
+	{
+		/* Tear down glink channels */
+		rpm_glink_uninit();
+	}
 }
 
 void target_usb_phy_reset(void)