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Deepa Dinamani7d6c8972011-12-14 15:16:56 -08001/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are met:
5 * * Redistributions of source code must retain the above copyright
6 * notice, this list of conditions and the following disclaimer.
7 * * Redistributions in binary form must reproduce the above copyright
8 * notice, this list of conditions and the following disclaimer in the
9 * documentation and/or other materials provided with the distribution.
10 * * Neither the name of Code Aurora nor
11 * the names of its contributors may be used to endorse or promote
12 * products derived from this software without specific prior written
13 * permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
19 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
20 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
21 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
22 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
23 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
24 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
25 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 *
27 */
28
Neeti Desai17379b82012-06-04 18:42:53 -070029#if !DEVICE_TREE /* If not using device tree */
30
Deepa Dinamani7d6c8972011-12-14 15:16:56 -080031#include <reg.h>
32#include <debug.h>
33#include <smem.h>
Deepa Dinamani81eddd52012-05-31 11:18:50 -070034#include <platform/iomap.h>
Deepa Dinamani7d6c8972011-12-14 15:16:56 -080035#include <stdint.h>
36
Deepa Dinamani81eddd52012-05-31 11:18:50 -070037#define SIZE_1M (1024 * 1024)
38#define SIZE_2M (2 * SIZE_1M)
39#define SIZE_256M (256 * SIZE_1M)
40#define SIZE_512M (512 * SIZE_1M)
41
42#define ATAG_MEM 0x54410002
43
44typedef struct {
45 uint32_t size;
46 uint32_t start_addr;
47}mem_info;
48
49
Deepa Dinamani7fa07a42012-06-14 14:12:58 -070050mem_info copper_default_first_512M[] = {
Deepa Dinamani81eddd52012-05-31 11:18:50 -070051 { .size = (250 * SIZE_1M),
52 .start_addr = SDRAM_START_ADDR
53 },
Deepa Dinamani81eddd52012-05-31 11:18:50 -070054 { .size = (240 * SIZE_1M),
55 .start_addr = SDRAM_START_ADDR +
Deepa Dinamani7fa07a42012-06-14 14:12:58 -070056 (16 * SIZE_1M) +
57 (256 * SIZE_1M)
Deepa Dinamani81eddd52012-05-31 11:18:50 -070058 }
59};
60
61unsigned *target_mem_atag_create(unsigned *ptr, uint32_t size, uint32_t addr)
62{
63 *ptr++ = 4;
64 *ptr++ = ATAG_MEM;
65 *ptr++ = size;
66 *ptr++ = addr;
67
68 return ptr;
69}
70
71
Deepa Dinamani7fa07a42012-06-14 14:12:58 -070072unsigned *target_atag_create(unsigned *ptr,
73 mem_info usable_mem_map[], unsigned num_regions)
Deepa Dinamani81eddd52012-05-31 11:18:50 -070074{
75 unsigned int i;
76
Deepa Dinamani7fa07a42012-06-14 14:12:58 -070077 ASSERT(num_regions);
78
Deepa Dinamani81eddd52012-05-31 11:18:50 -070079 dprintf(SPEW, "Number of HLOS regions in 1st bank = %u\n", num_regions);
Deepa Dinamani7fa07a42012-06-14 14:12:58 -070080
Deepa Dinamani81eddd52012-05-31 11:18:50 -070081 for (i = 0; i < num_regions; i++)
82 {
83 ptr = target_mem_atag_create(ptr,
84 usable_mem_map[i].size,
85 usable_mem_map[i].start_addr);
86 }
87 return ptr;
88}
89
Deepa Dinamani7d6c8972011-12-14 15:16:56 -080090unsigned *target_atag_mem(unsigned *ptr)
91{
Deepa Dinamani81eddd52012-05-31 11:18:50 -070092 struct smem_ram_ptable ram_ptable;
93 uint8_t i = 0;
94
95 /* Make sure RAM partition table is initialized */
96 ASSERT(smem_ram_ptable_init(&ram_ptable));
97
98 for (i = 0; i < ram_ptable.len; i++)
99 {
100 if (ram_ptable.parts[i].category == SDRAM &&
101 (ram_ptable.parts[i].type == SYS_MEMORY) &&
Deepa Dinamani7fa07a42012-06-14 14:12:58 -0700102 (ram_ptable.parts[i].start == SDRAM_START_ADDR))
Deepa Dinamani81eddd52012-05-31 11:18:50 -0700103 {
Deepa Dinamani7fa07a42012-06-14 14:12:58 -0700104 ASSERT(ram_ptable.parts[i].size >= SIZE_512M);
Deepa Dinamani81eddd52012-05-31 11:18:50 -0700105
106 if (ram_ptable.parts[i].start == SDRAM_START_ADDR)
Deepa Dinamani7fa07a42012-06-14 14:12:58 -0700107 ptr = target_atag_create(ptr,
108 copper_default_first_512M,
109 ARRAY_SIZE(copper_default_first_512M));
Deepa Dinamani81eddd52012-05-31 11:18:50 -0700110
Deepa Dinamani81eddd52012-05-31 11:18:50 -0700111 }
112
113 /* Pass along all other usable memory regions to Linux */
114 if (ram_ptable.parts[i].category == SDRAM &&
115 (ram_ptable.parts[i].type == SYS_MEMORY) &&
116 (ram_ptable.parts[i].start != SDRAM_START_ADDR))
117 {
118 ptr = target_mem_atag_create(ptr,
119 ram_ptable.parts[i].size,
120 ram_ptable.parts[i].start);
121 }
122 }
123
124 return ptr;
Deepa Dinamani7d6c8972011-12-14 15:16:56 -0800125}
126
127void *target_get_scratch_address(void)
128{
129 return ((void *)SCRATCH_ADDR);
130}
Neeti Desai17379b82012-06-04 18:42:53 -0700131
132#endif /* DEVICE_TREE */
133