Veera Sundaram Sankaran | 7868d54 | 2015-01-02 14:48:47 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 2 | * |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
| 12 | * * Neither the name of The Linux Foundation nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | * |
| 28 | */ |
| 29 | |
| 30 | #include <debug.h> |
| 31 | #include <smem.h> |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 32 | #include <err.h> |
vijay kumar | 0411ca8 | 2014-08-08 17:14:52 +0530 | [diff] [blame] | 33 | #include <string.h> |
| 34 | #include <qtimer.h> |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 35 | #include <msm_panel.h> |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 36 | #include <mipi_dsi.h> |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 37 | #include <pm8x41.h> |
| 38 | #include <pm8x41_wled.h> |
| 39 | #include <board.h> |
| 40 | #include <platform/gpio.h> |
| 41 | #include <platform/iomap.h> |
vijay kumar | 0411ca8 | 2014-08-08 17:14:52 +0530 | [diff] [blame] | 42 | #include <platform/clock.h> |
Aparna Mallavarapu | 0e3265c | 2014-03-28 18:22:23 +0530 | [diff] [blame] | 43 | #include <pm_pwm.h> |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 44 | #include <target/display.h> |
vijay kumar | 0411ca8 | 2014-08-08 17:14:52 +0530 | [diff] [blame] | 45 | #include <gcdb_display.h> |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 46 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 47 | #include "include/panel.h" |
| 48 | #include "include/display_resource.h" |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 49 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 50 | #define MODE_GPIO_STATE_ENABLE 1 |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 51 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 52 | #define MODE_GPIO_STATE_DISABLE 2 |
Dhaval Patel | f4a79f9 | 2013-10-04 10:36:33 -0700 | [diff] [blame] | 53 | #define GPIO_STATE_LOW 0 |
| 54 | #define GPIO_STATE_HIGH 2 |
| 55 | #define RESET_GPIO_SEQ_LEN 3 |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 56 | |
Xu Kai | 3a06f99 | 2013-12-04 23:30:04 +0800 | [diff] [blame] | 57 | #define PWM_DUTY_US 13 |
| 58 | #define PWM_PERIOD_US 27 |
| 59 | |
vijay kumar | 0411ca8 | 2014-08-08 17:14:52 +0530 | [diff] [blame] | 60 | static struct gpio_pin reset_gpio = { |
| 61 | "msmgpio", 41, 3, 1, 0, 1 |
| 62 | }; |
| 63 | |
| 64 | static struct gpio_pin mode_gpio = { |
| 65 | "msmgpio", 7, 3, 1, 0, 1 |
| 66 | }; |
| 67 | |
| 68 | /*---------------------------------------------------------------------------*/ |
| 69 | /* Supply configuration */ |
| 70 | /*---------------------------------------------------------------------------*/ |
| 71 | static struct ldo_entry ldo_entry_array[] = { |
| 72 | { "vddio", 14, 0, 1800000, 100000, 100, 0, 0, 0, 0}, |
| 73 | { "vdda", 19, 0, 2850000, 100000, 100, 0, 0, 0, 0}, |
| 74 | }; |
| 75 | |
| 76 | |
Kuogee Hsieh | df96174 | 2013-12-18 14:13:45 -0800 | [diff] [blame] | 77 | int target_backlight_ctrl(struct backlight *bl, uint8_t enable) |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 78 | { |
| 79 | struct pm8x41_mpp mpp; |
Xu Kai | 3a06f99 | 2013-12-04 23:30:04 +0800 | [diff] [blame] | 80 | int rc; |
| 81 | |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 82 | mpp.base = PM8x41_MMP3_BASE; |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 83 | mpp.vin = MPP_VIN3; |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 84 | if (enable) { |
Xu Kai | 3a06f99 | 2013-12-04 23:30:04 +0800 | [diff] [blame] | 85 | pm_pwm_enable(false); |
| 86 | rc = pm_pwm_config(PWM_DUTY_US, PWM_PERIOD_US); |
| 87 | if (rc < 0) |
| 88 | mpp.mode = MPP_HIGH; |
| 89 | else { |
| 90 | mpp.mode = MPP_DTEST1; |
| 91 | pm_pwm_enable(true); |
| 92 | } |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 93 | pm8x41_config_output_mpp(&mpp); |
| 94 | pm8x41_enable_mpp(&mpp, MPP_ENABLE); |
| 95 | } else { |
Xu Kai | 3a06f99 | 2013-12-04 23:30:04 +0800 | [diff] [blame] | 96 | pm_pwm_enable(false); |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 97 | pm8x41_enable_mpp(&mpp, MPP_DISABLE); |
| 98 | } |
| 99 | /* Need delay before power on regulators */ |
| 100 | mdelay(20); |
| 101 | return 0; |
| 102 | } |
| 103 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 104 | int target_panel_clock(uint8_t enable, struct msm_panel_info *pinfo) |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 105 | { |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 106 | struct mdss_dsi_pll_config *pll_data; |
| 107 | dprintf(SPEW, "target_panel_clock\n"); |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 108 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 109 | pll_data = pinfo->mipi.dsi_pll_config; |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 110 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 111 | if (enable) { |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 112 | mdp_clock_enable(); |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 113 | dsi_clock_enable( |
| 114 | pll_data->byte_clock * pinfo->mipi.num_of_lanes, |
| 115 | pll_data->byte_clock); |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 116 | } else if(!target_cont_splash_screen()) { |
| 117 | dsi_clock_disable(); |
| 118 | mdp_clock_disable(); |
| 119 | } |
| 120 | |
| 121 | return 0; |
| 122 | } |
| 123 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 124 | int target_panel_reset(uint8_t enable, struct panel_reset_sequence *resetseq, |
| 125 | struct msm_panel_info *pinfo) |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 126 | { |
Dhaval Patel | f4a79f9 | 2013-10-04 10:36:33 -0700 | [diff] [blame] | 127 | uint8_t i = 0; |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 128 | dprintf(SPEW, "msm8610_mdss_mipi_panel_reset, enable = %d\n", enable); |
| 129 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 130 | if (enable) { |
| 131 | gpio_tlmm_config(reset_gpio.pin_id, 0, |
| 132 | reset_gpio.pin_direction, reset_gpio.pin_pull, |
| 133 | reset_gpio.pin_strength, reset_gpio.pin_state); |
| 134 | |
| 135 | gpio_tlmm_config(mode_gpio.pin_id, 0, |
| 136 | mode_gpio.pin_direction, mode_gpio.pin_pull, |
| 137 | mode_gpio.pin_strength, mode_gpio.pin_state); |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 138 | |
| 139 | /* reset */ |
Dhaval Patel | f4a79f9 | 2013-10-04 10:36:33 -0700 | [diff] [blame] | 140 | for (i = 0; i < RESET_GPIO_SEQ_LEN; i++) { |
| 141 | if (resetseq->pin_state[i] == GPIO_STATE_LOW) |
| 142 | gpio_set(reset_gpio.pin_id, GPIO_STATE_LOW); |
| 143 | else |
| 144 | gpio_set(reset_gpio.pin_id, GPIO_STATE_HIGH); |
| 145 | mdelay(resetseq->sleep[i]); |
| 146 | } |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 147 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 148 | if (pinfo->mipi.mode_gpio_state == MODE_GPIO_STATE_ENABLE) |
| 149 | gpio_set(mode_gpio.pin_id, 2); |
| 150 | else if (pinfo->mipi.mode_gpio_state == MODE_GPIO_STATE_DISABLE) |
| 151 | gpio_set(mode_gpio.pin_id, 0); |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 152 | } else if(!target_cont_splash_screen()) { |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 153 | gpio_set(reset_gpio.pin_id, 0); |
| 154 | gpio_set(mode_gpio.pin_id, 0); |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 155 | } |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 156 | return 0; |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 157 | } |
| 158 | |
Kuogee Hsieh | 93bcff6 | 2014-08-22 14:02:08 -0700 | [diff] [blame] | 159 | int target_ldo_ctrl(uint8_t enable, struct msm_panel_info *pinfo) |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 160 | { |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 161 | uint32_t ldocounter = 0; |
| 162 | uint32_t pm8x41_ldo_base = 0x13F00; |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 163 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 164 | while (ldocounter < TOTAL_LDO_DEFINED) { |
| 165 | struct pm8x41_ldo ldo_entry = LDO((pm8x41_ldo_base + |
| 166 | 0x100 * ldo_entry_array[ldocounter].ldo_id), |
| 167 | ldo_entry_array[ldocounter].ldo_type); |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 168 | |
vijay kumar | 0411ca8 | 2014-08-08 17:14:52 +0530 | [diff] [blame] | 169 | dprintf(SPEW, "Setting %u\n", |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 170 | ldo_entry_array[ldocounter].ldo_id); |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 171 | |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 172 | /* Set voltage during power on */ |
| 173 | if (enable) { |
| 174 | pm8x41_ldo_set_voltage(&ldo_entry, |
| 175 | ldo_entry_array[ldocounter].ldo_voltage); |
| 176 | pm8x41_ldo_control(&ldo_entry, enable); |
| 177 | } else if(!target_cont_splash_screen()) { |
| 178 | pm8x41_ldo_control(&ldo_entry, enable); |
| 179 | } |
| 180 | ldocounter++; |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 181 | } |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 182 | |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 183 | return 0; |
| 184 | } |
| 185 | |
Dhaval Patel | 7709c41 | 2015-05-12 10:09:41 -0700 | [diff] [blame] | 186 | int target_dsi_phy_config(struct mdss_dsi_phy_ctrl *phy_db) |
| 187 | { |
| 188 | memcpy(phy_db->regulator, panel_regulator_settings, REGULATOR_SIZE); |
| 189 | memcpy(phy_db->ctrl, panel_physical_ctrl, PHYSICAL_SIZE); |
| 190 | memcpy(phy_db->strength, panel_strength_ctrl, STRENGTH_SIZE); |
| 191 | memcpy(phy_db->bistCtrl, panel_bist_ctrl, BIST_SIZE); |
| 192 | memcpy(phy_db->laneCfg, panel_lane_config, LANE_SIZE); |
| 193 | return NO_ERROR; |
| 194 | } |
| 195 | |
Padmanabhan Komanduru | bccbcdc | 2015-06-30 16:19:24 +0530 | [diff] [blame] | 196 | bool target_display_panel_node(char *pbuf, uint16_t buf_size) |
Ajay Singh Parmar | eef1d60 | 2014-03-15 17:41:52 -0700 | [diff] [blame] | 197 | { |
Padmanabhan Komanduru | bccbcdc | 2015-06-30 16:19:24 +0530 | [diff] [blame] | 198 | return gcdb_display_cmdline_arg(pbuf, buf_size); |
Ajay Singh Parmar | eef1d60 | 2014-03-15 17:41:52 -0700 | [diff] [blame] | 199 | } |
| 200 | |
Aravind Venkateswaran | 6385f7e | 2014-02-25 16:45:11 -0800 | [diff] [blame] | 201 | void target_display_init(const char *panel_name) |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 202 | { |
Shivaraj Shetty | 25b0aa0 | 2013-10-30 20:55:49 +0530 | [diff] [blame] | 203 | uint32_t panel_loop = 0; |
| 204 | uint32_t ret = 0; |
Padmanabhan Komanduru | bccbcdc | 2015-06-30 16:19:24 +0530 | [diff] [blame] | 205 | struct oem_panel_data oem; |
Veera Sundaram Sankaran | 7868d54 | 2015-01-02 14:48:47 -0800 | [diff] [blame] | 206 | |
Padmanabhan Komanduru | bccbcdc | 2015-06-30 16:19:24 +0530 | [diff] [blame] | 207 | set_panel_cmd_string(panel_name); |
| 208 | oem = mdss_dsi_get_oem_data(); |
Jeevan Shriram | b0d523a | 2014-05-30 12:55:17 -0700 | [diff] [blame] | 209 | |
Padmanabhan Komanduru | bccbcdc | 2015-06-30 16:19:24 +0530 | [diff] [blame] | 210 | if (!strcmp(oem.panel, NO_PANEL_CONFIG) |
| 211 | || oem.skip) { |
Jeevan Shriram | b0d523a | 2014-05-30 12:55:17 -0700 | [diff] [blame] | 212 | dprintf(INFO, "Skip panel configuration\n"); |
| 213 | return; |
| 214 | } |
| 215 | |
Shivaraj Shetty | 25b0aa0 | 2013-10-30 20:55:49 +0530 | [diff] [blame] | 216 | do { |
Justin Philip | be9de5c | 2014-09-17 12:26:49 +0530 | [diff] [blame] | 217 | target_force_cont_splash_disable(false); |
Padmanabhan Komanduru | bccbcdc | 2015-06-30 16:19:24 +0530 | [diff] [blame] | 218 | ret = gcdb_display_init(oem.panel, MDP_REV_304,(void *)MIPI_FB_ADDR); |
Shivaraj Shetty | 25b0aa0 | 2013-10-30 20:55:49 +0530 | [diff] [blame] | 219 | if (ret) { |
| 220 | /*Panel signature did not match, turn off the display*/ |
| 221 | target_force_cont_splash_disable(true); |
| 222 | msm_display_off(); |
Shivaraj Shetty | 25b0aa0 | 2013-10-30 20:55:49 +0530 | [diff] [blame] | 223 | } else { |
| 224 | break; |
| 225 | } |
vijay kumar | 0411ca8 | 2014-08-08 17:14:52 +0530 | [diff] [blame] | 226 | } while (++panel_loop <= (uint32_t)oem_panel_max_auto_detect_panels()); |
Shivaraj Shetty | 25b0aa0 | 2013-10-30 20:55:49 +0530 | [diff] [blame] | 227 | |
Padmanabhan Komanduru | bccbcdc | 2015-06-30 16:19:24 +0530 | [diff] [blame] | 228 | if (!oem.cont_splash) { |
Veera Sundaram Sankaran | 7868d54 | 2015-01-02 14:48:47 -0800 | [diff] [blame] | 229 | dprintf(INFO, "Forcing continuous splash disable\n"); |
| 230 | target_force_cont_splash_disable(true); |
| 231 | } |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 232 | } |
| 233 | |
Aravind Venkateswaran | dd50c1a | 2014-02-25 14:42:43 -0800 | [diff] [blame] | 234 | void target_display_shutdown(void) |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 235 | { |
Dhaval Patel | 8ae0bbd | 2013-08-15 15:45:01 -0700 | [diff] [blame] | 236 | gcdb_display_shutdown(); |
Terence Hampson | afded26 | 2013-06-18 14:48:18 -0400 | [diff] [blame] | 237 | } |