Sundarajan Srinivasan | 971b0d7 | 2013-12-10 17:56:22 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. |
Deepa Dinamani | 2279965 | 2012-07-21 12:26:22 -0700 | [diff] [blame] | 2 | |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
Channagoud Kadabi | 0e60b7d | 2012-11-01 22:56:08 +0530 | [diff] [blame] | 12 | * * Neither the name of The Linux Foundation, Inc. nor the names of its |
Deepa Dinamani | 2279965 | 2012-07-21 12:26:22 -0700 | [diff] [blame] | 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
| 28 | |
| 29 | #ifndef _PM8x41_H_ |
| 30 | #define _PM8x41_H_ |
| 31 | |
Channagoud Kadabi | 0e60b7d | 2012-11-01 22:56:08 +0530 | [diff] [blame] | 32 | #include <sys/types.h> |
| 33 | |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 34 | #define PM_GPIO_DIR_OUT 0x01 |
| 35 | #define PM_GPIO_DIR_IN 0x00 |
| 36 | #define PM_GPIO_DIR_BOTH 0x02 |
| 37 | |
| 38 | #define PM_GPIO_PULL_UP_30 0 |
| 39 | #define PM_GPIO_PULL_UP_1_5 1 |
| 40 | #define PM_GPIO_PULL_UP_31_5 2 |
| 41 | /* 1.5uA + 30uA boost */ |
| 42 | #define PM_GPIO_PULL_UP_1_5_30 3 |
Kuogee Hsieh | 1183511 | 2013-10-04 15:50:36 -0700 | [diff] [blame] | 43 | #define PM_GPIO_PULLDOWN_10 4 |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 44 | #define PM_GPIO_PULL_RESV_2 5 |
| 45 | |
Siddhartha Agrawal | d61f81e | 2012-12-17 19:20:35 -0800 | [diff] [blame] | 46 | |
| 47 | #define PM_GPIO_OUT_CMOS 0x00 |
| 48 | #define PM_GPIO_OUT_DRAIN_NMOS 0x01 |
| 49 | #define PM_GPIO_OUT_DRAIN_PMOS 0x02 |
| 50 | |
| 51 | #define PM_GPIO_OUT_DRIVE_LOW 0x01 |
| 52 | #define PM_GPIO_OUT_DRIVE_MED 0x02 |
| 53 | #define PM_GPIO_OUT_DRIVE_HIGH 0x03 |
| 54 | |
Siddhartha Agrawal | d61f81e | 2012-12-17 19:20:35 -0800 | [diff] [blame] | 55 | #define PM_GPIO_FUNC_LOW 0x00 |
| 56 | #define PM_GPIO_FUNC_HIGH 0x01 |
Kuogee Hsieh | 1183511 | 2013-10-04 15:50:36 -0700 | [diff] [blame] | 57 | #define PM_GPIO_FUNC_2 0x06 |
Dhaval Patel | 171f0e4 | 2013-10-18 18:56:23 -0700 | [diff] [blame] | 58 | #define PM_GPIO_FUNC_1 0x04 |
Siddhartha Agrawal | d61f81e | 2012-12-17 19:20:35 -0800 | [diff] [blame] | 59 | |
| 60 | #define PM_GPIO_MODE_MASK 0x70 |
| 61 | #define PM_GPIO_OUTPUT_MASK 0x0F |
| 62 | |
Neeti Desai | 120b55d | 2012-08-20 17:15:56 -0700 | [diff] [blame] | 63 | #define PON_PSHOLD_WARM_RESET 0x1 |
Deepa Dinamani | 3c9865d | 2013-03-08 14:03:19 -0800 | [diff] [blame] | 64 | #define PON_PSHOLD_SHUTDOWN 0x4 |
Sundarajan Srinivasan | efc61b6 | 2013-07-19 12:08:07 -0700 | [diff] [blame] | 65 | #define PON_PSHOLD_HARD_RESET 0x7 |
Neeti Desai | 120b55d | 2012-08-20 17:15:56 -0700 | [diff] [blame] | 66 | |
Channagoud Kadabi | 36c19ea | 2013-07-05 16:28:44 -0700 | [diff] [blame] | 67 | enum PM8X41_VERSIONS |
| 68 | { |
| 69 | PM8X41_VERSION_V1 = 0, |
| 70 | PM8X41_VERSION_V2 = 1, |
| 71 | }; |
| 72 | |
Deepa Dinamani | 7564f2a | 2013-02-05 17:55:51 -0800 | [diff] [blame] | 73 | |
sundarajan srinivasan | d0f59e8 | 2013-02-12 19:17:02 -0800 | [diff] [blame] | 74 | /*Target power on reasons*/ |
Ameya Thakur | ca145d7 | 2013-07-17 16:52:02 -0700 | [diff] [blame] | 75 | #define HARD_RST 1 |
sundarajan srinivasan | d0f59e8 | 2013-02-12 19:17:02 -0800 | [diff] [blame] | 76 | #define DC_CHG 8 |
| 77 | #define USB_CHG 16 |
| 78 | #define PON1 32 |
| 79 | #define CBLPWR_N 64 |
| 80 | #define KPDPWR_N 128 |
| 81 | |
Matthew Qin | 5e90d83 | 2014-07-11 11:15:22 +0800 | [diff] [blame] | 82 | /*Target power off reasons*/ |
| 83 | #define KPDPWR_AND_RESIN 32 |
| 84 | #define STAGE3 128 |
| 85 | |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 86 | struct pm8x41_gpio { |
| 87 | int direction; |
| 88 | int output_buffer; |
| 89 | int output_value; |
| 90 | int pull; |
| 91 | int vin_sel; |
| 92 | int out_strength; |
| 93 | int function; |
| 94 | int inv_int_pol; |
| 95 | int disable_pin; |
| 96 | }; |
| 97 | |
Deepa Dinamani | e69ba61 | 2013-06-03 16:10:09 -0700 | [diff] [blame] | 98 | struct pm8x41_ldo { |
| 99 | uint8_t type; |
| 100 | uint32_t base; |
| 101 | }; |
| 102 | |
| 103 | /* LDO base addresses. */ |
| 104 | #define PM8x41_LDO2 0x14100 |
| 105 | #define PM8x41_LDO4 0x14300 |
Ray Zhang | 898675f | 2013-05-25 23:13:40 +0800 | [diff] [blame] | 106 | #define PM8x41_LDO8 0x14700 |
Deepa Dinamani | e69ba61 | 2013-06-03 16:10:09 -0700 | [diff] [blame] | 107 | #define PM8x41_LDO12 0x14B00 |
| 108 | #define PM8x41_LDO14 0x14D00 |
Ray Zhang | 898675f | 2013-05-25 23:13:40 +0800 | [diff] [blame] | 109 | #define PM8x41_LDO15 0x14E00 |
Deepa Dinamani | e69ba61 | 2013-06-03 16:10:09 -0700 | [diff] [blame] | 110 | #define PM8x41_LDO19 0x15200 |
| 111 | #define PM8x41_LDO22 0x15500 |
| 112 | |
| 113 | /* LDO voltage ranges */ |
| 114 | #define NLDO_UV_MIN 375000 |
| 115 | #define NLDO_UV_MAX 1537500 |
| 116 | #define NLDO_UV_STEP 12500 |
| 117 | #define NLDO_UV_VMIN_LOW 750000 |
| 118 | |
| 119 | #define PLDO_UV_VMIN_LOW 750000 |
| 120 | #define PLDO_UV_VMIN_MID 1500000 |
| 121 | #define PLDO_UV_VMIN_HIGH 1750000 |
| 122 | |
| 123 | #define PLDO_UV_MIN 1537500 |
| 124 | #define PDLO_UV_MID 3075000 |
| 125 | #define PLDO_UV_MAX 4900000 |
| 126 | #define PLDO_UV_STEP_LOW 12500 |
| 127 | #define PLDO_UV_STEP_MID 25000 |
| 128 | #define PLDO_UV_STEP_HIGH 50000 |
| 129 | |
| 130 | #define LDO_RANGE_SEL_BIT 0 |
| 131 | #define LDO_VSET_SEL_BIT 0 |
| 132 | #define LDO_VREG_ENABLE_BIT 7 |
| 133 | #define LDO_NORMAL_PWR_BIT 7 |
| 134 | |
| 135 | #define PLDO_TYPE 0 |
| 136 | #define NLDO_TYPE 1 |
| 137 | |
| 138 | #define LDO(_base, _type) \ |
| 139 | { \ |
| 140 | .type = _type, \ |
| 141 | .base = _base, \ |
| 142 | } |
| 143 | |
Deepa Dinamani | c342f12 | 2013-06-12 15:41:31 -0700 | [diff] [blame] | 144 | enum mpp_vin_select |
| 145 | { |
| 146 | MPP_VIN0, |
| 147 | MPP_VIN1, |
| 148 | MPP_VIN2, |
| 149 | MPP_VIN3, |
| 150 | }; |
| 151 | |
| 152 | enum mpp_mode_en_source_select |
| 153 | { |
| 154 | MPP_LOW, |
| 155 | MPP_HIGH, |
| 156 | MPP_PAIRED_MPP, |
| 157 | MPP_NOT_PAIRED_MPP, |
| 158 | MPP_DTEST1 = 8, |
| 159 | MPP_NOT_DTEST1, |
| 160 | MPP_DTEST2, |
| 161 | MPP_NOT_DTEST2, |
| 162 | MPP_DTEST3, |
| 163 | MPP_NOT_DTEST3, |
| 164 | MPP_DTEST4, |
| 165 | MPP_NOT_DTEST4, |
| 166 | }; |
| 167 | |
| 168 | enum mpp_en_ctl |
| 169 | { |
| 170 | MPP_DISABLE, |
| 171 | MPP_ENABLE, |
| 172 | }; |
| 173 | |
Ajay Singh Parmar | 502ed71 | 2014-07-23 22:58:43 -0700 | [diff] [blame^] | 174 | enum mvs_en_ctl |
| 175 | { |
| 176 | MVS_DISABLE, |
| 177 | MVS_ENABLE, |
| 178 | }; |
| 179 | |
Deepa Dinamani | c342f12 | 2013-06-12 15:41:31 -0700 | [diff] [blame] | 180 | enum mpp_mode |
| 181 | { |
| 182 | MPP_DIGITAL_INPUT, |
| 183 | MPP_DIGITAL_OUTPUT, |
| 184 | MPP_DIGITAL_IN_AND_OUT, |
| 185 | MPP_BIDIRECTIONAL, |
| 186 | MPP_ANALOG_INPUT, |
| 187 | MPP_ANALOG_OUTPUT, |
| 188 | MPP_CURRENT_SINK, |
| 189 | MPP_RESERVED, |
| 190 | }; |
| 191 | |
| 192 | struct pm8x41_mpp |
| 193 | { |
| 194 | uint32_t base; |
| 195 | enum mpp_vin_select vin; |
| 196 | enum mpp_mode_en_source_select mode; |
| 197 | }; |
| 198 | |
Ajay Singh Parmar | 502ed71 | 2014-07-23 22:58:43 -0700 | [diff] [blame^] | 199 | struct pm8x41_mvs |
| 200 | { |
| 201 | uint32_t base; |
| 202 | }; |
| 203 | |
Sundarajan Srinivasan | 971b0d7 | 2013-12-10 17:56:22 -0800 | [diff] [blame] | 204 | #define PM8x41_MMP2_BASE 0xA100 |
Deepa Dinamani | c342f12 | 2013-06-12 15:41:31 -0700 | [diff] [blame] | 205 | #define PM8x41_MMP3_BASE 0xA200 |
Aparna Mallavarapu | 09c53df | 2014-03-28 17:47:43 +0530 | [diff] [blame] | 206 | #define PM8x41_MMP4_BASE 0xA300 |
Ajay Singh Parmar | 502ed71 | 2014-07-23 22:58:43 -0700 | [diff] [blame^] | 207 | #define PM8x41_MVS1_BASE 0x18400 |
Deepa Dinamani | c342f12 | 2013-06-12 15:41:31 -0700 | [diff] [blame] | 208 | |
Kuogee Hsieh | 1183511 | 2013-10-04 15:50:36 -0700 | [diff] [blame] | 209 | void pm8x41_lpg_write(uint8_t chan, uint8_t off, uint8_t val); |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 210 | int pm8x41_gpio_get(uint8_t gpio, uint8_t *status); |
Siddhartha Agrawal | d61f81e | 2012-12-17 19:20:35 -0800 | [diff] [blame] | 211 | int pm8x41_gpio_set(uint8_t gpio, uint8_t value); |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 212 | int pm8x41_gpio_config(uint8_t gpio, struct pm8x41_gpio *config); |
Deepa Dinamani | 2279965 | 2012-07-21 12:26:22 -0700 | [diff] [blame] | 213 | void pm8x41_set_boot_done(); |
Channagoud Kadabi | 36c19ea | 2013-07-05 16:28:44 -0700 | [diff] [blame] | 214 | uint32_t pm8x41_v2_resin_status(); |
Deepa Dinamani | c7f8758 | 2013-02-01 15:24:49 -0800 | [diff] [blame] | 215 | uint32_t pm8x41_resin_status(); |
Neeti Desai | 120b55d | 2012-08-20 17:15:56 -0700 | [diff] [blame] | 216 | void pm8x41_reset_configure(uint8_t); |
Deepa Dinamani | 3c9865d | 2013-03-08 14:03:19 -0800 | [diff] [blame] | 217 | void pm8x41_v2_reset_configure(uint8_t); |
Deepa Dinamani | e69ba61 | 2013-06-03 16:10:09 -0700 | [diff] [blame] | 218 | int pm8x41_ldo_set_voltage(struct pm8x41_ldo *ldo, uint32_t voltage); |
| 219 | int pm8x41_ldo_control(struct pm8x41_ldo *ldo, uint8_t enable); |
Deepa Dinamani | 7564f2a | 2013-02-05 17:55:51 -0800 | [diff] [blame] | 220 | uint8_t pm8x41_get_pmic_rev(); |
sundarajan srinivasan | d0f59e8 | 2013-02-12 19:17:02 -0800 | [diff] [blame] | 221 | uint8_t pm8x41_get_pon_reason(); |
Matthew Qin | 5e90d83 | 2014-07-11 11:15:22 +0800 | [diff] [blame] | 222 | uint8_t pm8x41_get_pon_poff_reason1(); |
| 223 | uint8_t pm8x41_get_pon_poff_reason2(); |
Matthew Qin | 3aa8705 | 2014-02-21 10:32:34 +0800 | [diff] [blame] | 224 | uint32_t pm8x41_get_pwrkey_is_pressed(); |
Deepa Dinamani | c342f12 | 2013-06-12 15:41:31 -0700 | [diff] [blame] | 225 | void pm8x41_config_output_mpp(struct pm8x41_mpp *mpp); |
| 226 | void pm8x41_enable_mpp(struct pm8x41_mpp *mpp, enum mpp_en_ctl enable); |
Ajay Singh Parmar | 502ed71 | 2014-07-23 22:58:43 -0700 | [diff] [blame^] | 227 | void pm8x41_enable_mvs(struct pm8x41_mvs *mvs, enum mvs_en_ctl enable); |
Ameya Thakur | b0a62ab | 2013-06-25 13:43:10 -0700 | [diff] [blame] | 228 | uint8_t pm8x41_get_is_cold_boot(); |
Amol Jadi | c3231ff | 2013-07-23 14:35:31 -0700 | [diff] [blame] | 229 | void pm8x41_diff_clock_ctrl(uint8_t enable); |
Xiaocheng Li | 73c5712 | 2013-09-14 17:32:00 +0800 | [diff] [blame] | 230 | void pm8x41_clear_pmic_watchdog(void); |
Channagoud Kadabi | 7ec7a08 | 2014-02-04 15:47:13 -0800 | [diff] [blame] | 231 | void pm8x41_lnbb_clock_ctrl(uint8_t enable); |
Deepa Dinamani | 2279965 | 2012-07-21 12:26:22 -0700 | [diff] [blame] | 232 | #endif |