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Eugene Yasman6382ee02013-01-16 13:00:56 +02001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Deepa Dinamani7d6c8972011-12-14 15:16:56 -08002 *
3 * Redistribution and use in source and binary forms, with or without
Deepa Dinamani1e094942012-10-30 15:49:02 -07004 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
Deepa Dinamani7d6c8972011-12-14 15:16:56 -080015 *
Deepa Dinamani1e094942012-10-30 15:49:02 -070016 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Deepa Dinamani7d6c8972011-12-14 15:16:56 -080027 */
28
29#include <debug.h>
30#include <platform/iomap.h>
31#include <reg.h>
32#include <target.h>
33#include <platform.h>
Deepa Dinamani26e93262012-05-21 17:35:14 -070034#include <uart_dm.h>
Amol Jadi29f95032012-06-22 12:52:54 -070035#include <mmc.h>
Deepa Dinamanic2a9b362012-02-23 15:15:54 -080036#include <spmi.h>
Neeti Desai465491e2012-07-31 12:53:35 -070037#include <board.h>
38#include <smem.h>
39#include <baseband.h>
Deepa Dinamani9a612932012-08-14 16:15:03 -070040#include <dev/keys.h>
41#include <pm8x41.h>
Deepa Dinamanib9a57202012-12-20 18:05:11 -080042#include <crypto5_wrapper.h>
43
44extern bool target_use_signed_kernel(void);
Deepa Dinamani7d6c8972011-12-14 15:16:56 -080045
46static unsigned int target_id;
Deepa Dinamani7d6c8972011-12-14 15:16:56 -080047
Deepa Dinamanic2a9b362012-02-23 15:15:54 -080048#define PMIC_ARB_CHANNEL_NUM 0
49#define PMIC_ARB_OWNER_ID 0
50
Deepa Dinamani1e094942012-10-30 15:49:02 -070051#define WDOG_DEBUG_DISABLE_BIT 17
Deepa Dinamani7d6c8972011-12-14 15:16:56 -080052
Deepa Dinamanib9a57202012-12-20 18:05:11 -080053#define CE_INSTANCE 2
54#define CE_EE 1
55#define CE_FIFO_SIZE 64
56#define CE_READ_PIPE 3
57#define CE_WRITE_PIPE 2
58#define CE_ARRAY_SIZE 20
59
Deepa Dinamanica5ad852012-05-07 18:19:47 -070060static uint32_t mmc_sdc_base[] =
61 { MSM_SDC1_BASE, MSM_SDC2_BASE, MSM_SDC3_BASE, MSM_SDC4_BASE };
62
Deepa Dinamani7d6c8972011-12-14 15:16:56 -080063void target_early_init(void)
64{
Deepa Dinamanib073ba22012-08-10 11:06:41 -070065#if WITH_DEBUG_UART
Neeti Desaiac011272012-08-29 18:24:54 -070066 uart_dm_init(1, 0, BLSP1_UART1_BASE);
Deepa Dinamanib073ba22012-08-10 11:06:41 -070067#endif
Deepa Dinamani7d6c8972011-12-14 15:16:56 -080068}
69
Deepa Dinamani9a612932012-08-14 16:15:03 -070070/* Return 1 if vol_up pressed */
71static int target_volume_up()
72{
73 uint8_t status = 0;
74 struct pm8x41_gpio gpio;
75
76 /* CDP vol_up seems to be always grounded. So gpio status is read as 0,
77 * whether key is pressed or not.
78 * Ignore volume_up key on CDP for now.
79 */
80 if (board_hardware_id() == HW_PLATFORM_SURF)
81 return 0;
82
83 /* Configure the GPIO */
84 gpio.direction = PM_GPIO_DIR_IN;
85 gpio.function = 0;
86 gpio.pull = PM_GPIO_PULL_UP_30;
Eugene Yasman6382ee02013-01-16 13:00:56 +020087 gpio.vin_sel = 2;
Deepa Dinamani9a612932012-08-14 16:15:03 -070088
89 pm8x41_gpio_config(5, &gpio);
90
91 /* Get status of P_GPIO_5 */
92 pm8x41_gpio_get(5, &status);
93
94 return !status; /* active low */
95}
96
97/* Return 1 if vol_down pressed */
98int target_volume_down()
99{
100 return pm8x41_vol_down_key_status();
101}
102
103static void target_keystatus()
104{
105 keys_init();
106
107 if(target_volume_down())
108 keys_post_event(KEY_VOLUMEDOWN, 1);
109
110 if(target_volume_up())
111 keys_post_event(KEY_VOLUMEUP, 1);
112}
113
Deepa Dinamanib9a57202012-12-20 18:05:11 -0800114/* Set up params for h/w CE. */
115void target_crypto_init_params()
116{
117 struct crypto_init_params ce_params;
118
119 /* Set up base addresses and instance. */
120 ce_params.crypto_instance = CE_INSTANCE;
121 ce_params.crypto_base = MSM_CE2_BASE;
122 ce_params.bam_base = MSM_CE2_BAM_BASE;
123
124 /* Set up BAM config. */
125 ce_params.bam_ee = CE_EE;
126 ce_params.pipes.read_pipe = CE_READ_PIPE;
127 ce_params.pipes.write_pipe = CE_WRITE_PIPE;
128
129 /* Assign buffer sizes. */
130 ce_params.num_ce = CE_ARRAY_SIZE;
131 ce_params.read_fifo_size = CE_FIFO_SIZE;
132 ce_params.write_fifo_size = CE_FIFO_SIZE;
133
134 crypto_init_params(&ce_params);
135}
136
137crypto_engine_type board_ce_type(void)
138{
139 return CRYPTO_ENGINE_TYPE_HW;
140}
141
Deepa Dinamani7d6c8972011-12-14 15:16:56 -0800142void target_init(void)
143{
Deepa Dinamanica5ad852012-05-07 18:19:47 -0700144 uint32_t base_addr;
145 uint8_t slot;
Deepa Dinamani7d6c8972011-12-14 15:16:56 -0800146
147 dprintf(INFO, "target_init()\n");
148
Deepa Dinamanic2a9b362012-02-23 15:15:54 -0800149 spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
Deepa Dinamani7d6c8972011-12-14 15:16:56 -0800150
Deepa Dinamani9a612932012-08-14 16:15:03 -0700151 target_keystatus();
152
Deepa Dinamanib9a57202012-12-20 18:05:11 -0800153 if (target_use_signed_kernel())
154 target_crypto_init_params();
155
Deepa Dinamanica5ad852012-05-07 18:19:47 -0700156 /* Trying Slot 1*/
157 slot = 1;
158 base_addr = mmc_sdc_base[slot - 1];
159 if (mmc_boot_main(slot, base_addr))
160 {
Deepa Dinamanid18b47a2012-06-27 13:06:03 -0700161
162 /* Trying Slot 2 next */
163 slot = 2;
164 base_addr = mmc_sdc_base[slot - 1];
165 if (mmc_boot_main(slot, base_addr)) {
166 dprintf(CRITICAL, "mmc init failed!");
167 ASSERT(0);
168 }
Deepa Dinamanica5ad852012-05-07 18:19:47 -0700169 }
Deepa Dinamani7d6c8972011-12-14 15:16:56 -0800170}
171
172unsigned board_machtype(void)
173{
174 return target_id;
175}
176
177/* Do any target specific intialization needed before entering fastboot mode */
178void target_fastboot_init(void)
179{
Deepa Dinamani9a612932012-08-14 16:15:03 -0700180 /* Set the BOOT_DONE flag in PM8921 */
181 pm8x41_set_boot_done();
Deepa Dinamani7d6c8972011-12-14 15:16:56 -0800182}
Neeti Desai465491e2012-07-31 12:53:35 -0700183
184/* Detect the target type */
185void target_detect(struct board_data *board)
186{
187 board->target = LINUX_MACHTYPE_UNKNOWN;
188}
189
190/* Detect the modem type */
191void target_baseband_detect(struct board_data *board)
192{
193 /* Check for baseband variants. Default to MSM */
194 if (board->platform_subtype == HW_PLATFORM_SUBTYPE_MDM)
195 board->baseband = BASEBAND_MDM;
196 else
197 board->baseband = BASEBAND_MSM;
198}
Deepa Dinamani9a612932012-08-14 16:15:03 -0700199
200void target_serialno(unsigned char *buf)
201{
202 unsigned int serialno;
203 if (target_is_emmc_boot()) {
204 serialno = mmc_get_psn();
205 snprintf((char *)buf, 13, "%x", serialno);
206 }
207}
Amol Jadi6639d452012-08-16 14:51:19 -0700208
209unsigned check_reboot_mode(void)
210{
211 uint32_t restart_reason = 0;
212
213 /* Read reboot reason and scrub it */
214 restart_reason = readl(RESTART_REASON_ADDR);
215 writel(0x00, RESTART_REASON_ADDR);
216
217 return restart_reason;
218}
Neeti Desai120b55d2012-08-20 17:15:56 -0700219
220void reboot_device(unsigned reboot_reason)
221{
222 /* Write the reboot reason */
223 writel(reboot_reason, RESTART_REASON_ADDR);
224
225 /* Configure PMIC for warm reset */
226 pm8x41_reset_configure(PON_PSHOLD_WARM_RESET);
227
Deepa Dinamani1e094942012-10-30 15:49:02 -0700228 /* Disable Watchdog Debug.
229 * Required becuase of a H/W bug which causes the system to
230 * reset partially even for non watchdog resets.
231 */
232 writel(readl(GCC_WDOG_DEBUG) & ~(1 << WDOG_DEBUG_DISABLE_BIT), GCC_WDOG_DEBUG);
233
Deepa Dinamanie0808e52012-11-26 15:22:46 -0800234 dsb();
235
236 /* Wait until the write takes effect. */
237 while(readl(GCC_WDOG_DEBUG) & (1 << WDOG_DEBUG_DISABLE_BIT));
238
Neeti Desai120b55d2012-08-20 17:15:56 -0700239 /* Drop PS_HOLD for MSM */
240 writel(0x00, MPM2_MPM_PS_HOLD);
241
242 mdelay(5000);
243
244 dprintf(CRITICAL, "Rebooting failed\n");
245}