Amit Blay | fe23ee2 | 2015-01-09 19:09:51 +0200 | [diff] [blame] | 1 | /* Copyright (c) 2011-2015, The Linux Foundation. All rights reserved. |
Shashank Mittal | 162244e | 2011-08-08 19:01:25 -0700 | [diff] [blame] | 2 | |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
Siddhartha Agrawal | eb094c5 | 2013-01-28 12:11:43 -0800 | [diff] [blame] | 12 | * * Neither the name of The Linux Foundation nor the names of its |
Shashank Mittal | 162244e | 2011-08-08 19:01:25 -0700 | [diff] [blame] | 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
| 28 | |
| 29 | #ifndef __SCM_H__ |
| 30 | #define __SCM_H__ |
| 31 | |
Channagoud Kadabi | dd85e7f | 2014-08-05 19:58:37 -0700 | [diff] [blame] | 32 | /* ARM SCM format support related flags */ |
| 33 | #define SIP_SVC_CALLS 0x02000000 |
| 34 | #define MAKE_SIP_SCM_CMD(svc_id, cmd_id) ((((svc_id << 8) | (cmd_id)) & 0xFFFF) | SIP_SVC_CALLS) |
| 35 | #define MAKE_SCM_VAR_ARGS(num_args, t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, ...) (\ |
| 36 | (((t0) & 0xff) << 4) | \ |
| 37 | (((t1) & 0xff) << 6) | \ |
| 38 | (((t2) & 0xff) << 8) | \ |
| 39 | (((t3) & 0xff) << 10) | \ |
| 40 | (((t4) & 0xff) << 12) | \ |
| 41 | (((t5) & 0xff) << 14) | \ |
| 42 | (((t6) & 0xff) << 16) | \ |
| 43 | (((t7) & 0xff) << 18) | \ |
| 44 | (((t8) & 0xff) << 20) | \ |
| 45 | (((t9) & 0xff) << 22) | \ |
| 46 | (num_args & 0xffff)) |
| 47 | #define MAKE_SCM_ARGS(...) MAKE_SCM_VAR_ARGS(__VA_ARGS__, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) |
| 48 | #define SCM_ATOMIC_BIT BIT(31) |
| 49 | #define SCM_MAX_ARG_LEN 5 |
| 50 | #define SCM_INDIR_MAX_LEN 10 |
| 51 | |
| 52 | enum |
| 53 | { |
| 54 | SMC_PARAM_TYPE_VALUE = 0, |
| 55 | SMC_PARAM_TYPE_BUFFER_READ, |
| 56 | SMC_PARAM_TYPE_BUFFER_READWRITE, |
| 57 | SMC_PARAM_TYPE_BUFFER_VALIDATION, |
| 58 | } scm_arg_type; |
| 59 | |
Shashank Mittal | 162244e | 2011-08-08 19:01:25 -0700 | [diff] [blame] | 60 | /* 8 Byte SSD magic number (LE) */ |
Neeti Desai | 127b9e0 | 2012-03-20 16:11:23 -0700 | [diff] [blame] | 61 | #define DECRYPT_MAGIC_0 0x73737A74 |
| 62 | #define DECRYPT_MAGIC_1 0x676D6964 |
| 63 | #define ENCRYPT_MAGIC_0 0x6B647373 |
| 64 | #define ENCRYPT_MAGIC_1 0x676D6973 |
Shashank Mittal | 162244e | 2011-08-08 19:01:25 -0700 | [diff] [blame] | 65 | #define SSD_HEADER_MAGIC_SIZE 8 |
| 66 | #define SSD_HEADER_XML_SIZE 2048 |
sundarajan srinivasan | 6173b87 | 2013-03-13 17:36:48 -0700 | [diff] [blame] | 67 | #define SSD_HEADER_MIN_SIZE 128 |
| 68 | #define MULTIPLICATION_FACTOR 2 |
Shashank Mittal | 162244e | 2011-08-08 19:01:25 -0700 | [diff] [blame] | 69 | |
| 70 | typedef unsigned int uint32; |
| 71 | |
Ajay Dudani | b01e506 | 2011-12-03 23:23:42 -0800 | [diff] [blame] | 72 | typedef struct { |
| 73 | uint32 len; |
| 74 | uint32 buf_offset; |
| 75 | uint32 resp_hdr_offset; |
| 76 | uint32 id; |
Shashank Mittal | 162244e | 2011-08-08 19:01:25 -0700 | [diff] [blame] | 77 | } scm_command; |
| 78 | |
Ajay Dudani | b01e506 | 2011-12-03 23:23:42 -0800 | [diff] [blame] | 79 | typedef struct { |
| 80 | uint32 len; |
| 81 | uint32 buf_offset; |
| 82 | uint32 is_complete; |
Shashank Mittal | 162244e | 2011-08-08 19:01:25 -0700 | [diff] [blame] | 83 | } scm_response; |
| 84 | |
Ajay Dudani | b01e506 | 2011-12-03 23:23:42 -0800 | [diff] [blame] | 85 | typedef struct { |
Ajay Dudani | b01e506 | 2011-12-03 23:23:42 -0800 | [diff] [blame] | 86 | uint32 *img_ptr; |
| 87 | uint32 *img_len_ptr; |
Neeti Desai | 127b9e0 | 2012-03-20 16:11:23 -0700 | [diff] [blame] | 88 | } img_req; |
Shashank Mittal | 162244e | 2011-08-08 19:01:25 -0700 | [diff] [blame] | 89 | |
Siddhartha Agrawal | eb094c5 | 2013-01-28 12:11:43 -0800 | [diff] [blame] | 90 | typedef struct { |
| 91 | uint32 id; |
| 92 | uint32 spare; |
| 93 | } tz_secure_cfg; |
| 94 | |
sundarajan srinivasan | 4dfd4f7 | 2013-02-27 14:13:09 -0800 | [diff] [blame] | 95 | typedef struct { |
| 96 | uint32 md_len; |
| 97 | uint32* md; |
| 98 | } ssd_parse_md_req; |
| 99 | |
| 100 | typedef struct { |
| 101 | uint32 status; |
| 102 | uint32 md_ctx_id; |
| 103 | uint32* md_end_ptr; |
| 104 | } ssd_parse_md_rsp; |
| 105 | |
| 106 | typedef struct { |
| 107 | uint32 md_ctx_id; |
| 108 | uint32 last_frag; |
| 109 | uint32 frag_len; |
| 110 | uint32 *frag; |
| 111 | } ssd_decrypt_img_frag_req; |
| 112 | |
| 113 | typedef struct { |
| 114 | uint32 status; |
| 115 | } ssd_decrypt_img_frag_rsp; |
| 116 | |
| 117 | typedef struct{ |
| 118 | uint32 feature_id; |
| 119 | } feature_version_req; |
| 120 | |
| 121 | typedef struct{ |
| 122 | uint32 version; |
| 123 | } feature_version_rsp; |
| 124 | |
| 125 | typedef struct{ |
Amit Blay | bdfabc6 | 2015-01-29 22:04:13 +0200 | [diff] [blame] | 126 | uint32 *status_ptr; |
| 127 | uint32 status_len; |
| 128 | } get_secure_state_req; |
| 129 | |
| 130 | typedef struct{ |
| 131 | uint32 status_low; |
| 132 | uint32 status_high; |
| 133 | } get_secure_state_rsp; |
| 134 | |
| 135 | typedef struct{ |
| 136 | uint32 row_address; |
| 137 | uint32 addr_type; |
| 138 | uint32 *row_data; |
| 139 | uint32 *qfprom_api_status; |
| 140 | } qfprom_read_row_req; |
| 141 | |
| 142 | typedef struct{ |
sundarajan srinivasan | 4dfd4f7 | 2013-02-27 14:13:09 -0800 | [diff] [blame] | 143 | uint32 *keystore_ptr; |
| 144 | uint32 keystore_len; |
| 145 | } ssd_protect_keystore_req; |
| 146 | |
| 147 | typedef struct{ |
| 148 | uint32 status; |
| 149 | } ssd_protect_keystore_rsp; |
| 150 | |
Abhimanyu Kapur | b3207fb | 2014-01-27 21:33:23 -0800 | [diff] [blame] | 151 | typedef struct { |
Aparna Mallavarapu | 6875ade | 2014-06-16 22:15:28 +0530 | [diff] [blame] | 152 | uint32_t config; |
| 153 | uint32_t spare; |
| 154 | } tz_xpu_prot_cmd; |
| 155 | |
| 156 | typedef struct { |
Abhimanyu Kapur | b3207fb | 2014-01-27 21:33:23 -0800 | [diff] [blame] | 157 | uint64_t el1_x0; |
| 158 | uint64_t el1_x1; |
| 159 | uint64_t el1_x2; |
| 160 | uint64_t el1_x3; |
| 161 | uint64_t el1_x4; |
| 162 | uint64_t el1_x5; |
| 163 | uint64_t el1_x6; |
| 164 | uint64_t el1_x7; |
| 165 | uint64_t el1_x8; |
| 166 | uint64_t el1_elr; |
| 167 | } el1_system_param; |
| 168 | |
Maria Yu | beeeeaf | 2014-06-30 13:05:43 +0800 | [diff] [blame] | 169 | struct tz_prng_data { |
| 170 | uint8_t *out_buf; |
| 171 | uint32_t out_buf_size; |
Maria Yu | d3aec50 | 2014-12-23 16:58:47 +0800 | [diff] [blame] | 172 | }__PACKED; |
Maria Yu | beeeeaf | 2014-06-30 13:05:43 +0800 | [diff] [blame] | 173 | |
Amit Blay | fe23ee2 | 2015-01-09 19:09:51 +0200 | [diff] [blame] | 174 | typedef struct { |
| 175 | uint8_t *in_buf; |
| 176 | uint32_t in_buf_size; |
| 177 | uint8_t *out_buf; |
| 178 | uint32_t out_buf_size; |
| 179 | uint32_t direction; |
| 180 | } mdtp_cipher_dip_req; |
| 181 | |
Channagoud Kadabi | dd85e7f | 2014-08-05 19:58:37 -0700 | [diff] [blame] | 182 | /* SCM support as per ARM spec */ |
| 183 | /* |
| 184 | * Structure to define the argument for scm call |
| 185 | * x0: is the command ID |
| 186 | * x1: Number of argument & type of arguments |
| 187 | * : Type can be any of |
| 188 | * : SMC_PARAM_TYPE_VALUE 0 |
| 189 | * : SMC_PARAM_TYPE_BUFFER_READ 1 |
| 190 | * : SMC_PARAM_TYPE_BUFFER_READWRITE 2 |
| 191 | * : SMC_PARAM_TYPE_BUFFER_VALIDATION 3 |
| 192 | * @Note: Number of argument count starts from X2. |
| 193 | * x2-x4: Arguments |
| 194 | * X5[10]: if the number of argument is more, an indirect |
| 195 | * : list can be passed here. |
| 196 | */ |
| 197 | typedef struct { |
| 198 | uint32_t x0;/* command ID details as per ARMv8 spec : |
| 199 | 0:7 command, 8:15 service id |
| 200 | 0x02000000: SIP calls |
| 201 | 30: SMC32 or SMC64 |
| 202 | 31: Standard or fast calls*/ |
| 203 | uint32_t x1; /* # of args and attributes for buffers |
| 204 | * 0-3: arg # |
| 205 | * 4-5: type of arg1 |
| 206 | * 6-7: type of arg2 |
| 207 | * : |
| 208 | * : |
| 209 | * 20-21: type of arg8 |
| 210 | * 22-23: type of arg9 |
| 211 | */ |
| 212 | uint32_t x2; /* Param1 */ |
| 213 | uint32_t x3; /* Param2 */ |
| 214 | uint32_t x4; /* Param3 */ |
| 215 | uint32_t x5[10]; /* Indirect parameter list */ |
| 216 | uint32_t atomic; /* To indicate if its standard or fast call */ |
| 217 | } scmcall_arg; |
| 218 | |
| 219 | /* Return value for the SCM call: |
| 220 | * SCM call returns values in register if its less than |
| 221 | * 12 bytes, anything greater need to be input buffer + input len |
| 222 | * arguments |
| 223 | */ |
| 224 | typedef struct |
| 225 | { |
| 226 | uint32_t x1; |
| 227 | uint32_t x2; |
| 228 | uint32_t x3; |
| 229 | } scmcall_ret; |
| 230 | |
sundarajan srinivasan | 4dfd4f7 | 2013-02-27 14:13:09 -0800 | [diff] [blame] | 231 | /* Service IDs */ |
Aparna Mallavarapu | 68e233f | 2014-03-21 19:18:34 +0530 | [diff] [blame] | 232 | #define SCM_SVC_BOOT 0x01 |
sundarajan srinivasan | 4dfd4f7 | 2013-02-27 14:13:09 -0800 | [diff] [blame] | 233 | #define TZBSP_SVC_INFO 0x06 |
| 234 | #define SCM_SVC_SSD 0x07 |
| 235 | #define SVC_MEMORY_PROTECTION 0x0C |
Maria Yu | beeeeaf | 2014-06-30 13:05:43 +0800 | [diff] [blame] | 236 | #define TZ_SVC_CRYPTO 0x0A |
Channagoud Kadabi | dd85e7f | 2014-08-05 19:58:37 -0700 | [diff] [blame] | 237 | #define SCM_SVC_INFO 0x06 |
sundarajan srinivasan | 4dfd4f7 | 2013-02-27 14:13:09 -0800 | [diff] [blame] | 238 | |
| 239 | /*Service specific command IDs */ |
Aparna Mallavarapu | 6875ade | 2014-06-16 22:15:28 +0530 | [diff] [blame] | 240 | #define ERR_FATAL_ENABLE 0x0 |
Neeti Desai | 127b9e0 | 2012-03-20 16:11:23 -0700 | [diff] [blame] | 241 | #define SSD_DECRYPT_ID 0x01 |
| 242 | #define SSD_ENCRYPT_ID 0x02 |
sundarajan srinivasan | 4dfd4f7 | 2013-02-27 14:13:09 -0800 | [diff] [blame] | 243 | #define SSD_PROTECT_KEYSTORE_ID 0x05 |
| 244 | #define SSD_PARSE_MD_ID 0x06 |
| 245 | #define SSD_DECRYPT_IMG_FRAG_ID 0x07 |
Aparna Mallavarapu | 68e233f | 2014-03-21 19:18:34 +0530 | [diff] [blame] | 246 | #define WDOG_DEBUG_DISABLE 0x09 |
| 247 | #define SCM_DLOAD_CMD 0x10 |
Aparna Mallavarapu | 6875ade | 2014-06-16 22:15:28 +0530 | [diff] [blame] | 248 | #define XPU_ERR_FATAL 0xe |
sundarajan srinivasan | 4dfd4f7 | 2013-02-27 14:13:09 -0800 | [diff] [blame] | 249 | |
| 250 | #define SECURE_DEVICE_MDSS 0x01 |
| 251 | |
Siddhartha Agrawal | eb094c5 | 2013-01-28 12:11:43 -0800 | [diff] [blame] | 252 | #define IOMMU_SECURE_CFG 0x02 |
| 253 | |
sundarajan srinivasan | 4dfd4f7 | 2013-02-27 14:13:09 -0800 | [diff] [blame] | 254 | #define TZ_INFO_GET_FEATURE_ID 0x03 |
Amit Blay | bdfabc6 | 2015-01-29 22:04:13 +0200 | [diff] [blame] | 255 | #define TZ_INFO_GET_SECURE_STATE 0x04 |
sundarajan srinivasan | 4dfd4f7 | 2013-02-27 14:13:09 -0800 | [diff] [blame] | 256 | |
Maria Yu | beeeeaf | 2014-06-30 13:05:43 +0800 | [diff] [blame] | 257 | #define PRNG_CMD_ID 0x01 |
Channagoud Kadabi | dd85e7f | 2014-08-05 19:58:37 -0700 | [diff] [blame] | 258 | #define IS_CALL_AVAIL_CMD 0x01 |
Aparna Mallavarapu | 246c30b | 2014-12-11 12:07:51 +0530 | [diff] [blame] | 259 | #define IS_SECURE_BOOT_ENABLED 0x04 |
Maria Yu | beeeeaf | 2014-06-30 13:05:43 +0800 | [diff] [blame] | 260 | |
Aparna Mallavarapu | 68e233f | 2014-03-21 19:18:34 +0530 | [diff] [blame] | 261 | /* Download Mode specific arguments to be passed to TZ */ |
Lijuan Gao | f1286fb | 2015-01-29 19:47:28 +0800 | [diff] [blame] | 262 | #define SCM_EDLOAD_MODE 0x01 |
Aparna Mallavarapu | 68e233f | 2014-03-21 19:18:34 +0530 | [diff] [blame] | 263 | #define SCM_DLOAD_MODE 0x10 |
| 264 | |
sundarajan srinivasan | 4dfd4f7 | 2013-02-27 14:13:09 -0800 | [diff] [blame] | 265 | /* SSD parsing status messages from TZ */ |
| 266 | #define SSD_PMD_ENCRYPTED 0 |
| 267 | #define SSD_PMD_NOT_ENCRYPTED 1 |
| 268 | #define SSD_PMD_NO_MD_FOUND 3 |
| 269 | #define SSD_PMD_BUSY 4 |
| 270 | #define SSD_PMD_BAD_MD_PTR_OR_LEN 5 |
| 271 | #define SSD_PMD_PARSING_INCOMPLETE 6 |
| 272 | #define SSD_PMD_PARSING_FAILED 7 |
| 273 | #define SSD_PMD_SETUP_CIPHER_FAILED 8 |
| 274 | |
| 275 | /* Keystore status messages */ |
| 276 | #define TZBSP_SSD_PKS_SUCCESS 0 /**< Successful return. */ |
| 277 | #define TZBSP_SSD_PKS_INVALID_PTR 1 /**< Keystore pointer invalid. */ |
| 278 | #define TZBSP_SSD_PKS_INVALID_LEN 2 /**< Keystore length incorrect. */ |
| 279 | #define TZBSP_SSD_PKS_UNALIGNED_PTR 3 /**< Keystore pointer not word |
| 280 | aligned. */ |
| 281 | #define TZBSP_SSD_PKS_PROTECT_MEM_FAILED 4 /**< Failure when protecting |
| 282 | the keystore memory.*/ |
| 283 | #define TZBSP_SSD_PKS_INVALID_NUM_KEYS 5 /**< Unsupported number of |
| 284 | keys passed. If a valid |
| 285 | pointer to non-secure |
| 286 | memory is passed that |
| 287 | isn't a keystore, this is |
| 288 | a likely return code. */ |
| 289 | #define TZBSP_SSD_PKS_DECRYPT_FAILED 6 /**< The keystore could not be |
| 290 | decrypted. */ |
| 291 | |
| 292 | /* Features in TZ */ |
| 293 | #define TZBSP_FVER_SSD 5 |
| 294 | |
| 295 | #define TZBSP_GET_FEATURE_VERSION(major) ((major >> 22)& 0x3FF) |
Siddhartha Agrawal | eb094c5 | 2013-01-28 12:11:43 -0800 | [diff] [blame] | 296 | |
Shashank Mittal | 162244e | 2011-08-08 19:01:25 -0700 | [diff] [blame] | 297 | static uint32 smc(uint32 cmd_addr); |
Neeti Desai | 127b9e0 | 2012-03-20 16:11:23 -0700 | [diff] [blame] | 298 | int decrypt_scm(uint32_t ** img_ptr, uint32_t * img_len_ptr); |
sundarajan srinivasan | 4dfd4f7 | 2013-02-27 14:13:09 -0800 | [diff] [blame] | 299 | int decrypt_scm_v2(uint32_t ** img_ptr, uint32_t * img_len_ptr); |
Neeti Desai | 127b9e0 | 2012-03-20 16:11:23 -0700 | [diff] [blame] | 300 | int encrypt_scm(uint32_t ** img_ptr, uint32_t * img_len_ptr); |
sundarajan srinivasan | 4dfd4f7 | 2013-02-27 14:13:09 -0800 | [diff] [blame] | 301 | int scm_svc_version(uint32 * major, uint32 * minor); |
Amit Blay | bdfabc6 | 2015-01-29 22:04:13 +0200 | [diff] [blame] | 302 | |
| 303 | /** |
| 304 | * Check security status on the device. Returns the security check result. |
| 305 | * Bit value 0 means the check passing, and bit value 1 means the check failing. |
| 306 | * |
| 307 | * @state_low[out] : lower 32 bits of the state: |
| 308 | * Bit 0: secboot enabling check failed |
| 309 | * Bit 1: Sec HW key is not programmed |
| 310 | * Bit 2: debug disable check failed |
| 311 | * Bit 3: Anti-rollback check failed |
| 312 | * Bit 4: fuse config check failed |
| 313 | * Bit 5: rpmb fuse check failed |
| 314 | * @state_high[out] : highr 32 bits of the state. |
| 315 | * |
| 316 | * Returns 0 on success, negative on failure. |
| 317 | */ |
| 318 | int scm_svc_get_secure_state(uint32_t *state_low, uint32_t *state_high); |
| 319 | |
sundarajan srinivasan | 4dfd4f7 | 2013-02-27 14:13:09 -0800 | [diff] [blame] | 320 | int scm_protect_keystore(uint32_t * img_ptr, uint32_t img_len); |
Shashank Mittal | 162244e | 2011-08-08 19:01:25 -0700 | [diff] [blame] | 321 | |
Deepa Dinamani | 193874e | 2012-02-07 14:00:04 -0800 | [diff] [blame] | 322 | #define SCM_SVC_FUSE 0x08 |
| 323 | #define SCM_BLOW_SW_FUSE_ID 0x01 |
| 324 | #define SCM_IS_SW_FUSE_BLOWN_ID 0x02 |
Amit Blay | bdfabc6 | 2015-01-29 22:04:13 +0200 | [diff] [blame] | 325 | #define SCM_QFPROM_READ_ROW_ID 0x05 |
Shashank Mittal | 162244e | 2011-08-08 19:01:25 -0700 | [diff] [blame] | 326 | |
Deepa Dinamani | 193874e | 2012-02-07 14:00:04 -0800 | [diff] [blame] | 327 | #define HLOS_IMG_TAMPER_FUSE 0 |
| 328 | |
| 329 | |
| 330 | #define SCM_SVC_CE_CHN_SWITCH_ID 0x04 |
| 331 | #define SCM_CE_CHN_SWITCH_ID 0x02 |
| 332 | |
Amir Samuelov | 4620ad2 | 2013-03-13 11:30:05 +0200 | [diff] [blame] | 333 | #define SCM_SVC_ES 0x10 |
| 334 | #define SCM_SAVE_PARTITION_HASH_ID 0x01 |
| 335 | |
Amit Blay | fe23ee2 | 2015-01-09 19:09:51 +0200 | [diff] [blame] | 336 | #define SCM_SVC_MDTP 0x12 |
| 337 | #define SCM_MDTP_CIPHER_DIP 0x01 |
| 338 | |
Channagoud Kadabi | 179df0b | 2013-12-12 14:53:31 -0800 | [diff] [blame] | 339 | #define SCM_SVC_PWR 0x9 |
| 340 | #define SCM_IO_DISABLE_PMIC_ARBITER 0x1 |
Aparna Mallavarapu | 664ea77 | 2015-02-24 18:44:33 +0530 | [diff] [blame^] | 341 | #define SCM_IO_DISABLE_PMIC_ARBITER1 0x2 |
Channagoud Kadabi | 179df0b | 2013-12-12 14:53:31 -0800 | [diff] [blame] | 342 | |
Abhimanyu Kapur | b3207fb | 2014-01-27 21:33:23 -0800 | [diff] [blame] | 343 | #define SCM_SVC_MILESTONE_32_64_ID 0x1 |
| 344 | #define SCM_SVC_MILESTONE_CMD_ID 0xf |
| 345 | |
Deepa Dinamani | 193874e | 2012-02-07 14:00:04 -0800 | [diff] [blame] | 346 | enum ap_ce_channel_type { |
| 347 | AP_CE_REGISTER_USE = 0, |
| 348 | AP_CE_ADM_USE = 1 |
| 349 | }; |
| 350 | |
| 351 | /* Apps CE resource. */ |
| 352 | #define TZ_RESOURCE_CE_AP 2 |
| 353 | |
Aparna Mallavarapu | 246c30b | 2014-12-11 12:07:51 +0530 | [diff] [blame] | 354 | /* Secure IO Service IDs */ |
| 355 | #define SCM_IO_READ 0x1 |
| 356 | #define SCM_IO_WRITE 0x2 |
| 357 | #define SCM_SVC_IO 0x5 |
| 358 | |
Deepa Dinamani | 193874e | 2012-02-07 14:00:04 -0800 | [diff] [blame] | 359 | uint8_t switch_ce_chn_cmd(enum ap_ce_channel_type channel); |
| 360 | |
Amit Blay | fe23ee2 | 2015-01-09 19:09:51 +0200 | [diff] [blame] | 361 | /** |
| 362 | * Encrypt or Decrypt a Data Integrity Partition (DIP) structure using a |
| 363 | * HW derived key. The DIP is used for storing integrity information for |
| 364 | * Mobile Device Theft Protection (MDTP) service. |
| 365 | * |
| 366 | * @in_buf[in] : Pointer to plain text buffer. |
| 367 | * @in_buf_size[in] : Plain text buffer size. |
| 368 | * @out_buf[in] : Pointer to encrypted buffer. |
| 369 | * @out_buf_size[in] : Encrypted buffer size. |
| 370 | * @direction[in] : 0 for ENCRYPTION, 1 for DECRYPTION. |
| 371 | * |
| 372 | * Returns 0 on success, negative on failure. |
| 373 | */ |
| 374 | int mdtp_cipher_dip_cmd(uint8_t *in_buf, uint32_t in_buf_size, uint8_t *out_buf, |
| 375 | uint32_t out_buf_size, uint32_t direction); |
Deepa Dinamani | 193874e | 2012-02-07 14:00:04 -0800 | [diff] [blame] | 376 | |
Shashank Mittal | 162244e | 2011-08-08 19:01:25 -0700 | [diff] [blame] | 377 | void set_tamper_fuse_cmd(); |
| 378 | |
Amit Blay | bdfabc6 | 2015-01-29 22:04:13 +0200 | [diff] [blame] | 379 | /** |
| 380 | * Reads the row data of the specified QFPROM row address. |
| 381 | * |
| 382 | * @row_address[in] : Row address in the QFPROM region to read. |
| 383 | * @addr_type[in] : Raw or corrected address. |
| 384 | * @row_data[in] : Pointer to the data to be read. |
| 385 | * @qfprom_api_status[out] : Status of the read operation. |
| 386 | * |
| 387 | * Returns Any errors while reading data from the specified |
| 388 | * Returns 0 on success, negative on failure. |
| 389 | */ |
| 390 | int qfprom_read_row_cmd(uint32_t row_address, uint32_t addr_type, uint32_t *row_data, uint32_t *qfprom_api_status); |
| 391 | |
Channagoud Kadabi | 179df0b | 2013-12-12 14:53:31 -0800 | [diff] [blame] | 392 | int scm_halt_pmic_arbiter(); |
Aparna Mallavarapu | 68e233f | 2014-03-21 19:18:34 +0530 | [diff] [blame] | 393 | int scm_call_atomic2(uint32_t svc, uint32_t cmd, uint32_t arg1, uint32_t arg2); |
vijay kumar | 4f4405f | 2014-08-08 11:49:53 +0530 | [diff] [blame] | 394 | int restore_secure_cfg(uint32_t id); |
Channagoud Kadabi | 179df0b | 2013-12-12 14:53:31 -0800 | [diff] [blame] | 395 | |
Abhimanyu Kapur | b3207fb | 2014-01-27 21:33:23 -0800 | [diff] [blame] | 396 | void scm_elexec_call(paddr_t kernel_entry, paddr_t dtb_offset); |
Maria Yu | beeeeaf | 2014-06-30 13:05:43 +0800 | [diff] [blame] | 397 | void *get_canary(); |
Aparna Mallavarapu | 6875ade | 2014-06-16 22:15:28 +0530 | [diff] [blame] | 398 | /* API to configure XPU violations as fatal */ |
| 399 | int scm_xpu_err_fatal_init(); |
Abhimanyu Kapur | b3207fb | 2014-01-27 21:33:23 -0800 | [diff] [blame] | 400 | |
Channagoud Kadabi | dd85e7f | 2014-08-05 19:58:37 -0700 | [diff] [blame] | 401 | /* APIs to support ARM scm standard |
| 402 | * Takes arguments : x0-x5 and returns result |
| 403 | * in x0-x3*/ |
| 404 | uint32_t scm_call2(scmcall_arg *arg, scmcall_ret *ret); |
| 405 | |
Shashank Mittal | 162244e | 2011-08-08 19:01:25 -0700 | [diff] [blame] | 406 | /** |
| 407 | * struct scm_command - one SCM command buffer |
| 408 | * @len: total available memory for command and response |
| 409 | * @buf_offset: start of command buffer |
| 410 | * @resp_hdr_offset: start of response buffer |
| 411 | * @id: command to be executed |
| 412 | * @buf: buffer returned from scm_get_command_buffer() |
| 413 | * |
| 414 | * An SCM command is layed out in memory as follows: |
| 415 | * |
| 416 | * ------------------- <--- struct scm_command |
| 417 | * | command header | |
| 418 | * ------------------- <--- scm_get_command_buffer() |
| 419 | * | command buffer | |
| 420 | * ------------------- <--- struct scm_response and |
| 421 | * | response header | scm_command_to_response() |
| 422 | * ------------------- <--- scm_get_response_buffer() |
| 423 | * | response buffer | |
| 424 | * ------------------- |
| 425 | * |
| 426 | * There can be arbitrary padding between the headers and buffers so |
| 427 | * you should always use the appropriate scm_get_*_buffer() routines |
| 428 | * to access the buffers in a safe manner. |
| 429 | */ |
| 430 | struct scm_command { |
Ajay Dudani | b01e506 | 2011-12-03 23:23:42 -0800 | [diff] [blame] | 431 | uint32_t len; |
| 432 | uint32_t buf_offset; |
| 433 | uint32_t resp_hdr_offset; |
| 434 | uint32_t id; |
| 435 | uint32_t buf[0]; |
Shashank Mittal | 162244e | 2011-08-08 19:01:25 -0700 | [diff] [blame] | 436 | }; |
| 437 | |
| 438 | /** |
| 439 | * struct scm_response - one SCM response buffer |
| 440 | * @len: total available memory for response |
| 441 | * @buf_offset: start of response data relative to start of scm_response |
| 442 | * @is_complete: indicates if the command has finished processing |
| 443 | */ |
| 444 | struct scm_response { |
Ajay Dudani | b01e506 | 2011-12-03 23:23:42 -0800 | [diff] [blame] | 445 | uint32_t len; |
| 446 | uint32_t buf_offset; |
| 447 | uint32_t is_complete; |
Shashank Mittal | 162244e | 2011-08-08 19:01:25 -0700 | [diff] [blame] | 448 | }; |
Channagoud Kadabi | dd85e7f | 2014-08-05 19:58:37 -0700 | [diff] [blame] | 449 | /* Perform any scm init needed before making scm calls |
| 450 | * Used for checking if armv8 SCM support present |
| 451 | */ |
| 452 | void scm_init(); |
Aparna Mallavarapu | 246c30b | 2014-12-11 12:07:51 +0530 | [diff] [blame] | 453 | bool is_secure_boot_enable(); |
Shashank Mittal | 162244e | 2011-08-08 19:01:25 -0700 | [diff] [blame] | 454 | #endif |