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Kuogee Hsiehdf961742013-12-18 14:13:45 -08001/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -08002 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions
5 * are met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above copyright
9 * notice, this list of conditions and the following disclaimer in
10 * the documentation and/or other materials provided with the
11 * distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
19 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
20 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
23 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
26 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30#include <debug.h>
31#include <smem.h>
Casey Piper98e94f12013-09-09 20:42:15 -070032#include <err.h>
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -080033#include <msm_panel.h>
Casey Piper98e94f12013-09-09 20:42:15 -070034#include <mipi_dsi.h>
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -080035#include <pm8x41.h>
36#include <pm8x41_wled.h>
37#include <board.h>
38#include <mdp5.h>
39#include <platform/gpio.h>
Asaf Pensoc9080dc2013-05-21 21:53:50 +030040#include <platform/clock.h>
Siddhartha Agrawal1b2ed842013-05-29 18:02:28 -070041#include <platform/iomap.h>
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -080042#include <target/display.h>
Casey Piper98e94f12013-09-09 20:42:15 -070043#include "include/panel.h"
44#include "include/display_resource.h"
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -080045
46static struct msm_fb_panel_data panel;
Casey Piper98e94f12013-09-09 20:42:15 -070047static uint8_t edp_enable;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -080048
Casey Piper98e94f12013-09-09 20:42:15 -070049#define HFPLL_LDO_ID 12
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -080050
Asaf Penso0ecd86f2013-05-29 14:49:19 +030051static struct pm8x41_wled_data wled_ctrl = {
Amy Maloche543b5842013-07-31 18:07:38 -070052 .mod_scheme = 0x00,
Asaf Penso0ecd86f2013-05-29 14:49:19 +030053 .led1_brightness = (0x0F << 8) | 0xEF,
54 .led2_brightness = (0x0F << 8) | 0xEF,
55 .led3_brightness = (0x0F << 8) | 0xEF,
56 .max_duty_cycle = 0x01,
57 .ovp = 0x2,
58 .full_current_scale = 0x19
59};
60
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +053061static uint32_t dsi_pll_lock_status(uint32_t pll_base)
Casey Piper98e94f12013-09-09 20:42:15 -070062{
Dhaval Patelbb408712014-03-18 11:45:53 -070063 uint32_t counter, status;
Casey Piper98e94f12013-09-09 20:42:15 -070064
Dhaval Patelbb408712014-03-18 11:45:53 -070065 udelay(100);
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +053066 mdss_dsi_uniphy_pll_lock_detect_setting(pll_base);
Dhaval Patelbb408712014-03-18 11:45:53 -070067
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +053068 status = readl(pll_base + 0x00c0) & 0x01;
Dhaval Patelbb408712014-03-18 11:45:53 -070069 for (counter = 0; counter < 5 && !status; counter++) {
70 udelay(100);
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +053071 status = readl(pll_base + 0x00c0) & 0x01;
Dhaval Patelbb408712014-03-18 11:45:53 -070072 }
73
74 return status;
75}
76
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +053077static uint32_t dsi_pll_enable_seq_b(uint32_t pll_base)
Dhaval Patelbb408712014-03-18 11:45:53 -070078{
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +053079 mdss_dsi_uniphy_pll_sw_reset(pll_base);
Casey Piper98e94f12013-09-09 20:42:15 -070080
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +053081 writel(0x01, pll_base + 0x0020); /* GLB CFG */
Dhaval Patelbb408712014-03-18 11:45:53 -070082 udelay(1);
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +053083 writel(0x05, pll_base + 0x0020); /* GLB CFG */
Dhaval Patelbb408712014-03-18 11:45:53 -070084 udelay(200);
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +053085 writel(0x07, pll_base + 0x0020); /* GLB CFG */
Dhaval Patelbb408712014-03-18 11:45:53 -070086 udelay(500);
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +053087 writel(0x0f, pll_base + 0x0020); /* GLB CFG */
Dhaval Patelbb408712014-03-18 11:45:53 -070088 udelay(500);
Casey Piper98e94f12013-09-09 20:42:15 -070089
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +053090 return dsi_pll_lock_status(pll_base);
Dhaval Patelbb408712014-03-18 11:45:53 -070091}
Casey Piper98e94f12013-09-09 20:42:15 -070092
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +053093static uint32_t dsi_pll_enable_seq_d(uint32_t pll_base)
Dhaval Patelbb408712014-03-18 11:45:53 -070094{
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +053095 mdss_dsi_uniphy_pll_sw_reset(pll_base);
Dhaval Patelbb408712014-03-18 11:45:53 -070096
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +053097 writel(0x01, pll_base + 0x0020); /* GLB CFG */
Dhaval Patelbb408712014-03-18 11:45:53 -070098 udelay(1);
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +053099 writel(0x05, pll_base + 0x0020); /* GLB CFG */
Dhaval Patelbb408712014-03-18 11:45:53 -0700100 udelay(200);
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +0530101 writel(0x07, pll_base + 0x0020); /* GLB CFG */
Dhaval Patelbb408712014-03-18 11:45:53 -0700102 udelay(250);
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +0530103 writel(0x05, pll_base + 0x0020); /* GLB CFG */
Dhaval Patelbb408712014-03-18 11:45:53 -0700104 udelay(200);
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +0530105 writel(0x07, pll_base + 0x0220); /* GLB CFG */
Dhaval Patelbb408712014-03-18 11:45:53 -0700106 udelay(500);
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +0530107 writel(0x0f, pll_base + 0x0220); /* GLB CFG */
Dhaval Patelbb408712014-03-18 11:45:53 -0700108 udelay(500);
109
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +0530110 return dsi_pll_lock_status(pll_base);
Dhaval Patelbb408712014-03-18 11:45:53 -0700111}
112
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +0530113static void dsi_pll_enable_seq(uint32_t pll_base)
Dhaval Patelbb408712014-03-18 11:45:53 -0700114{
115 uint32_t counter, status;
116
117 for (counter = 0; counter < 3; counter++) {
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +0530118 status = dsi_pll_enable_seq_b(pll_base);
Dhaval Patelbb408712014-03-18 11:45:53 -0700119 if (status)
120 break;
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +0530121 status = dsi_pll_enable_seq_d(pll_base);
Dhaval Patelbb408712014-03-18 11:45:53 -0700122 if (status)
123 break;
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +0530124 status = dsi_pll_enable_seq_d(pll_base);
Dhaval Patelbb408712014-03-18 11:45:53 -0700125 if(status)
126 break;
Casey Piper98e94f12013-09-09 20:42:15 -0700127 }
Dhaval Patelbb408712014-03-18 11:45:53 -0700128
129 if (!status)
130 dprintf(CRITICAL, "Pll lock sequence failed\n");
Casey Piper98e94f12013-09-09 20:42:15 -0700131}
132
Kuogee Hsiehdf961742013-12-18 14:13:45 -0800133static int msm8974_wled_backlight_ctrl(uint8_t enable)
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800134{
Chandan Uddarajud1bcbeb2013-07-01 18:13:48 -0700135 uint32_t platform_id = board_platform_id();
136 uint32_t hardware_id = board_hardware_id();
Casey Piper98e94f12013-09-09 20:42:15 -0700137 uint8_t slave_id = 1;
Chandan Uddarajud1bcbeb2013-07-01 18:13:48 -0700138
Casey Piper98e94f12013-09-09 20:42:15 -0700139 if (enable) {
140 if (platform_id == MSM8974AC)
141 if ((hardware_id == HW_PLATFORM_MTP)
142 || (hardware_id == HW_PLATFORM_LIQUID))
143 slave_id = 3;
Chandan Uddarajud1bcbeb2013-07-01 18:13:48 -0700144
Casey Piper98e94f12013-09-09 20:42:15 -0700145 pm8x41_wled_config_slave_id(slave_id);
146 pm8x41_wled_config(&wled_ctrl);
147 pm8x41_wled_sink_control(enable);
148 pm8x41_wled_iled_sync_control(enable);
Jayant Shekhar855c5002013-12-06 17:36:07 +0530149 pm8x41_wled_led_mod_enable(enable);
Casey Piper98e94f12013-09-09 20:42:15 -0700150 }
151 pm8x41_wled_enable(enable);
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800152
Casey Piper98e94f12013-09-09 20:42:15 -0700153 return NO_ERROR;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800154}
155
Kuogee Hsiehdf961742013-12-18 14:13:45 -0800156static int msm8974_pwm_backlight_ctrl(int gpio_num, int lpg_chan, int enable)
157{
158 struct pm8x41_gpio gpio_param = {
159 .direction = PM_GPIO_DIR_OUT,
160 .function = PM_GPIO_FUNC_2,
161 .vin_sel = 2, /* VIN_2 */
162 .pull = PM_GPIO_PULL_UP_1_5 | PM_GPIO_PULLDOWN_10,
163 .output_buffer = PM_GPIO_OUT_CMOS,
164 .out_strength = PM_GPIO_OUT_DRIVE_HIGH,
165 };
166
167 dprintf(SPEW, "%s: gpio=%d lpg=%d enable=%d\n", __func__,
168 gpio_num, lpg_chan, enable);
169
170 if (enable) {
171 pm8x41_gpio_config(gpio_num, &gpio_param);
172 pm8x41_lpg_write(lpg_chan, 0x41, 0x33); /* LPG_PWM_SIZE_CLK, */
173 pm8x41_lpg_write(lpg_chan, 0x42, 0x01); /* LPG_PWM_FREQ_PREDIV */
174 pm8x41_lpg_write(lpg_chan, 0x43, 0x20); /* LPG_PWM_TYPE_CONFIG */
175 pm8x41_lpg_write(lpg_chan, 0x44, 0xb2); /* LPG_VALUE_LSB */
176 pm8x41_lpg_write(lpg_chan, 0x45, 0x01); /* LPG_VALUE_MSB */
177 pm8x41_lpg_write(lpg_chan, 0x46, 0xe4); /* LPG_ENABLE_CONTROL */
178 } else {
179 pm8x41_lpg_write(lpg_chan, 0x46, 0x00);
180 }
181
182 return NO_ERROR;
183}
184
185int target_backlight_ctrl(struct backlight *bl, uint8_t enable)
186{
187 uint32_t ret = NO_ERROR;
188
189 if (!bl) {
190 dprintf(CRITICAL, "backlight structure is not available\n");
191 return ERR_INVALID_ARGS;
192 }
193
194 switch (bl->bl_interface_type) {
195 case BL_WLED:
196 ret = msm8974_wled_backlight_ctrl(enable);
197 break;
198 case BL_PWM:
Dhaval Patel499b7d22014-01-07 21:57:30 -0800199 ret = msm8974_pwm_backlight_ctrl(pwm_gpio.pin_id,
200 PWM_BL_LPG_CHAN_ID,
Kuogee Hsiehdf961742013-12-18 14:13:45 -0800201 enable);
202 break;
203 default:
204 dprintf(CRITICAL, "backlight type:%d not supported\n",
205 bl->bl_interface_type);
206 return ERR_NOT_SUPPORTED;
207 }
208
209 return ret;
210}
211
Casey Piper98e94f12013-09-09 20:42:15 -0700212int target_panel_clock(uint8_t enable, struct msm_panel_info *pinfo)
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800213{
Casey Piper98e94f12013-09-09 20:42:15 -0700214 struct mdss_dsi_pll_config *pll_data;
215 uint32_t dual_dsi = pinfo->mipi.dual_dsi;
216 dprintf(SPEW, "target_panel_clock\n");
217
218 pll_data = pinfo->mipi.dsi_pll_config;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800219 if (enable) {
220 mdp_gdsc_ctrl(enable);
221 mdp_clock_init();
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +0530222 mdss_dsi_auto_pll_config(DSI0_PLL_BASE,
223 MIPI_DSI0_BASE, pll_data);
224 dsi_pll_enable_seq(DSI0_PLL_BASE);
Siddhartha Agrawal1b2ed842013-05-29 18:02:28 -0700225 if (panel.panel_info.mipi.dual_dsi &&
Casey Piper98e94f12013-09-09 20:42:15 -0700226 !(panel.panel_info.mipi.broadcast)) {
Padmanabhan Komanduru703bd6d2014-03-25 19:57:01 +0530227 mdss_dsi_auto_pll_config(DSI1_PLL_BASE,
228 MIPI_DSI1_BASE, pll_data);
229 dsi_pll_enable_seq(DSI1_PLL_BASE);
Casey Piper98e94f12013-09-09 20:42:15 -0700230 }
231 mmss_clock_auto_pll_init(DSI0_PHY_PLL_OUT, dual_dsi,
232 pll_data->pclk_m,
233 pll_data->pclk_n,
234 pll_data->pclk_d);
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800235 } else if(!target_cont_splash_screen()) {
236 // * Add here for continuous splash *
Siddhartha Agrawalc88737b2013-05-29 20:41:35 -0700237 mmss_clock_disable(dual_dsi);
238 mdp_clock_disable(dual_dsi);
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800239 }
240
Casey Piper98e94f12013-09-09 20:42:15 -0700241 return NO_ERROR;
Asaf Penso325f43a2013-05-21 21:55:48 +0300242}
243
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800244/* Pull DISP_RST_N high to get panel out of reset */
Casey Piper98e94f12013-09-09 20:42:15 -0700245int target_panel_reset(uint8_t enable, struct panel_reset_sequence *resetseq,
246 struct msm_panel_info *pinfo)
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800247{
Casey Piper98e94f12013-09-09 20:42:15 -0700248 uint32_t rst_gpio = reset_gpio.pin_id;
Chandan Uddarajud1bcbeb2013-07-01 18:13:48 -0700249 uint32_t platform_id = board_platform_id();
250 uint32_t hardware_id = board_hardware_id();
251
Casey Piper98e94f12013-09-09 20:42:15 -0700252 struct pm8x41_gpio resetgpio_param = {
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800253 .direction = PM_GPIO_DIR_OUT,
254 .output_buffer = PM_GPIO_OUT_CMOS,
255 .out_strength = PM_GPIO_OUT_DRIVE_MED,
256 };
257
Chandan Uddarajud1bcbeb2013-07-01 18:13:48 -0700258 if (platform_id == MSM8974AC)
Chandan Uddarajub2cee902013-09-05 18:31:23 -0700259 if ((hardware_id == HW_PLATFORM_MTP)
Chandan Uddarajud1bcbeb2013-07-01 18:13:48 -0700260 || (hardware_id == HW_PLATFORM_LIQUID))
261 rst_gpio = 20;
262
263 dprintf(SPEW, "platform_id: %u, rst_gpio: %u\n",
264 platform_id, rst_gpio);
265
Casey Piper98e94f12013-09-09 20:42:15 -0700266 pm8x41_gpio_config(rst_gpio, &resetgpio_param);
Siddhartha Agrawalc43c4872013-04-21 16:23:16 -0700267 if (enable) {
Casey Piper98e94f12013-09-09 20:42:15 -0700268 gpio_tlmm_config(enable_gpio.pin_id, 0,
269 enable_gpio.pin_direction, enable_gpio.pin_pull,
270 enable_gpio.pin_strength, enable_gpio.pin_state);
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800271
Casey Piper98e94f12013-09-09 20:42:15 -0700272 gpio_set(enable_gpio.pin_id, resetseq->pin_direction);
273 pm8x41_gpio_set(rst_gpio, resetseq->pin_state[0]);
274 mdelay(resetseq->sleep[0]);
275 pm8x41_gpio_set(rst_gpio, resetseq->pin_state[1]);
276 mdelay(resetseq->sleep[1]);
277 pm8x41_gpio_set(rst_gpio, resetseq->pin_state[2]);
278 mdelay(resetseq->sleep[2]);
Siddhartha Agrawalc43c4872013-04-21 16:23:16 -0700279 } else {
Casey Piper98e94f12013-09-09 20:42:15 -0700280 resetgpio_param.out_strength = PM_GPIO_OUT_DRIVE_LOW;
281 pm8x41_gpio_config(rst_gpio, &resetgpio_param);
Chandan Uddarajud1bcbeb2013-07-01 18:13:48 -0700282 pm8x41_gpio_set(rst_gpio, PM_GPIO_FUNC_LOW);
Casey Piper98e94f12013-09-09 20:42:15 -0700283 gpio_set(enable_gpio.pin_id, resetseq->pin_direction);
Siddhartha Agrawalc43c4872013-04-21 16:23:16 -0700284 }
Casey Piper98e94f12013-09-09 20:42:15 -0700285 return NO_ERROR;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800286}
287
Casey Piper98e94f12013-09-09 20:42:15 -0700288int target_ldo_ctrl(uint8_t enable)
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800289{
Casey Piper98e94f12013-09-09 20:42:15 -0700290 uint32_t ldocounter = 0;
291 uint32_t pm8x41_ldo_base = 0x13F00;
Deepa Dinamaniec4835b2013-06-03 16:14:24 -0700292
Casey Piper98e94f12013-09-09 20:42:15 -0700293 while (ldocounter < TOTAL_LDO_DEFINED) {
294 struct pm8x41_ldo ldo_entry = LDO((pm8x41_ldo_base +
295 0x100 * ldo_entry_array[ldocounter].ldo_id),
296 ldo_entry_array[ldocounter].ldo_type);
Deepa Dinamaniec4835b2013-06-03 16:14:24 -0700297
Casey Piper98e94f12013-09-09 20:42:15 -0700298 dprintf(SPEW, "Setting %s\n",
299 ldo_entry_array[ldocounter].ldo_id);
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800300
Casey Piper98e94f12013-09-09 20:42:15 -0700301 /* Set voltage during power on */
302 if (enable) {
303 pm8x41_ldo_set_voltage(&ldo_entry,
304 ldo_entry_array[ldocounter].ldo_voltage);
305 pm8x41_ldo_control(&ldo_entry, enable);
306 } else if(ldo_entry_array[ldocounter].ldo_id != HFPLL_LDO_ID) {
307 pm8x41_ldo_control(&ldo_entry, enable);
308 }
309 ldocounter++;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800310 }
311
Casey Piper98e94f12013-09-09 20:42:15 -0700312 return NO_ERROR;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800313}
314
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300315static int msm8974_mdss_edp_panel_clock(int enable)
316{
317 if (enable) {
318 mdp_gdsc_ctrl(enable);
319 mdp_clock_init();
320 edp_clk_enable();
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300321 } else if (!target_cont_splash_screen()) {
322 /* Add here for continuous splash */
Kuogee Hsiehdf636eb2013-08-01 14:52:08 -0700323 edp_clk_disable();
324 mdp_clock_disable();
325 mdp_gdsc_ctrl(enable);
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300326 }
327
328 return 0;
329}
330
331static int msm8974_edp_panel_power(int enable)
332{
333 struct pm8x41_gpio gpio36_param = {
334 .direction = PM_GPIO_DIR_OUT,
Kuogee Hsieh80f3db02013-10-04 15:51:37 -0700335 .function = PM_GPIO_FUNC_2,
336 .vin_sel = 2, /* VIN_2 */
337 .pull = PM_GPIO_PULL_UP_1_5 | PM_GPIO_PULLDOWN_10,
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300338 .output_buffer = PM_GPIO_OUT_CMOS,
Kuogee Hsieh80f3db02013-10-04 15:51:37 -0700339 .out_strength = PM_GPIO_OUT_DRIVE_HIGH,
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300340 };
341
342 struct pm8x41_ldo ldo12 = LDO(PM8x41_LDO12, PLDO_TYPE);
343
344 if (enable) {
345 /* Enable backlight */
346 dprintf(SPEW, "Enable Backlight\n");
Kuogee Hsiehdf961742013-12-18 14:13:45 -0800347 msm8974_pwm_backlight_ctrl(36, 8, 1);
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300348 dprintf(SPEW, "Enable Backlight Done\n");
349
350 /* Turn on LDO12 for edp vdda */
351 dprintf(SPEW, "Setting LDO12 n");
352 pm8x41_ldo_set_voltage(&ldo12, 1800000);
353 pm8x41_ldo_control(&ldo12, enable);
354 dprintf(SPEW, "Setting LDO12 Done\n");
355
356 /* Panel Enable */
357 dprintf(SPEW, "Panel Enable\n");
358 gpio_tlmm_config(58, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA,
359 GPIO_DISABLE);
360 gpio_set(58, 2);
361 dprintf(SPEW, "Panel Enable Done\n");
362 } else {
363 /* Keep LDO12 on, otherwise kernel will not boot */
Kuogee Hsiehdf636eb2013-08-01 14:52:08 -0700364 gpio_set(58, 0);
Kuogee Hsiehdf961742013-12-18 14:13:45 -0800365 msm8974_pwm_backlight_ctrl(36, 8, 0);
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300366 }
367
368 return 0;
369}
370
Ajay Singh Parmareef1d602014-03-15 17:41:52 -0700371bool target_display_panel_node(char *panel_name, char *pbuf, uint16_t buf_size)
372{
373 int prefix_string_len = strlen(DISPLAY_CMDLINE_PREFIX);
374 bool ret = true;
375
376 panel_name += strspn(panel_name, " ");
377
378 if (!strcmp(panel_name, HDMI_PANEL_NAME)) {
379 if (buf_size < (prefix_string_len + LK_OVERRIDE_PANEL_LEN +
380 HDMI_CONTROLLER_STRING)) {
381 dprintf(CRITICAL, "command line argument is greater than buffer size\n");
382 return false;
383 }
384
385 strlcpy(pbuf, DISPLAY_CMDLINE_PREFIX, buf_size);
386 buf_size -= prefix_string_len;
387 strlcat(pbuf, LK_OVERRIDE_PANEL, buf_size);
388 buf_size -= LK_OVERRIDE_PANEL_LEN;
389 strlcat(pbuf, HDMI_CONTROLLER_STRING, buf_size);
390 } else {
391 ret = gcdb_display_cmdline_arg(pbuf, buf_size);
392 }
393
394 return ret;
395}
396
Aravind Venkateswaran6385f7e2014-02-25 16:45:11 -0800397void target_display_init(const char *panel_name)
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800398{
399 uint32_t hw_id = board_hardware_id();
Casey Piper74f8e5c2013-09-05 15:00:30 -0700400 uint32_t panel_loop = 0;
401 uint32_t ret = 0;
Ajay Singh Parmareef1d602014-03-15 17:41:52 -0700402
403 panel_name += strspn(panel_name, " ");
404
405 if (!strcmp(panel_name, HDMI_PANEL_NAME)) {
406 dprintf(INFO, "%s: HDMI is primary\n", __func__);
407 return;
408 }
409
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800410 switch (hw_id) {
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300411 case HW_PLATFORM_LIQUID:
Kuogee Hsiehdf636eb2013-08-01 14:52:08 -0700412 edp_panel_init(&(panel.panel_info));
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300413 panel.clk_func = msm8974_mdss_edp_panel_clock;
414 panel.power_func = msm8974_edp_panel_power;
415 panel.fb.base = (void *)EDP_FB_ADDR;
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300416 panel.fb.format = FB_FORMAT_RGB888;
417 panel.mdp_rev = MDP_REV_50;
Casey Piper98e94f12013-09-09 20:42:15 -0700418
419 if (msm_display_init(&panel)) {
420 dprintf(CRITICAL, "edp init failed!\n");
421 return;
422 }
423
424 edp_enable = 1;
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300425 break;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800426 default:
Casey Piper74f8e5c2013-09-05 15:00:30 -0700427 do {
Aravind Venkateswarand494f962014-02-25 17:16:49 -0800428 ret = gcdb_display_init(panel_name, MDP_REV_50,
429 MIPI_FB_ADDR);
Casey Pipercc7e52e2013-10-01 15:51:04 -0700430 if (!ret || ret == ERR_NOT_SUPPORTED) {
431 break;
432 } else {
Casey Piper74f8e5c2013-09-05 15:00:30 -0700433 target_force_cont_splash_disable(true);
434 msm_display_off();
435 target_force_cont_splash_disable(false);
436 }
Casey Piper74f8e5c2013-09-05 15:00:30 -0700437 } while (++panel_loop <= oem_panel_max_auto_detect_panels());
Casey Piper98e94f12013-09-09 20:42:15 -0700438 break;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800439 }
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800440}
441
Aravind Venkateswarandd50c1a2014-02-25 14:42:43 -0800442void target_display_shutdown(void)
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800443{
Casey Piper98e94f12013-09-09 20:42:15 -0700444 uint32_t hw_id = board_hardware_id();
445 switch (hw_id) {
446 case HW_PLATFORM_LIQUID:
447 if (edp_enable)
448 msm_display_off();
449 break;
450 default:
451 gcdb_display_shutdown();
452 break;
453 }
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800454}