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Dima Zavin0f88be22009-01-20 19:25:50 -08001/*
2 * Copyright (c) 2008, Google Inc.
3 * All rights reserved.
4 *
Subbaraman Narayanamurthy8f0b0452011-03-11 18:30:10 -08005 * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
Chandan Uddaraju5fa471a2009-12-02 17:31:34 -08006 *
Dima Zavin0f88be22009-01-20 19:25:50 -08007 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Google, Inc. nor the names of its contributors
17 * may be used to endorse or promote products derived from this
18 * software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
24 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
27 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
28 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 */
33
34#ifndef __DEV_GPIO_KEYPAD_H
35#define __DEV_GPIO_KEYPAD_H
36
37#include <sys/types.h>
38
39/* unset: drive active output low, set: drive active output high */
40#define GPIOKPF_ACTIVE_HIGH (1U << 0)
41#define GPIOKPF_DRIVE_INACTIVE (1U << 1)
42
43struct gpio_keypad_info {
44 /* size must be ninputs * noutputs */
45 const uint16_t *keymap;
46 unsigned *input_gpios;
47 unsigned *output_gpios;
48 int ninputs;
49 int noutputs;
50 /* time to wait before reading inputs after driving each output */
51 time_t settle_time;
52 time_t poll_time;
53 unsigned flags;
54};
55
56void gpio_keypad_init(struct gpio_keypad_info *kpinfo);
57
Chandan Uddaraju5fa471a2009-12-02 17:31:34 -080058//Macros for SSBI Qwerty keypad for 7x30
59
60/* SSBI 2.0 controller registers */
61#define MSM_SSBI_BASE 0xAD900000
Chandan Uddaraju5fa471a2009-12-02 17:31:34 -080062
63#define SSBI_TIMEOUT_US 100
64
65#define SSBI2_CTL 0x0000
66#define SSBI2_RESET 0x0004
67#define SSBI2_CMD 0x0008
68#define SSBI2_RD 0x0010
69#define SSBI2_STATUS 0x0014
70#define SSBI2_PRIORITIES 0x0018
71#define SSBI2_MODE2 0x001C
72
73/* SSBI_CMD fields */
74#define SSBI_CMD_SEND_TERM_SYM (0x01 << 27)
75#define SSBI_CMD_WAKEUP_SLAVE (0x01 << 26)
76#define SSBI_CMD_USE_ENABLE (0x01 << 25)
77#define SSBI_CMD_RDWRN (0x01 << 24)
78#define SSBI_CMD_REG_ADDR_SHFT (0x10)
79#define SSBI_CMD_REG_ADDR_MASK (0xFF << SSBI_CMD_REG_ADDR_SHFT)
80#define SSBI_CMD_REG_DATA_SHFT (0x00)
81#define SSBI_CMD_REG_DATA_MASK (0xFF << SSBI_CMD_REG_DATA_SHFT)
82
83/* SSBI_STATUS fields */
84#define SSBI_STATUS_DATA_IN 0x10
85#define SSBI_STATUS_RD_CLOBBERED 0x08
86#define SSBI_STATUS_RD_READY 0x04
87#define SSBI_STATUS_READY 0x02
88#define SSBI_STATUS_MCHN_BUSY 0x01
89
90/* SSBI_RD fields */
91#define SSBI_RD_USE_ENABLE 0x02000000
92#define SSBI_RD_RDWRN 0x01000000
93#define SSBI_RD_REG_ADDR_SHFT 0x10
94#define SSBI_RD_REG_ADDR_MASK (0xFF << SSBI_RD_REG_ADDR_SHFT)
95#define SSBI_RD_REG_DATA_SHFT (0x00)
96#define SSBI_RD_REG_DATA_MASK (0xFF << SSBI_RD_REG_DATA_SHFT)
97
98/* SSBI_MODE2 fields */
99#define SSBI_MODE2_REG_ADDR_15_8_SHFT 0x04
100#define SSBI_MODE2_REG_ADDR_15_8_MASK (0x7F << SSBI_MODE2_REG_ADDR_15_8_SHFT)
101#define SSBI_MODE2_ADDR_WIDTH_SHFT 0x01
102#define SSBI_MODE2_ADDR_WIDTH_MASK (0x07 << SSBI_MODE2_ADDR_WIDTH_SHFT)
103#define SSBI_MODE2_SSBI2_MODE 0x00000001
104
105//Keypad controller configurations
106#define SSBI_REG_KYPD_CNTL_ADDR 0x148
107#define SSBI_REG_KYPD_SCAN_ADDR 0x149
108#define SSBI_REG_KYPD_TEST_ADDR 0x14A
109#define SSBI_REG_KYPD_REC_DATA_ADDR 0x14B
110#define SSBI_REG_KYPD_OLD_DATA_ADDR 0x14C
111
112// GPIO configurations
113
114#define SSBI_REG_ADDR_GPIO_BASE 0x150
Subbaraman Narayanamurthy8f0b0452011-03-11 18:30:10 -0800115
116#define QT_PMIC_GPIO_KYPD_SNS 0x008
117#define QT_PMIC_GPIO_KYPD_DRV 0x003
118
Chandan Uddaraju5fa471a2009-12-02 17:31:34 -0800119#define SSBI_OFFSET_ADDR_GPIO_KYPD_SNS 0x000
120#define SSBI_OFFSET_ADDR_GPIO_KYPD_DRV 0x008
Subbaraman Narayanamurthy8f0b0452011-03-11 18:30:10 -0800121
Chandan Uddaraju5fa471a2009-12-02 17:31:34 -0800122#define SSBI_REG_ADDR_GPIO(n) (SSBI_REG_ADDR_GPIO_BASE + n)
123
124#define PM_GPIO_DIR_OUT 0x01
125#define PM_GPIO_DIR_IN 0x02
126#define PM_GPIO_DIR_BOTH (PM_GPIO_DIR_OUT | PM_GPIO_DIR_IN)
127
128#define PM_GPIO_PULL_UP1 2
129#define PM_GPIO_PULL_UP2 3
130#define PM_GPIO_PULL_DN 4
131#define PM_GPIO_PULL_NO 5
132
133#define PM_GPIO_STRENGTH_NO 0
134#define PM_GPIO_STRENGTH_HIGH 1
135#define PM_GPIO_STRENGTH_MED 2
136#define PM_GPIO_STRENGTH_LOW 3
137
138#define PM_GPIO_FUNC_NORMAL 0
139#define PM_GPIO_FUNC_PAIRED 1
140#define PM_GPIO_FUNC_1 2
141#define PM_GPIO_FUNC_2 3
142
143#define PM8058_GPIO_BANK_MASK 0x70
144#define PM8058_GPIO_BANK_SHIFT 4
145#define PM8058_GPIO_WRITE 0x80
146
147/* Bank 0 */
148#define PM8058_GPIO_VIN_MASK 0x0E
149#define PM8058_GPIO_VIN_SHIFT 1
150#define PM8058_GPIO_MODE_ENABLE 0x01
151
152/* Bank 1 */
153#define PM8058_GPIO_MODE_MASK 0x0C
154#define PM8058_GPIO_MODE_SHIFT 2
155#define PM8058_GPIO_OUT_BUFFER 0x02
156#define PM8058_GPIO_OUT_INVERT 0x01
157
158#define PM8058_GPIO_MODE_OFF 3
159#define PM8058_GPIO_MODE_OUTPUT 2
160#define PM8058_GPIO_MODE_INPUT 0
161#define PM8058_GPIO_MODE_BOTH 1
162
163/* Bank 2 */
164#define PM8058_GPIO_PULL_MASK 0x0E
165#define PM8058_GPIO_PULL_SHIFT 1
166
167/* Bank 3 */
168#define PM8058_GPIO_OUT_STRENGTH_MASK 0x0C
169#define PM8058_GPIO_OUT_STRENGTH_SHIFT 2
170
171/* Bank 4 */
172#define PM8058_GPIO_FUNC_MASK 0x0E
173#define PM8058_GPIO_FUNC_SHIFT 1
174
Chandan Uddarajubedca152010-06-02 23:05:15 -0700175
176/* PMIC Arbiter 1: SSBI2 Configuration Micro ARM registers */
177#define PA1_SSBI2_CMD 0x00500000
178#define PA1_SSBI2_RD_STATUS 0x00500004
179
180#define PA1_SSBI2_REG_ADDR_SHIFT 8
181#define PA1_SSBI2_CMD_RDWRN_SHIFT 24
182#define PA1_SSBI2_TRANS_DONE_SHIFT 27
183
184#define PA1_SSBI2_REG_DATA_MASK 0xFF
185#define PA1_SSBI2_REG_DATA_SHIFT 0
186
187#define PA1_SSBI2_CMD_READ 1
188#define PA1_SSBI2_CMD_WRITE 0
189
Shashank Mittal402d0972010-09-29 10:09:52 -0700190/* PMIC Arbiter 2: SSBI2 Configuration Micro ARM registers */
191#define PA2_SSBI2_CMD 0x00C00000
192#define PA2_SSBI2_RD_STATUS 0x00C00004
193
194#define PA2_SSBI2_REG_ADDR_SHIFT 8
195#define PA2_SSBI2_CMD_RDWRN_SHIFT 24
196#define PA2_SSBI2_TRANS_DONE_SHIFT 27
197
198#define PA2_SSBI2_REG_DATA_MASK 0xFF
199#define PA2_SSBI2_REG_DATA_SHIFT 0
200
201#define PA2_SSBI2_CMD_READ 1
202#define PA2_SSBI2_CMD_WRITE 0
Chandan Uddaraju5fa471a2009-12-02 17:31:34 -0800203
204struct pm8058_gpio {
205 int direction;
206 int pull;
207 int vin_sel; /* 0..7 */
208 int out_strength;
209 int function;
210 int inv_int_pol; /* invert interrupt polarity */
211};
212
Chandan Uddarajubedca152010-06-02 23:05:15 -0700213typedef int (*read_func)(unsigned char *, unsigned short, unsigned short);
214typedef int (*write_func)(unsigned char *, unsigned short, unsigned short);
215
Chandan Uddaraju5fa471a2009-12-02 17:31:34 -0800216struct qwerty_keypad_info {
217 /* size must be ninputs * noutputs */
218 unsigned int *keymap;
219 unsigned char *old_keys;
220 unsigned char *rec_keys;
221 unsigned int rows;
222 unsigned int columns;
Chandan Uddarajubedca152010-06-02 23:05:15 -0700223 unsigned int num_of_reads;
224 read_func rd_func;
225 write_func wr_func;
Chandan Uddaraju5fa471a2009-12-02 17:31:34 -0800226 /* time to wait before reading inputs after driving each output */
227 time_t settle_time;
228 time_t poll_time;
229 unsigned flags;
230};
231
232#define SSBI_CMD_READ(AD) \
233 (SSBI_CMD_RDWRN | (((AD) & 0xFF) << SSBI_CMD_REG_ADDR_SHFT))
234
235#define SSBI_CMD_WRITE(AD, DT) \
236 ((((AD) & 0xFF) << SSBI_CMD_REG_ADDR_SHFT) | \
237 (((DT) & 0xFF) << SSBI_CMD_REG_DATA_SHFT))
238
239#define SSBI_MODE2_REG_ADDR_15_8(MD, AD) \
240 (((MD) & 0x0F) | ((((AD) >> 8) << SSBI_MODE2_REG_ADDR_15_8_SHFT) & \
241 SSBI_MODE2_REG_ADDR_15_8_MASK))
242
243void ssbi_keypad_init (struct qwerty_keypad_info *);
Chandan Uddarajubedca152010-06-02 23:05:15 -0700244int i2c_ssbi_read_bytes(unsigned char *buffer, unsigned short length,
245 unsigned short slave_addr);
246int i2c_ssbi_write_bytes(unsigned char *buffer, unsigned short length,
247 unsigned short slave_addr);
248int pa1_ssbi2_read_bytes(unsigned char *buffer, unsigned short length,
249 unsigned short slave_addr);
250int pa1_ssbi2_write_bytes(unsigned char *buffer, unsigned short length,
251 unsigned short slave_addr);
Chandan Uddaraju5fa471a2009-12-02 17:31:34 -0800252
Dima Zavin0f88be22009-01-20 19:25:50 -0800253#endif /* __DEV_GPIO_KEYPAD_H */