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Padmanabhan Komanduru9cc0f772014-12-26 15:06:52 +05301/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
Dhaval Patel40e1f772013-10-21 10:23:31 -07002 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 */
29#ifndef _TARGET_DISPLAY_H
30#define _TARGET_DISPLAY_H
31
32/*---------------------------------------------------------------------------*/
33/* HEADER files */
34/*---------------------------------------------------------------------------*/
35#include <display_resource.h>
36
37/*---------------------------------------------------------------------------*/
38/* GPIO configuration */
39/*---------------------------------------------------------------------------*/
40static struct gpio_pin reset_gpio = {
41 "msmgpio", 96, 3, 1, 0, 1
42};
43
44static struct gpio_pin enable_gpio = {
45 "msmgpio", 137, 3, 1, 0, 1
46};
47
48static struct gpio_pin bkl_gpio = {
49 "msmgpio", 86, 3, 1, 0, 1
50};
51
52static struct gpio_pin pwm_gpio = {
53 "pm8084", 7, 3, 1, 0, 1
54};
55/*---------------------------------------------------------------------------*/
56/* LDO configuration */
57/*---------------------------------------------------------------------------*/
58static struct ldo_entry ldo_entry_array[] = {
59 { "vdd", 22, 0, 3000000, 100000, 100, 0, 20, 0, 0},
60 { "vddio", 12, 0, 1800000, 100000, 100, 0, 20, 0, 0},
61 { "vdda", 2, 1, 1200000, 100000, 100, 0, 0, 0, 0},
62};
63
64#define TOTAL_LDO_DEFINED 3
65
66/*---------------------------------------------------------------------------*/
67/* Target Physical configuration */
68/*---------------------------------------------------------------------------*/
69
70static const uint32_t panel_strength_ctrl[] = {
71 0xff, 0x06
72};
73
74static const char panel_bist_ctrl[] = {
75 0x00, 0x00, 0xb1, 0xff, 0x00, 0x00
76};
77
78static const uint32_t panel_regulator_settings[] = {
79 0x07, 0x09, 0x03, 0x00, 0x20, 0x00, 0x01
80};
81
82static const char panel_lane_config[] = {
83 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x97,
Padmanabhan Komanduru9cc0f772014-12-26 15:06:52 +053084 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x97,
85 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x97,
86 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x97,
Dhaval Patel40e1f772013-10-21 10:23:31 -070087 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xbb
88};
89
90static const uint32_t panel_physical_ctrl[] = {
91 0x5f, 0x00, 0x00, 0x10
92};
93
94/*---------------------------------------------------------------------------*/
95/* Other Configuration */
96/*---------------------------------------------------------------------------*/
97#define MIPI_FB_ADDR 0x03200000
98
99#define MIPI_HSYNC_PULSE_WIDTH 12
100#define MIPI_HSYNC_BACK_PORCH_DCLK 32
101#define MIPI_HSYNC_FRONT_PORCH_DCLK 144
102
103#define MIPI_VSYNC_PULSE_WIDTH 4
104#define MIPI_VSYNC_BACK_PORCH_LINES 3
105#define MIPI_VSYNC_FRONT_PORCH_LINES 9
106
Dhaval Patel18bf4c62014-01-07 21:57:30 -0800107#define PWM_BL_LPG_CHAN_ID 3
108
Dhaval Patel40e1f772013-10-21 10:23:31 -0700109#endif