blob: 22568e84d918e7b64fd44b5660e27cfa9d522950 [file] [log] [blame]
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -08001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions
5 * are met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above copyright
9 * notice, this list of conditions and the following disclaimer in
10 * the documentation and/or other materials provided with the
11 * distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
19 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
20 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
23 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
26 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30#include <debug.h>
31#include <smem.h>
Casey Piper7d7b0522013-09-09 20:42:15 -070032#include <err.h>
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -080033#include <msm_panel.h>
Casey Piper7d7b0522013-09-09 20:42:15 -070034#include <mipi_dsi.h>
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -080035#include <pm8x41.h>
36#include <pm8x41_wled.h>
37#include <board.h>
38#include <mdp5.h>
Casey Piper8ac505c2013-09-05 15:00:30 -070039#include <endian.h>
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -080040#include <platform/gpio.h>
Asaf Pensoc9080dc2013-05-21 21:53:50 +030041#include <platform/clock.h>
Siddhartha Agrawal1b2ed842013-05-29 18:02:28 -070042#include <platform/iomap.h>
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -080043#include <target/display.h>
Casey Piper7d7b0522013-09-09 20:42:15 -070044#include "include/panel.h"
45#include "include/display_resource.h"
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -080046
47static struct msm_fb_panel_data panel;
Casey Piper7d7b0522013-09-09 20:42:15 -070048static uint8_t edp_enable;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -080049
Casey Piper7d7b0522013-09-09 20:42:15 -070050#define HFPLL_LDO_ID 12
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -080051
Asaf Penso0ecd86f2013-05-29 14:49:19 +030052static struct pm8x41_wled_data wled_ctrl = {
Amy Maloche543b5842013-07-31 18:07:38 -070053 .mod_scheme = 0x00,
Asaf Penso0ecd86f2013-05-29 14:49:19 +030054 .led1_brightness = (0x0F << 8) | 0xEF,
55 .led2_brightness = (0x0F << 8) | 0xEF,
56 .led3_brightness = (0x0F << 8) | 0xEF,
57 .max_duty_cycle = 0x01,
58 .ovp = 0x2,
59 .full_current_scale = 0x19
60};
61
Casey Piper7d7b0522013-09-09 20:42:15 -070062static uint32_t dsi_pll_enable_seq(uint32_t ctl_base)
63{
64 uint32_t rc = 0;
65
66 mdss_dsi_uniphy_pll_sw_reset(ctl_base);
67
68 writel(0x01, ctl_base + 0x0220); /* GLB CFG */
69 mdelay(1);
70 writel(0x05, ctl_base + 0x0220); /* GLB CFG */
71 mdelay(1);
72 writel(0x07, ctl_base + 0x0220); /* GLB CFG */
73 mdelay(1);
74 writel(0x0f, ctl_base + 0x0220); /* GLB CFG */
75 mdelay(1);
76
77 mdss_dsi_uniphy_pll_lock_detect_setting(ctl_base);
78
79 while (!(readl(ctl_base + 0x02c0) & 0x01)) {
80 mdss_dsi_uniphy_pll_sw_reset(ctl_base);
81 writel(0x01, ctl_base + 0x0220); /* GLB CFG */
82 mdelay(1);
83 writel(0x05, ctl_base + 0x0220); /* GLB CFG */
84 mdelay(1);
85 writel(0x07, ctl_base + 0x0220); /* GLB CFG */
86 mdelay(1);
87 writel(0x05, ctl_base + 0x0220); /* GLB CFG */
88 mdelay(1);
89 writel(0x07, ctl_base + 0x0220); /* GLB CFG */
90 mdelay(1);
91 writel(0x0f, ctl_base + 0x0220); /* GLB CFG */
92 mdelay(2);
93 mdss_dsi_uniphy_pll_lock_detect_setting(ctl_base);
94 }
95 return rc;
96}
97
98int target_backlight_ctrl(uint8_t enable)
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -080099{
Chandan Uddarajud1bcbeb2013-07-01 18:13:48 -0700100 uint32_t platform_id = board_platform_id();
101 uint32_t hardware_id = board_hardware_id();
Casey Piper7d7b0522013-09-09 20:42:15 -0700102 uint8_t slave_id = 1;
Chandan Uddarajud1bcbeb2013-07-01 18:13:48 -0700103
Casey Piper7d7b0522013-09-09 20:42:15 -0700104 if (enable) {
105 if (platform_id == MSM8974AC)
106 if ((hardware_id == HW_PLATFORM_MTP)
107 || (hardware_id == HW_PLATFORM_LIQUID))
108 slave_id = 3;
Chandan Uddarajud1bcbeb2013-07-01 18:13:48 -0700109
Casey Piper7d7b0522013-09-09 20:42:15 -0700110 pm8x41_wled_config_slave_id(slave_id);
111 pm8x41_wled_config(&wled_ctrl);
112 pm8x41_wled_sink_control(enable);
113 pm8x41_wled_iled_sync_control(enable);
114 }
115 pm8x41_wled_enable(enable);
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800116
Casey Piper7d7b0522013-09-09 20:42:15 -0700117 return NO_ERROR;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800118}
119
Casey Piper7d7b0522013-09-09 20:42:15 -0700120int target_panel_clock(uint8_t enable, struct msm_panel_info *pinfo)
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800121{
Casey Piper7d7b0522013-09-09 20:42:15 -0700122 struct mdss_dsi_pll_config *pll_data;
123 uint32_t dual_dsi = pinfo->mipi.dual_dsi;
124 dprintf(SPEW, "target_panel_clock\n");
125
126 pll_data = pinfo->mipi.dsi_pll_config;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800127 if (enable) {
128 mdp_gdsc_ctrl(enable);
129 mdp_clock_init();
Siddhartha Agrawalf7ae5da2013-09-26 13:30:33 -0700130 mdss_dsi_auto_pll_config(MIPI_DSI0_BASE, pll_data);
Casey Piper7d7b0522013-09-09 20:42:15 -0700131 dsi_pll_enable_seq(MIPI_DSI0_BASE);
Siddhartha Agrawal1b2ed842013-05-29 18:02:28 -0700132 if (panel.panel_info.mipi.dual_dsi &&
Casey Piper7d7b0522013-09-09 20:42:15 -0700133 !(panel.panel_info.mipi.broadcast)) {
Siddhartha Agrawalf7ae5da2013-09-26 13:30:33 -0700134 mdss_dsi_auto_pll_config(MIPI_DSI1_BASE, pll_data);
Casey Piper7d7b0522013-09-09 20:42:15 -0700135 dsi_pll_enable_seq(MIPI_DSI1_BASE);
136 }
137 mmss_clock_auto_pll_init(DSI0_PHY_PLL_OUT, dual_dsi,
138 pll_data->pclk_m,
139 pll_data->pclk_n,
140 pll_data->pclk_d);
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800141 } else if(!target_cont_splash_screen()) {
142 // * Add here for continuous splash *
Siddhartha Agrawalc88737b2013-05-29 20:41:35 -0700143 mmss_clock_disable(dual_dsi);
144 mdp_clock_disable(dual_dsi);
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800145 }
146
Casey Piper7d7b0522013-09-09 20:42:15 -0700147 return NO_ERROR;
Asaf Penso325f43a2013-05-21 21:55:48 +0300148}
149
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800150/* Pull DISP_RST_N high to get panel out of reset */
Casey Piper7d7b0522013-09-09 20:42:15 -0700151int target_panel_reset(uint8_t enable, struct panel_reset_sequence *resetseq,
152 struct msm_panel_info *pinfo)
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800153{
Casey Piper7d7b0522013-09-09 20:42:15 -0700154 uint32_t rst_gpio = reset_gpio.pin_id;
Chandan Uddarajud1bcbeb2013-07-01 18:13:48 -0700155 uint32_t platform_id = board_platform_id();
156 uint32_t hardware_id = board_hardware_id();
157
Casey Piper7d7b0522013-09-09 20:42:15 -0700158 struct pm8x41_gpio resetgpio_param = {
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800159 .direction = PM_GPIO_DIR_OUT,
160 .output_buffer = PM_GPIO_OUT_CMOS,
161 .out_strength = PM_GPIO_OUT_DRIVE_MED,
162 };
163
Chandan Uddarajud1bcbeb2013-07-01 18:13:48 -0700164 if (platform_id == MSM8974AC)
Chandan Uddarajub2cee902013-09-05 18:31:23 -0700165 if ((hardware_id == HW_PLATFORM_MTP)
Chandan Uddarajud1bcbeb2013-07-01 18:13:48 -0700166 || (hardware_id == HW_PLATFORM_LIQUID))
167 rst_gpio = 20;
168
169 dprintf(SPEW, "platform_id: %u, rst_gpio: %u\n",
170 platform_id, rst_gpio);
171
Casey Piper7d7b0522013-09-09 20:42:15 -0700172 pm8x41_gpio_config(rst_gpio, &resetgpio_param);
Siddhartha Agrawalc43c4872013-04-21 16:23:16 -0700173 if (enable) {
Casey Piper7d7b0522013-09-09 20:42:15 -0700174 gpio_tlmm_config(enable_gpio.pin_id, 0,
175 enable_gpio.pin_direction, enable_gpio.pin_pull,
176 enable_gpio.pin_strength, enable_gpio.pin_state);
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800177
Casey Piper7d7b0522013-09-09 20:42:15 -0700178 gpio_set(enable_gpio.pin_id, resetseq->pin_direction);
179 pm8x41_gpio_set(rst_gpio, resetseq->pin_state[0]);
180 mdelay(resetseq->sleep[0]);
181 pm8x41_gpio_set(rst_gpio, resetseq->pin_state[1]);
182 mdelay(resetseq->sleep[1]);
183 pm8x41_gpio_set(rst_gpio, resetseq->pin_state[2]);
184 mdelay(resetseq->sleep[2]);
Siddhartha Agrawalc43c4872013-04-21 16:23:16 -0700185 } else {
Casey Piper7d7b0522013-09-09 20:42:15 -0700186 resetgpio_param.out_strength = PM_GPIO_OUT_DRIVE_LOW;
187 pm8x41_gpio_config(rst_gpio, &resetgpio_param);
Chandan Uddarajud1bcbeb2013-07-01 18:13:48 -0700188 pm8x41_gpio_set(rst_gpio, PM_GPIO_FUNC_LOW);
Casey Piper7d7b0522013-09-09 20:42:15 -0700189 gpio_set(enable_gpio.pin_id, resetseq->pin_direction);
Siddhartha Agrawalc43c4872013-04-21 16:23:16 -0700190 }
Casey Piper7d7b0522013-09-09 20:42:15 -0700191 return NO_ERROR;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800192}
193
Casey Piper7d7b0522013-09-09 20:42:15 -0700194int target_ldo_ctrl(uint8_t enable)
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800195{
Casey Piper7d7b0522013-09-09 20:42:15 -0700196 uint32_t ldocounter = 0;
197 uint32_t pm8x41_ldo_base = 0x13F00;
Deepa Dinamaniec4835b2013-06-03 16:14:24 -0700198
Casey Piper7d7b0522013-09-09 20:42:15 -0700199 while (ldocounter < TOTAL_LDO_DEFINED) {
200 struct pm8x41_ldo ldo_entry = LDO((pm8x41_ldo_base +
201 0x100 * ldo_entry_array[ldocounter].ldo_id),
202 ldo_entry_array[ldocounter].ldo_type);
Deepa Dinamaniec4835b2013-06-03 16:14:24 -0700203
Casey Piper7d7b0522013-09-09 20:42:15 -0700204 dprintf(SPEW, "Setting %s\n",
205 ldo_entry_array[ldocounter].ldo_id);
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800206
Casey Piper7d7b0522013-09-09 20:42:15 -0700207 /* Set voltage during power on */
208 if (enable) {
209 pm8x41_ldo_set_voltage(&ldo_entry,
210 ldo_entry_array[ldocounter].ldo_voltage);
211 pm8x41_ldo_control(&ldo_entry, enable);
212 } else if(ldo_entry_array[ldocounter].ldo_id != HFPLL_LDO_ID) {
213 pm8x41_ldo_control(&ldo_entry, enable);
214 }
215 ldocounter++;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800216 }
217
Casey Piper7d7b0522013-09-09 20:42:15 -0700218 return NO_ERROR;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800219}
220
Casey Piper8ac505c2013-09-05 15:00:30 -0700221static uint32_t response_value = 0;
222
223uint32_t target_read_panel_signature(uint32_t panel_signature)
224{
225 uint32_t rec_buf[1];
226 uint32_t *lp = rec_buf, data;
227 int ret = response_value;
228
229 if (ret && ret != panel_signature)
230 goto exit_read_signature;
231
232 ret = mipi_dsi_cmds_tx(&read_ddb_start_cmd, 1);
233 if (ret)
234 goto exit_read_signature;
235 if (!mdss_dsi_cmds_rx(&lp, 1, 1))
236 goto exit_read_signature;
237
238 data = ntohl(*lp);
239 data = data >> 8;
240 response_value = data;
241 if (response_value != panel_signature)
242 ret = response_value;
243
244exit_read_signature:
245 return ret;
246}
247
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300248static int msm8974_mdss_edp_panel_clock(int enable)
249{
250 if (enable) {
251 mdp_gdsc_ctrl(enable);
252 mdp_clock_init();
253 edp_clk_enable();
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300254 } else if (!target_cont_splash_screen()) {
255 /* Add here for continuous splash */
Kuogee Hsiehdf636eb2013-08-01 14:52:08 -0700256 edp_clk_disable();
257 mdp_clock_disable();
258 mdp_gdsc_ctrl(enable);
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300259 }
260
261 return 0;
262}
263
264static int msm8974_edp_panel_power(int enable)
265{
266 struct pm8x41_gpio gpio36_param = {
267 .direction = PM_GPIO_DIR_OUT,
268 .output_buffer = PM_GPIO_OUT_CMOS,
269 .out_strength = PM_GPIO_OUT_DRIVE_MED,
270 };
271
272 struct pm8x41_ldo ldo12 = LDO(PM8x41_LDO12, PLDO_TYPE);
273
274 if (enable) {
275 /* Enable backlight */
276 dprintf(SPEW, "Enable Backlight\n");
277 pm8x41_gpio_config(36, &gpio36_param);
278 pm8x41_gpio_set(36, PM_GPIO_FUNC_HIGH);
279 dprintf(SPEW, "Enable Backlight Done\n");
280
281 /* Turn on LDO12 for edp vdda */
282 dprintf(SPEW, "Setting LDO12 n");
283 pm8x41_ldo_set_voltage(&ldo12, 1800000);
284 pm8x41_ldo_control(&ldo12, enable);
285 dprintf(SPEW, "Setting LDO12 Done\n");
286
287 /* Panel Enable */
288 dprintf(SPEW, "Panel Enable\n");
289 gpio_tlmm_config(58, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA,
290 GPIO_DISABLE);
291 gpio_set(58, 2);
292 dprintf(SPEW, "Panel Enable Done\n");
293 } else {
294 /* Keep LDO12 on, otherwise kernel will not boot */
Kuogee Hsiehdf636eb2013-08-01 14:52:08 -0700295 gpio_set(58, 0);
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300296 pm8x41_gpio_set(36, PM_GPIO_FUNC_LOW);
297 }
298
299 return 0;
300}
301
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800302void display_init(void)
303{
304 uint32_t hw_id = board_hardware_id();
Casey Piper8ac505c2013-09-05 15:00:30 -0700305 uint32_t panel_loop = 0;
306 uint32_t ret = 0;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800307 switch (hw_id) {
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300308 case HW_PLATFORM_LIQUID:
Kuogee Hsiehdf636eb2013-08-01 14:52:08 -0700309 edp_panel_init(&(panel.panel_info));
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300310 panel.clk_func = msm8974_mdss_edp_panel_clock;
311 panel.power_func = msm8974_edp_panel_power;
312 panel.fb.base = (void *)EDP_FB_ADDR;
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300313 panel.fb.format = FB_FORMAT_RGB888;
314 panel.mdp_rev = MDP_REV_50;
Casey Piper7d7b0522013-09-09 20:42:15 -0700315
316 if (msm_display_init(&panel)) {
317 dprintf(CRITICAL, "edp init failed!\n");
318 return;
319 }
320
321 edp_enable = 1;
Asaf Pensoe6870ff2013-07-07 17:23:56 +0300322 break;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800323 default:
Casey Piper8ac505c2013-09-05 15:00:30 -0700324 do {
325 ret = gcdb_display_init(MDP_REV_50, MIPI_FB_ADDR);
Casey Piper9cdb75d2013-10-01 15:51:04 -0700326 if (!ret || ret == ERR_NOT_SUPPORTED) {
327 break;
328 } else {
Casey Piper8ac505c2013-09-05 15:00:30 -0700329 target_force_cont_splash_disable(true);
330 msm_display_off();
331 target_force_cont_splash_disable(false);
332 }
Casey Piper8ac505c2013-09-05 15:00:30 -0700333 } while (++panel_loop <= oem_panel_max_auto_detect_panels());
Casey Piper7d7b0522013-09-09 20:42:15 -0700334 break;
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800335 }
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800336}
337
338void display_shutdown(void)
339{
Casey Piper7d7b0522013-09-09 20:42:15 -0700340 uint32_t hw_id = board_hardware_id();
341 switch (hw_id) {
342 case HW_PLATFORM_LIQUID:
343 if (edp_enable)
344 msm_display_off();
345 break;
346 default:
347 gcdb_display_shutdown();
348 break;
349 }
Siddhartha Agrawal7ac6d512013-01-22 18:39:50 -0800350}