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Shashank Mittal402d0972010-09-29 10:09:52 -07001/*
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -07002 * * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
Shashank Mittal402d0972010-09-29 10:09:52 -07003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above
10 * copyright notice, this list of conditions and the following
11 * disclaimer in the documentation and/or other materials provided
12 * with the distribution.
13 * * Neither the name of Code Aurora Forum, Inc. nor the names of its
14 * contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <debug.h>
31#include <kernel/thread.h>
32#include <i2c_qup.h>
33#include <platform/iomap.h>
Amol Jadic52c8a32011-07-12 11:27:04 -070034#include <platform/gpio.h>
Shashank Mittal402d0972010-09-29 10:09:52 -070035#include <platform/clock.h>
36#include <platform/pmic.h>
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -070037#include <platform/pmic_pwm.h>
Amol Jadic52c8a32011-07-12 11:27:04 -070038#include <gsbi.h>
Greg Griscod2471ef2011-07-14 13:00:42 -070039#include <dev/gpio.h>
Shashank Mittal402d0972010-09-29 10:09:52 -070040
41#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
42
43static struct qup_i2c_dev *dev = NULL;
Greg Griscod2471ef2011-07-14 13:00:42 -070044void gpio_tlmm_config(uint32_t gpio, uint8_t func,
45 uint8_t dir, uint8_t pull,
46 uint8_t drvstr, uint32_t enable);
Shashank Mittal402d0972010-09-29 10:09:52 -070047
48uint8_t expander_read(uint8_t addr)
49{
50 uint8_t ret = 0;
51 /* Create a i2c_msg buffer, that is used to put the controller into read
52 mode and then to read some data. */
53 struct i2c_msg msg_buf[] = {
54 {CORE_GPIO_EXPANDER_I2C_ADDRESS, I2C_M_WR, 1, &addr},
55 {CORE_GPIO_EXPANDER_I2C_ADDRESS, I2C_M_RD, 1, &ret}
56 };
57
58 qup_i2c_xfer(dev, msg_buf, 2);
59
60 return ret;
61}
62
63uint8_t expander_write(uint8_t addr, uint8_t val)
64{
65 uint8_t data_buf[] = { addr, val };
66
67 /* Create a i2c_msg buffer, that is used to put the controller into write
68 mode and then to write some data. */
69 struct i2c_msg msg_buf[] = { {CORE_GPIO_EXPANDER_I2C_ADDRESS,
70 I2C_M_WR, 2, data_buf}
71 };
72
73 qup_i2c_xfer(dev, msg_buf, 1);
74
75 /* Double check that the write worked. */
76 if (val != expander_read(addr)) {
77 return -1;
78 }
79
80 return 0;
81}
82
83void panel_poweron(void)
84{
85 panel_backlight(1);
86 lcdc_on();
87}
88
89void panel_backlight(int on)
90{
91}
92
93static int display_common_power(int on)
94{
95}
96
97static int lcd_power_on()
98{
99 uint8_t buffer = 0x0, mask = 0x0, prev_val = 0x0;
100 int ret = 0;
101
102 /* Configure LDO L2 TEST Bank 2, to Range Select 0 */
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800103 /* Not updating reference voltage */
Shashank Mittal402d0972010-09-29 10:09:52 -0700104 buffer = (0x80); /* Write mode */
105 buffer |= (PM8901_LDO_TEST_BANK(2)); /* Test Bank 2 */
106 mask = buffer | LDO_TEST_RANGE_SELECT_MASK;
107
108 if ((ret = pm8901_test_bank_read(&prev_val,
109 PM8901_LDO_TEST_BANK(2),
110 PM8901_LDO_L2_TEST_BANK))) {
111 return ret;
112 }
113 if ((ret = pm8901_vreg_write(&buffer, mask, PM8901_LDO_L2_TEST_BANK,
114 prev_val))) {
115 return ret;
116 }
117
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800118 /* Enable LDO L2 at Max Voltage (should be around 3.3v) */
119 buffer = (0x0 << PM8901_LDO_CTL_ENABLE__S);
120 /* Disable Pull Down */
121 buffer |= (0x1 << PM8901_LDO_CTL_PULL_DOWN__S);
122 /* Put LDO into normal mode instead of low power mode */
123 buffer |= (0x0 << PM8901_LDO_CTL_MODE__S);
124 /* Write a 31 into the Voltage Programming value to obtain 3.3v VREG =
125 1.75V + X * 100mV */
126 buffer |= (0xF);
127 mask = buffer | LDO_CTL_ENABLE_MASK |
128 LDO_CTL_PULL_DOWN_MASK |
129 LDO_CTL_NORMAL_POWER_MODE_MASK | LDO_CTL_VOLTAGE_SET_MASK;
130
131 /* Do a normal read here, as to not destroy the value in LDO control */
132 if ((ret = pm8901_read(&prev_val, 1, PM8901_LDO_L2))) {
133 return ret;
134 }
135 /* Configure the LDO2 for 3.3v */
136 ret = pm8901_vreg_write(&buffer, mask, PM8901_LDO_L2, prev_val);
137
Shashank Mittal402d0972010-09-29 10:09:52 -0700138 /* Configure LDO L2 TEST Bank 4, for High Range Mode */
139 buffer = (0x80); /* Write mode */
140 buffer |= (PM8901_LDO_TEST_BANK(4)); /* Test Bank 4 */
141 buffer |= (0x01); /* Put into High Range Mode */
142 mask = buffer | LDO_TEST_OUTPUT_RANGE_MASK;
143
144 if ((ret = pm8901_test_bank_read(&prev_val,
145 PM8901_LDO_TEST_BANK(4),
146 PM8901_LDO_L2_TEST_BANK))) {
147 return ret;
148 }
149 if ((ret = pm8901_vreg_write(&buffer, mask, PM8901_LDO_L2_TEST_BANK,
150 prev_val))) {
151 return ret;
152 }
153
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800154 /* Configure LDO L2 TEST Bank 2, to Range Select 0 */
Shashank Mittal402d0972010-09-29 10:09:52 -0700155 buffer = (0x80); /* Write mode */
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800156 buffer |= (PM8901_LDO_TEST_BANK(2)); /* Test Bank 2 */
157 buffer |= (1<<1); /* For fine step 50 mV */
158 buffer |= (1<<3); /* to update reference voltage */
159 mask = buffer | LDO_TEST_RANGE_SELECT_MASK;
160 mask |= (1<<2); /* Setting mask to make ref voltage as 1.25 V */
Shashank Mittal402d0972010-09-29 10:09:52 -0700161
162 if ((ret = pm8901_test_bank_read(&prev_val,
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800163 PM8901_LDO_TEST_BANK(2),
Shashank Mittal402d0972010-09-29 10:09:52 -0700164 PM8901_LDO_L2_TEST_BANK))) {
165 return ret;
166 }
167 if ((ret = pm8901_vreg_write(&buffer, mask, PM8901_LDO_L2_TEST_BANK,
168 prev_val))) {
169 return ret;
170 }
171
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800172 /* Enable PMR for LDO L2 */
173 buffer = 0x7F;
174 mask = 0x7F;
175 if ((ret = pm8901_read(&prev_val, 1, PM8901_PMR_7))) {
Shashank Mittal402d0972010-09-29 10:09:52 -0700176 return ret;
177 }
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800178 ret = pm8901_vreg_write(&buffer, mask, PM8901_PMR_7, prev_val);
Shashank Mittal402d0972010-09-29 10:09:52 -0700179 return ret;
180}
181
182/* Configures the GPIO that are needed to enable LCD.
183 * This function also configures the PMIC for PWM control of the LCD backlight.
184 */
185static void lcd_gpio_cfg(uint8_t on)
186{
187 uint32_t func;
188 uint32_t pull;
189 uint32_t dir;
190 uint32_t enable = 0; /* not used in gpio_tlmm_config */
191 uint32_t drv;
192 if (on) {
193 func = 1; /* Configure GPIO for LCDC function */
194 pull = GPIO_NO_PULL;
195 dir = 1; /* doesn't matter since it is not configured as
196 GPIO */
197 drv = GPIO_16MA;
198 } else {
199 /* As discussed in the MSM8660 FFA HW SW Control Doc configure these
200 GPIO as input and pull down. */
201 func = 0; /* GPIO */
202 pull = GPIO_PULL_DOWN;
203 dir = 0; /* Input */
204 drv = 0; /* does not matter configured as input */
205 }
206
207 gpio_tlmm_config(0, func, dir, pull, drv, enable); /* lcdc_pclk */
208 gpio_tlmm_config(1, func, dir, pull, drv, enable); /* lcdc_hsync */
209 gpio_tlmm_config(2, func, dir, pull, drv, enable); /* lcdc_vsync */
210 gpio_tlmm_config(3, func, dir, pull, drv, enable); /* lcdc_den */
211 gpio_tlmm_config(4, func, dir, pull, drv, enable); /* lcdc_red7 */
212 gpio_tlmm_config(5, func, dir, pull, drv, enable); /* lcdc_red6 */
213 gpio_tlmm_config(6, func, dir, pull, drv, enable); /* lcdc_red5 */
214 gpio_tlmm_config(7, func, dir, pull, drv, enable); /* lcdc_red4 */
215 gpio_tlmm_config(8, func, dir, pull, drv, enable); /* lcdc_red3 */
216 gpio_tlmm_config(9, func, dir, pull, drv, enable); /* lcdc_red2 */
217 gpio_tlmm_config(10, func, dir, pull, drv, enable); /* lcdc_red1 */
218 gpio_tlmm_config(11, func, dir, pull, drv, enable); /* lcdc_red0 */
219 gpio_tlmm_config(12, func, dir, pull, drv, enable); /* lcdc_rgn7 */
220 gpio_tlmm_config(13, func, dir, pull, drv, enable); /* lcdc_rgn6 */
221 gpio_tlmm_config(14, func, dir, pull, drv, enable); /* lcdc_rgn5 */
222 gpio_tlmm_config(15, func, dir, pull, drv, enable); /* lcdc_rgn4 */
223 gpio_tlmm_config(16, func, dir, pull, drv, enable); /* lcdc_rgn3 */
224 gpio_tlmm_config(17, func, dir, pull, drv, enable); /* lcdc_rgn2 */
225 gpio_tlmm_config(18, func, dir, pull, drv, enable); /* lcdc_rgn1 */
226 gpio_tlmm_config(19, func, dir, pull, drv, enable); /* lcdc_rgn0 */
227 gpio_tlmm_config(20, func, dir, pull, drv, enable); /* lcdc_blu7 */
228 gpio_tlmm_config(21, func, dir, pull, drv, enable); /* lcdc_blu6 */
229 gpio_tlmm_config(22, func, dir, pull, drv, enable); /* lcdc_blu5 */
230 gpio_tlmm_config(23, func, dir, pull, drv, enable); /* lcdc_blu4 */
231 gpio_tlmm_config(24, func, dir, pull, drv, enable); /* lcdc_blu3 */
232 gpio_tlmm_config(25, func, dir, pull, drv, enable); /* lcdc_blu2 */
233 gpio_tlmm_config(26, func, dir, pull, drv, enable); /* lcdc_blu1 */
234 gpio_tlmm_config(27, func, dir, pull, drv, enable); /* lcdc_blu0 */
235}
236
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700237/* API to set backlight level configuring PWM in PM8058 */
238
239int panel_set_backlight(uint8_t bt_level)
Shashank Mittal402d0972010-09-29 10:09:52 -0700240{
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700241 int rc = -1;
242 uint32_t duty_us, period_us;
Shashank Mittal402d0972010-09-29 10:09:52 -0700243
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700244 if((bt_level <= 0) || (bt_level > 15))
245 {
246 dprintf(CRITICAL, "Error in brightness level (1-15 allowed)\n");
247 goto bail_out;
248 }
249
250 duty_us = bt_level*PWM_DUTY_LEVEL;
251 period_us = PWM_PERIOD_USEC;
252 rc = pm_pwm_config(0, duty_us, period_us);
253 if(rc)
254 {
255 dprintf(CRITICAL, "Error in pwm_config0\n");
256 goto bail_out;
257 }
258
259 duty_us = PWM_PERIOD_USEC - (bt_level*PWM_DUTY_LEVEL);
260 period_us = PWM_PERIOD_USEC;
261 rc = pm_pwm_config(1, duty_us, period_us);
262 if(rc)
263 {
264 dprintf(CRITICAL, "Error in pwm_config1\n");
265 goto bail_out;
266 }
267
268 rc = pm_pwm_enable(0);
269 if(rc)
270 {
271 dprintf(CRITICAL, "Error in pwm_enable0\n");
272 goto bail_out;
273 }
274
275 rc = pm_pwm_enable(1);
276 if(rc)
277 dprintf(CRITICAL, "Error in pwm_enable1\n");
278
279bail_out:
280 return rc;
281}
282
283void bl_gpio_init(void)
284{
285 /* Configure PM8058 GPIO24 as a PWM driver (LPG ch0) for chain 1 of 6 LEDs */
286 pm8058_write_one(0x81, GPIO24_GPIO_CNTRL); /* Write, Bank0, VIN0, Mode
Shashank Mittal402d0972010-09-29 10:09:52 -0700287 selection enabled */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700288 pm8058_write_one(0x98, GPIO24_GPIO_CNTRL); /* Write, Bank1, OutOn/InOff,
Shashank Mittal402d0972010-09-29 10:09:52 -0700289 CMOS, Don't Invert Output */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700290 pm8058_write_one(0xAA, GPIO24_GPIO_CNTRL); /* Write, Bank2, GPIO no pull */
291 pm8058_write_one(0xB4, GPIO24_GPIO_CNTRL); /* Write, Bank3, high drv
Shashank Mittal402d0972010-09-29 10:09:52 -0700292 strength */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700293 pm8058_write_one(0xC6, GPIO24_GPIO_CNTRL); /* Write, Bank4, Src: LPG_DRV1
Shashank Mittal402d0972010-09-29 10:09:52 -0700294 (Spec. Fnc 2) */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700295 pm8058_write_one(0xD8, GPIO24_GPIO_CNTRL); /* Write, Bank5, Interrupt
Shashank Mittal402d0972010-09-29 10:09:52 -0700296 polarity noninversion */
297
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700298 /* Configure PM8058 GPIO25 as a PWM driver (LPG ch1) for chain 2 of 5 LEDs */
299 pm8058_write_one(0x81, GPIO25_GPIO_CNTRL); /* Write, Bank0, VIN0, Mode
Shashank Mittal402d0972010-09-29 10:09:52 -0700300 selection enabled */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700301 pm8058_write_one(0x98, GPIO25_GPIO_CNTRL); /* Write, Bank1, OutOn/InOff,
Shashank Mittal402d0972010-09-29 10:09:52 -0700302 CMOS, Don't Invert Output */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700303 pm8058_write_one(0xAA, GPIO25_GPIO_CNTRL); /* Write, Bank2, GPIO no pull */
304 pm8058_write_one(0xB4, GPIO25_GPIO_CNTRL); /* Write, Bank3, high drv
Shashank Mittal402d0972010-09-29 10:09:52 -0700305 strength */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700306 pm8058_write_one(0xC6, GPIO25_GPIO_CNTRL); /* Write, Bank4, Src: LPG_DRV2
Shashank Mittal402d0972010-09-29 10:09:52 -0700307 (Spec. Fnc 2) */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700308 pm8058_write_one(0xD8, GPIO25_GPIO_CNTRL); /* Write, Bank5, Interrupt
Shashank Mittal402d0972010-09-29 10:09:52 -0700309 polarity noninversion */
Shashank Mittal402d0972010-09-29 10:09:52 -0700310}
311
312void board_lcd_enable(void)
313{
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700314 int rc = -1;
Amol Jadic52c8a32011-07-12 11:27:04 -0700315 dev = qup_i2c_init(GSBI_ID_8, 100000, 24000000);
Shashank Mittal402d0972010-09-29 10:09:52 -0700316
317 /* Make sure dev is created and initialized properly */
318 if (!dev) {
319 while (1) ;
320 return;
321 }
322
323 /* Store current value of these registers as to not destroy their previous
324 state. */
325 uint8_t open_drain_a = expander_read(GPIO_EXPANDER_REG_OPEN_DRAIN_A);
326 uint8_t dir_b = expander_read(GPIO_EXPANDER_REG_DIR_B);
327 uint8_t dir_a = expander_read(GPIO_EXPANDER_REG_DIR_A);
328 uint8_t data_b = expander_read(GPIO_EXPANDER_REG_DATA_B);
329 uint8_t data_a = expander_read(GPIO_EXPANDER_REG_DATA_A);
330
331 /* Set the LVDS_SHUTDOWN_N to open drain and output low. */
332 dprintf(INFO, "Enable lvds_shutdown_n line for Open Drain.\n");
333 expander_write(GPIO_EXPANDER_REG_OPEN_DRAIN_A, 0x04 | open_drain_a);
334
335 dprintf(INFO, "Enable lvds_shutdown_n line for output.\n");
336 expander_write(GPIO_EXPANDER_REG_DIR_A, ~0x04 & dir_a);
337
338 dprintf(INFO, "Drive the LVDS_SHUTDOWN_N pin high here.\n");
339 expander_write(GPIO_EXPANDER_REG_DATA_A, 0x04 | data_a);
340
341 /* Turn on the VREG_L2B to 3.3V. */
342
343 /* Power on the appropiate PMIC LDO power rails */
344 if (lcd_power_on())
345 return;
346
347 /* Enable the GPIO as LCDC mode LCD. */
348 lcd_gpio_cfg(1);
349
350 /* Arbitrary delay */
351 udelay(20000);
352
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700353 /* Set the GPIOs needed for backlight */
354 bl_gpio_init();
355 /* Set backlight level with API (to 8 by default) */
356 rc = panel_set_backlight(8);
357 if(rc)
358 dprintf(CRITICAL,"Error in setting panel backlight\n");
Shashank Mittal402d0972010-09-29 10:09:52 -0700359
360 dprintf(INFO, "Enable BACKLIGHT_EN line for output.\n");
361 expander_write(GPIO_EXPANDER_REG_DIR_B, ~0x10 & dir_b);
362
363 dprintf(INFO, "Drive BACKLIGHT_EN to high\n");
364 expander_write(GPIO_EXPANDER_REG_DATA_B, 0x10 | data_b);
365
366}
367
Shashank Mittal402d0972010-09-29 10:09:52 -0700368void lcdc_on(void)
369{
370 board_lcd_enable();
371}