Ajay Dudani | 232ce81 | 2009-12-02 00:14:11 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2008, Google Inc. |
| 3 | * All rights reserved. |
Duy Truong | f3ac7b3 | 2013-02-13 01:07:28 -0800 | [diff] [blame] | 4 | * Copyright (c) 2009-2011, The Linux Foundation. All rights reserved. |
Ajay Dudani | 232ce81 | 2009-12-02 00:14:11 -0800 | [diff] [blame] | 5 | * |
| 6 | * Redistribution and use in source and binary forms, with or without |
| 7 | * modification, are permitted provided that the following conditions |
| 8 | * are met: |
| 9 | * * Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * * Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in |
| 13 | * the documentation and/or other materials provided with the |
| 14 | * distribution. |
| 15 | * * Neither the name of Google, Inc. nor the names of its contributors |
| 16 | * may be used to endorse or promote products derived from this |
| 17 | * software without specific prior written permission. |
| 18 | * |
| 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 20 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 21 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
| 22 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
| 23 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 24 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
| 25 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
| 26 | * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
| 27 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| 28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT |
| 29 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 30 | * SUCH DAMAGE. |
| 31 | */ |
| 32 | |
Shashank Mittal | 1ddc04c | 2010-12-21 14:39:07 -0800 | [diff] [blame] | 33 | #ifndef _PLATFORM_MSM7X30_IOMAP_H_ |
| 34 | #define _PLATFORM_MSM7X30_IOMAP_H_ |
Ajay Dudani | 232ce81 | 2009-12-02 00:14:11 -0800 | [diff] [blame] | 35 | |
Shashank Mittal | 1ddc04c | 2010-12-21 14:39:07 -0800 | [diff] [blame] | 36 | #define MSM_UART1_BASE 0xACA00000 |
| 37 | #define MSM_UART2_BASE 0xACB00000 |
| 38 | #define MSM_UART3_BASE 0xACC00000 |
Ajay Dudani | 232ce81 | 2009-12-02 00:14:11 -0800 | [diff] [blame] | 39 | |
| 40 | #define MSM_VIC_BASE 0xC0080000 |
| 41 | #define MSM_TMR_BASE 0xC0100000 |
Amol Jadi | aeda4e6 | 2011-07-19 18:07:29 -0700 | [diff] [blame] | 42 | |
| 43 | #define MSM_GPT_BASE (MSM_TMR_BASE + 0x04) |
| 44 | #define MSM_DGT_BASE (MSM_TMR_BASE + 0x24) |
| 45 | #define SPSS_TIMER_STATUS (MSM_TMR_BASE + 0x88) |
| 46 | |
| 47 | #define GPT_REG(off) (MSM_GPT_BASE + (off)) |
| 48 | #define DGT_REG(off) (MSM_DGT_BASE + (off)) |
| 49 | |
| 50 | #define GPT_MATCH_VAL GPT_REG(0x0000) |
| 51 | #define GPT_COUNT_VAL GPT_REG(0x0004) |
| 52 | #define GPT_ENABLE GPT_REG(0x0008) |
| 53 | #define GPT_CLEAR GPT_REG(0x000C) |
| 54 | |
| 55 | #define DGT_MATCH_VAL DGT_REG(0x0000) |
| 56 | #define DGT_COUNT_VAL DGT_REG(0x0004) |
| 57 | #define DGT_ENABLE DGT_REG(0x0008) |
| 58 | #define DGT_CLEAR DGT_REG(0x000C) |
| 59 | #define DGT_CLK_CTL DGT_REG(0x0010) |
| 60 | |
| 61 | #define HW_REVISION_NUMBER 0xABC00270 |
| 62 | |
Ajay Dudani | 232ce81 | 2009-12-02 00:14:11 -0800 | [diff] [blame] | 63 | #define MSM_CSR_BASE 0xC0100000 |
| 64 | #define MSM_GCC_BASE 0xC0182000 |
| 65 | |
Subbaraman Narayanamurthy | 4b43c35 | 2010-09-24 13:20:52 -0700 | [diff] [blame] | 66 | #define MSM_SDC1_BASE 0xA0400000 |
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 67 | #define MSM_SDC2_BASE 0xA0500000 |
Subbaraman Narayanamurthy | 4b43c35 | 2010-09-24 13:20:52 -0700 | [diff] [blame] | 68 | #define MSM_SDC3_BASE 0xA3000000 |
| 69 | #define MSM_SDC4_BASE 0xA3100000 |
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 70 | |
Ajay Dudani | c51bf63 | 2010-04-15 10:41:23 -0700 | [diff] [blame] | 71 | #define MSM_SHARED_BASE 0x00100000 |
| 72 | |
Ajay Dudani | 7d60552 | 2010-10-01 19:52:37 -0700 | [diff] [blame] | 73 | #define MSM_CLK_CTL_BASE 0xAB800000 |
| 74 | #define MSM_CLK_CTL_SH2_BASE 0xABA01000 |
Subbaraman Narayanamurthy | 641dadc | 2011-01-20 13:44:51 -0800 | [diff] [blame] | 75 | |
| 76 | #define REG_BASE(off) (MSM_CLK_CTL_BASE + (off)) |
| 77 | #define REG_SH2_BASE(off) (MSM_CLK_CTL_SH2_BASE + (off)) |
| 78 | |
Ajay Dudani | 7d60552 | 2010-10-01 19:52:37 -0700 | [diff] [blame] | 79 | #define SCSS_CLK_CTL 0xC0101004 |
| 80 | #define SCSS_CLK_SEL 0xC0101008 |
| 81 | |
| 82 | #define MSM_USB_BASE 0xA3600000 |
Subbaraman Narayanamurthy | 9b7276c | 2011-01-25 17:25:30 -0800 | [diff] [blame] | 83 | #define MSM_CRYPTO_BASE 0xA8400000 |
| 84 | |
Subbaraman Narayanamurthy | 641dadc | 2011-01-20 13:44:51 -0800 | [diff] [blame] | 85 | #define SH2_USBH_MD_REG REG_SH2_BASE(0x2BC) |
| 86 | #define SH2_USBH_NS_REG REG_SH2_BASE(0x2C0) |
Subbaraman Narayanamurthy | d962c79 | 2011-01-19 20:53:07 -0800 | [diff] [blame] | 87 | |
Subbaraman Narayanamurthy | 641dadc | 2011-01-20 13:44:51 -0800 | [diff] [blame] | 88 | #define SH2_MDP_NS_REG REG_SH2_BASE(0x14C) |
| 89 | #define SH2_MDP_LCDC_MD_REG REG_SH2_BASE(0x38C) |
| 90 | #define SH2_MDP_LCDC_NS_REG REG_SH2_BASE(0x390) |
| 91 | #define SH2_MDP_VSYNC_REG REG_SH2_BASE(0x460) |
| 92 | #define SH2_PMDH_NS_REG REG_SH2_BASE(0x8C) |
Subbaraman Narayanamurthy | d962c79 | 2011-01-19 20:53:07 -0800 | [diff] [blame] | 93 | |
Subbaraman Narayanamurthy | 641dadc | 2011-01-20 13:44:51 -0800 | [diff] [blame] | 94 | #define SH2_GLBL_CLK_ENA_SC REG_SH2_BASE(0x3BC) |
| 95 | #define SH2_GLBL_CLK_ENA_2_SC REG_SH2_BASE(0x3C0) |
| 96 | |
| 97 | #define SH2_OWN_ROW1_BASE_REG REG_BASE(0x041C) |
| 98 | #define SH2_OWN_ROW2_BASE_REG REG_BASE(0x0424) |
| 99 | #define SH2_OWN_APPS2_BASE_REG REG_BASE(0x0414) |
Ajay Dudani | 7d60552 | 2010-10-01 19:52:37 -0700 | [diff] [blame] | 100 | |
Amol Jadi | 84a546a | 2011-03-02 12:09:11 -0800 | [diff] [blame] | 101 | #define MSM_ADM_BASE 0xAC200000 |
| 102 | #define MSM_ADM_SD_OFFSET 0x00100400 |
| 103 | |
Shashank Mittal | 0dab8f5 | 2010-11-03 16:40:30 -0700 | [diff] [blame] | 104 | #define MSM_SAW_BASE 0xC0102000 |
Subbaraman Narayanamurthy | 641dadc | 2011-01-20 13:44:51 -0800 | [diff] [blame] | 105 | |
| 106 | #define PLL_ENA_REG REG_SH2_BASE(0x0264) |
| 107 | #define PLL2_STATUS_BASE_REG REG_BASE(0x0350) |
| 108 | #define PLL2_L_VAL_ADDR REG_BASE(0x033C) |
Ajay Dudani | 232ce81 | 2009-12-02 00:14:11 -0800 | [diff] [blame] | 109 | #endif |