blob: 0d0b361b45aa9f5440180aebf1b56d50abfe201b [file] [log] [blame]
Channagoud Kadabi3f428532014-01-28 21:33:34 -08001/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07002 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <string.h>
30#include <stdlib.h>
31#include <debug.h>
32#include <reg.h>
33#include <mmc_sdhci.h>
34#include <sdhci.h>
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -070035#include <sdhci_msm.h>
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070036#include <partition_parser.h>
37#include <platform/iomap.h>
38#include <platform/timer.h>
39
40extern void clock_init_mmc(uint32_t);
41extern void clock_config_mmc(uint32_t, uint32_t);
42
43/* data access time unit in ns */
44static const uint32_t taac_unit[] =
45{
46 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
47};
48
49/* data access time value x 10 */
50static const uint32_t taac_value[] =
51{
52 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
53};
54
55/* data transfer rate in kbit/s */
56static const uint32_t xfer_rate_unit[] =
57{
58 100, 1000, 10000, 100000, 0, 0, 0, 0
59};
60
61/* data transfer rate value x 10*/
62static const uint32_t xfer_rate_value[] =
63{
64 0, 10, 12, 13, 15, 20, 26, 30, 35, 40, 45, 52, 55, 60, 70, 80
65};
66
67/*
68 * Function: mmc decode and save csd
69 * Arg : Card structure & raw csd
70 * Return : 0 on Success, 1 on Failure
71 * Flow : Decodes CSD response received from the card.
72 * Note that we have defined only few of the CSD elements
73 * in csd structure. We'll only decode those values.
74 */
75static uint32_t mmc_decode_and_save_csd(struct mmc_card *card)
76{
77 uint32_t mmc_sizeof = 0;
78 uint32_t mmc_unit = 0;
79 uint32_t mmc_value = 0;
80 uint32_t mmc_temp = 0;
81 uint32_t *raw_csd = card->raw_csd;
82
83 struct mmc_csd mmc_csd;
84
85 mmc_sizeof = sizeof(uint32_t) * 8;
86
87 mmc_csd.cmmc_structure = UNPACK_BITS(raw_csd, 126, 2, mmc_sizeof);
88
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -070089 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070090 /* Parse CSD according to SD card spec. */
91
92 /* CSD register is little bit differnet for CSD version 2.0 High
93 * Capacity and CSD version 1.0/2.0 Standard memory cards.
94 * In Version 2.0 some of the fields have fixed values and it's
95 * not necessary for host to refer these fields in CSD sent by
96 * card
97 */
98
99 if (mmc_csd.cmmc_structure == 1) {
100 /* CSD Version 2.0 */
101 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
102 /* Fixed value is 9 = 2^9 = 512 */
103 mmc_csd.write_blk_len = 512;
104 /* Fixed value is 9 = 512 */
105 mmc_csd.read_blk_len = 512;
106 /* Fixed value: 010b */
107 mmc_csd.r2w_factor = 0x2;
108 /* Not there in version 2.0 */
109 mmc_csd.c_size_mult = 0;
110 mmc_csd.c_size = UNPACK_BITS(raw_csd, 48, 22, mmc_sizeof);
111 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof)
112 * 100;
113
114 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
115 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
116 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit])
117 / 10;
118
119 mmc_csd.erase_blk_len = 1;
120 mmc_csd.read_blk_misalign = 0;
121 mmc_csd.write_blk_misalign = 0;
122 mmc_csd.read_blk_partial = 0;
123 mmc_csd.write_blk_partial = 0;
124
125 mmc_unit = UNPACK_BITS(raw_csd, 96, 3, mmc_sizeof);
126 mmc_value = UNPACK_BITS(raw_csd, 99, 4, mmc_sizeof);
127 mmc_csd.tran_speed = (xfer_rate_value[mmc_value] *
128 xfer_rate_unit[mmc_unit]) / 10;
129
130 mmc_csd.wp_grp_size = 0x0;
131 mmc_csd.wp_grp_enable = 0x0;
132 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
133 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
134
135 /* Calculate the card capcity */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700136 card->capacity = (unsigned long long) (1 + mmc_csd.c_size) * 512 * 1024;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700137 } else {
138 /* CSD Version 1.0 */
139 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
140
141 mmc_temp = UNPACK_BITS(raw_csd, 22, 4, mmc_sizeof);
142 mmc_csd.write_blk_len = (mmc_temp > 8 && mmc_temp < 12) ?
143 (1 << mmc_temp) : 512;
144
145 mmc_temp = UNPACK_BITS(raw_csd, 80, 4, mmc_sizeof);
146 mmc_csd.read_blk_len = (mmc_temp > 8 && mmc_temp < 12) ?
147 (1 << mmc_temp) : 512;
148
149 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
150 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
151 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit])
152 / 10;
153
154 mmc_unit = UNPACK_BITS(raw_csd, 96, 3, mmc_sizeof);
155 mmc_value = UNPACK_BITS(raw_csd, 99, 4, mmc_sizeof);
156 mmc_csd.tran_speed = (xfer_rate_value[mmc_value] *
157 xfer_rate_unit[mmc_unit]) / 10;
158
159 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof)
160 * 100;
161
162 mmc_csd.r2w_factor = UNPACK_BITS(raw_csd, 26, 3, mmc_sizeof);
163 mmc_csd.sector_size = UNPACK_BITS(raw_csd, 39, 7, mmc_sizeof) + 1;
164
165 mmc_csd.erase_blk_len = UNPACK_BITS(raw_csd, 46, 1, mmc_sizeof);
166 mmc_csd.read_blk_misalign = UNPACK_BITS(raw_csd, 77, 1, mmc_sizeof);
167 mmc_csd.write_blk_misalign = UNPACK_BITS(raw_csd, 78, 1, mmc_sizeof);
168 mmc_csd.read_blk_partial = UNPACK_BITS(raw_csd, 79, 1, mmc_sizeof);
169 mmc_csd.write_blk_partial = UNPACK_BITS(raw_csd, 21, 1, mmc_sizeof);
170
171 mmc_csd.c_size_mult = UNPACK_BITS(raw_csd, 47, 3, mmc_sizeof);
172 mmc_csd.c_size = UNPACK_BITS(raw_csd, 62, 12, mmc_sizeof);
173 mmc_csd.wp_grp_size = UNPACK_BITS(raw_csd, 32, 7, mmc_sizeof);
174 mmc_csd.wp_grp_enable = UNPACK_BITS(raw_csd, 31, 1, mmc_sizeof);
175 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
176 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
177
178 /* Calculate the card capacity */
179 mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700180 card->capacity = (unsigned long long)mmc_temp * mmc_csd.read_blk_len;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700181 }
182 } else {
183 /* Parse CSD according to MMC card spec. */
184 mmc_csd.spec_vers = UNPACK_BITS(raw_csd, 122, 4, mmc_sizeof);
185 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
186 mmc_csd.write_blk_len = 1 << UNPACK_BITS(raw_csd, 22, 4, mmc_sizeof);
187 mmc_csd.read_blk_len = 1 << UNPACK_BITS(raw_csd, 80, 4, mmc_sizeof);
188 mmc_csd.r2w_factor = UNPACK_BITS(raw_csd, 26, 3, mmc_sizeof);
189 mmc_csd.c_size_mult = UNPACK_BITS(raw_csd, 47, 3, mmc_sizeof);
190 mmc_csd.c_size = UNPACK_BITS(raw_csd, 62, 12, mmc_sizeof);
191 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof) * 100;
192
193 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
194 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
195 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit]) / 10;
196
197 mmc_csd.read_blk_misalign = UNPACK_BITS(raw_csd, 77, 1, mmc_sizeof);
198 mmc_csd.write_blk_misalign = UNPACK_BITS(raw_csd, 78, 1, mmc_sizeof);
199 mmc_csd.read_blk_partial = UNPACK_BITS(raw_csd, 79, 1, mmc_sizeof);
200 mmc_csd.write_blk_partial = UNPACK_BITS(raw_csd, 21, 1, mmc_sizeof);
201
202 /* Ignore -- no use of this value. */
203 mmc_csd.tran_speed = 0x00;
204
205 mmc_csd.erase_grp_size = UNPACK_BITS(raw_csd, 42, 5, mmc_sizeof);
206 mmc_csd.erase_grp_mult = UNPACK_BITS(raw_csd, 37, 5, mmc_sizeof);
207 mmc_csd.wp_grp_size = UNPACK_BITS(raw_csd, 32, 5, mmc_sizeof);
208 mmc_csd.wp_grp_enable = UNPACK_BITS(raw_csd, 31, 1, mmc_sizeof);
209 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
210 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
211
212 /* Calculate the card capcity */
213 if (mmc_csd.c_size != 0xFFF) {
214 /* For cards less than or equal to 2GB */
215 mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700216 card->capacity = (unsigned long long) mmc_temp * mmc_csd.read_blk_len;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700217 } else {
218 /* For cards greater than 2GB, Ext CSD register's SEC_COUNT
219 * is used to calculate the size.
220 */
221 uint64_t sec_count;
222
223 sec_count = (card->ext_csd[MMC_SEC_COUNT4] << MMC_SEC_COUNT4_SHIFT)
224 | (card->ext_csd[MMC_SEC_COUNT3] << MMC_SEC_COUNT3_SHIFT)
225 | (card->ext_csd[MMC_SEC_COUNT2] << MMC_SEC_COUNT2_SHIFT)
226 | card->ext_csd[MMC_SEC_COUNT1];
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700227 card->capacity = sec_count * MMC_BLK_SZ;
228 }
229 }
230
231 /* save the information in card structure */
232 memcpy((struct mmc_csd *)&card->csd,(struct mmc_csd *)&mmc_csd,
233 sizeof(struct mmc_csd));
234
235 dprintf(SPEW, "Decoded CSD fields:\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700236 dprintf(SPEW, "cmmc_structure: %u\n", mmc_csd.cmmc_structure);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700237 dprintf(SPEW, "card_cmd_class: %x\n", mmc_csd.card_cmd_class);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700238 dprintf(SPEW, "write_blk_len: %u\n", mmc_csd.write_blk_len);
239 dprintf(SPEW, "read_blk_len: %u\n", mmc_csd.read_blk_len);
240 dprintf(SPEW, "r2w_factor: %u\n", mmc_csd.r2w_factor);
241 dprintf(SPEW, "sector_size: %u\n", mmc_csd.sector_size);
242 dprintf(SPEW, "c_size_mult:%u\n", mmc_csd.c_size_mult);
243 dprintf(SPEW, "c_size: %u\n", mmc_csd.c_size);
244 dprintf(SPEW, "nsac_clk_cycle: %u\n", mmc_csd.nsac_clk_cycle);
245 dprintf(SPEW, "taac_ns: %u\n", mmc_csd.taac_ns);
246 dprintf(SPEW, "tran_speed: %u kbps\n", mmc_csd.tran_speed);
247 dprintf(SPEW, "erase_blk_len: %u\n", mmc_csd.erase_blk_len);
248 dprintf(SPEW, "read_blk_misalign: %u\n", mmc_csd.read_blk_misalign);
249 dprintf(SPEW, "write_blk_misalign: %u\n", mmc_csd.write_blk_misalign);
250 dprintf(SPEW, "read_blk_partial: %u\n", mmc_csd.read_blk_partial);
251 dprintf(SPEW, "write_blk_partial: %u\n", mmc_csd.write_blk_partial);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700252 dprintf(SPEW, "Card Capacity: %llu Bytes\n", card->capacity);
253
254 return 0;
255}
256
257/*
258 * Function: mmc decode & save cid
259 * Arg : card structure & raw cid
260 * Return : 0 on Success, 1 on Failure
261 * Flow : Decode CID sent by the card.
262 */
263static uint32_t mmc_decode_and_save_cid(struct mmc_card *card,
264 uint32_t *raw_cid)
265{
266 struct mmc_cid mmc_cid;
267 uint32_t mmc_sizeof = 0;
268 int i = 0;
269
270 if (!raw_cid) {
271 return 1;
272 }
273
274 mmc_sizeof = sizeof(uint32_t) * 8;
275
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700276 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700277 mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
278 mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
279
280 for (i = 0; i < 5; i++) {
281 mmc_cid.pnm[i] = (uint8_t)UNPACK_BITS(raw_cid,
282 (104 - 8 * (i + 1)),
283 8,
284 mmc_sizeof);
285 }
286 mmc_cid.pnm[5] = 0;
287 mmc_cid.pnm[6] = 0;
288
289 mmc_cid.prv = UNPACK_BITS(raw_cid, 56, 8, mmc_sizeof);
David Ng571b8c32013-07-30 19:17:42 -0700290 mmc_cid.psn = UNPACK_BITS(raw_cid, 24, 32, mmc_sizeof);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700291 mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
292 mmc_cid.year = UNPACK_BITS(raw_cid, 12, 8, mmc_sizeof);
293 mmc_cid.year += 2000;
294 } else {
295 mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
296 mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
297
298 for (i = 0; i < 6; i++) {
299 mmc_cid.pnm[i] = (uint8_t)UNPACK_BITS(raw_cid, (104 - 8 * (i + 1)),
300 8, mmc_sizeof);
301 }
302 mmc_cid.pnm[6] = 0;
303
304 mmc_cid.prv = UNPACK_BITS(raw_cid, 48, 8, mmc_sizeof);
David Ng571b8c32013-07-30 19:17:42 -0700305 mmc_cid.psn = UNPACK_BITS(raw_cid, 16, 32, mmc_sizeof);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700306 mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
307 mmc_cid.year = UNPACK_BITS(raw_cid, 12, 4, mmc_sizeof);
308 mmc_cid.year += 1997;
309 }
310
311 /* save it in card database */
312 memcpy((struct mmc_cid *)&card->cid,
313 (struct mmc_cid *)&mmc_cid, sizeof(struct mmc_cid));
314
315 dprintf(SPEW, "Decoded CID fields:\n");
316 dprintf(SPEW, "Manufacturer ID: %x\n", mmc_cid.mid);
317 dprintf(SPEW, "OEM ID: 0x%x\n", mmc_cid.oid);
318 dprintf(SPEW, "Product Name: %s\n", mmc_cid.pnm);
319 dprintf(SPEW, "Product revision: %d.%d\n", (mmc_cid.prv >> 4),
320 (mmc_cid.prv & 0xF));
321 dprintf(SPEW, "Product serial number: %X\n", mmc_cid.psn);
322 dprintf(SPEW, "Manufacturing date: %d %d\n", mmc_cid.month, mmc_cid.year);
323
324 return 0;
325}
326
327/*
328 * Function: mmc reset cards
329 * Arg : host structure
330 * Return : 0 on Success, 1 on Failure
331 * Flow : Reset all the cards to idle condition (CMD 0)
332 */
333static uint8_t mmc_reset_card(struct sdhci_host *host)
334{
335 struct mmc_command cmd;
336
337 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
338
339 cmd.cmd_index = CMD0_GO_IDLE_STATE;
340 cmd.argument = 0;
341 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
342 cmd.resp_type = SDHCI_CMD_RESP_NONE;
343
344 /* send command */
345 return sdhci_send_command(host, &cmd);
346}
347
348/*
349 * Function: mmc operations command
350 * Arg : host & card structure
351 * Return : 0 on Success, 1 on Failure
352 * Flow : Send CMD1 to know whether the card supports host VDD profile or not.
353 */
354static uint32_t mmc_send_op_cond(struct sdhci_host *host, struct mmc_card *card)
355{
356 struct mmc_command cmd;
357 uint32_t mmc_resp = 0;
358 uint32_t mmc_ret = 0;
359 uint32_t mmc_retry = 0;
360
361 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
362
363 /* CMD1 format:
364 * [31] Busy bit
365 * [30:29] Access mode
366 * [28:24] reserved
367 * [23:15] 2.7-3.6
368 * [14:8] 2.0-2.6
369 * [7] 1.7-1.95
370 * [6:0] reserved
371 */
372
373 cmd.cmd_index = CMD1_SEND_OP_COND;
374 cmd.argument = card->ocr;
375 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
376 cmd.resp_type = SDHCI_CMD_RESP_R3;
377
378 do {
379 mmc_ret = sdhci_send_command(host, &cmd);
380 if (mmc_ret)
381 return mmc_ret;
382
383 /* Command returned success, now it's time to examine response */
384 mmc_resp = cmd.resp[0];
385
386 /* Check the response for busy status */
387 if (!(mmc_resp & MMC_OCR_BUSY)) {
388 mmc_retry++;
389 mdelay(1);
390 continue;
391 } else
392 break;
393 } while (mmc_retry < MMC_MAX_COMMAND_RETRY);
394
395 /* If we reached here after max retries, we failed to get OCR */
396 if (mmc_retry == MMC_MAX_COMMAND_RETRY && !(mmc_resp & MMC_OCR_BUSY)) {
397 dprintf(CRITICAL, "Card has busy status set. Init did not complete\n");
398 return 1;
399 }
400
401 /* Response contains card's ocr. Update card's information */
402 card->ocr = mmc_resp;
403
404 if (mmc_resp & MMC_OCR_SEC_MODE)
405 card->type = MMC_TYPE_MMCHC;
406 else
407 card->type = MMC_TYPE_STD_MMC;
408
409 return 0;
410}
411
412/*
413 * Function: mmc send cid
414 * Arg : host & card structure
415 * Return : 0 on Success, 1 on Failure
416 * Flow : Request any card to send its uniquie card identification
417 * (CID) number (CMD2).
418 */
419static uint32_t mmc_all_send_cid(struct sdhci_host *host, struct mmc_card *card)
420{
421 struct mmc_command cmd;
422 uint32_t mmc_ret = 0;
423
424 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
425
426 /* CMD2 Format:
427 * [31:0] stuff bits
428 */
429 cmd.cmd_index = CMD2_ALL_SEND_CID;
430 cmd.argument = 0;
431 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
432 cmd.resp_type = SDHCI_CMD_RESP_R2;
433
434 /* send command */
435 mmc_ret = sdhci_send_command(host, &cmd);
436 if (mmc_ret) {
437 return mmc_ret;
438 }
439
440 /* Response contains card's 128 bits CID register */
441 mmc_ret = mmc_decode_and_save_cid(card, cmd.resp);
442 if (mmc_ret) {
443 return mmc_ret;
444 }
445
446 return 0;
447}
448
449/*
450 * Function: mmc send relative address
451 * Arg : host & card structure
452 * Return : 0 on Success, 1 on Failure
453 * Flow : Ask card to send it's relative card address (RCA).
454 * This RCA number is shorter than CID and is used by
455 * the host to address the card in future (CMD3)
456 */
457static uint32_t mmc_send_relative_address(struct sdhci_host *host,
458 struct mmc_card *card)
459{
460 struct mmc_command cmd;
461 uint32_t mmc_ret = 0;
462
463 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
464
465 /* CMD3 Format:
466 * [31:0] stuff bits
467 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700468 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700469 cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
470 cmd.argument = 0;
471 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
472 cmd.resp_type = SDHCI_CMD_RESP_R6;
473
474 /* send command */
475 mmc_ret = sdhci_send_command(host, &cmd);
476 if (mmc_ret)
477 return mmc_ret;
478
479 /* For sD, card will send RCA. Store it */
480 card->rca = (cmd.resp[0] >> 16);
481 } else {
482 cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
483 cmd.argument = (MMC_RCA << 16);
484 card->rca = (cmd.argument >> 16);
485 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
486 cmd.resp_type = SDHCI_CMD_RESP_R6;
487
488 /* send command */
489 mmc_ret = sdhci_send_command(host, &cmd);
490 if (mmc_ret)
491 return mmc_ret;
492 }
493
494 return 0;
495}
496
497/*
498 * Function: mmc send csd
499 * Arg : host, card structure & o/p arg to store csd
500 * Return : 0 on Success, 1 on Failure
501 * Flow : Requests card to send it's CSD register's contents. (CMD9)
502 */
503static uint32_t mmc_send_csd(struct sdhci_host *host, struct mmc_card *card)
504{
505 struct mmc_command cmd;
506 uint32_t mmc_arg = 0;
507 uint32_t mmc_ret = 0;
508
509 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
510
511 /* CMD9 Format:
512 * [31:16] RCA
513 * [15:0] stuff bits
514 */
515 mmc_arg |= card->rca << 16;
516
517 cmd.cmd_index = CMD9_SEND_CSD;
518 cmd.argument = mmc_arg;
519 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
520 cmd.resp_type = SDHCI_CMD_RESP_R2;
521
522 /* send command */
523 mmc_ret = sdhci_send_command(host, &cmd);
524 if (mmc_ret)
525 return mmc_ret;
526
527 /* response contains the card csd */
528 memcpy(card->raw_csd, cmd.resp, sizeof(cmd.resp));
529
530 return 0;
531}
532
533/*
534 * Function: mmc select card
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700535 * Arg : host, card structure
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700536 * Return : 0 on Success, 1 on Failure
537 * Flow : Selects a card by sending CMD7 to the card with its RCA.
538 * If RCA field is set as 0 ( or any other address ),
539 * the card will be de-selected. (CMD7)
540 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700541static uint32_t mmc_select_card(struct sdhci_host *host, struct mmc_card *card)
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700542{
543 struct mmc_command cmd;
544 uint32_t mmc_arg = 0;
545 uint32_t mmc_ret = 0;
546
547 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
548
549 /* CMD7 Format:
550 * [31:16] RCA
551 * [15:0] stuff bits
552 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700553 mmc_arg |= card->rca << 16;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700554
555 cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
556 cmd.argument = mmc_arg;
557 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
558
559 /* If we are deselecting card, we do not get response */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700560 if (card->rca) {
561 if (MMC_CARD_SD(card))
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700562 cmd.resp_type = SDHCI_CMD_RESP_R1B;
563 else
564 cmd.resp_type = SDHCI_CMD_RESP_R1;
565 } else
566 cmd.resp_type = SDHCI_CMD_RESP_NONE;
567
568 /* send command */
569 mmc_ret = sdhci_send_command(host, &cmd);
570 if (mmc_ret)
571 return mmc_ret;
572
573 return 0;
574}
575
576/*
577 * Function: mmc set block len
578 * Arg : host, card structure & block length
579 * Return : 0 on Success, 1 on Failure
580 * Flow : Send command to set block length.
581 */
582static uint32_t mmc_set_block_len(struct sdhci_host *host,
583 struct mmc_card *card,
584 uint32_t block_len)
585{
586 struct mmc_command cmd;
587 uint32_t mmc_ret = 0;
588
589 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
590
591 /* CMD16 Format:
592 * [31:0] block length
593 */
594
595 cmd.cmd_index = CMD16_SET_BLOCKLEN;
596 cmd.argument = block_len;
597 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
598 cmd.resp_type = SDHCI_CMD_RESP_R1;
599
600 /* send command */
601 mmc_ret = sdhci_send_command(host, &cmd);
602 if (mmc_ret)
603 return mmc_ret;
604
605 /*
606 * If blocklength is larger than 512 bytes,
607 * the card sets BLOCK_LEN_ERROR bit.
608 */
609 if (cmd.resp[0] & MMC_R1_BLOCK_LEN_ERR) {
610 dprintf(CRITICAL, "The block length is not supported by the card\n");
611 return 1;
612 }
613
614 return 0;
615}
616
617/*
618 * Function: mmc get card status
619 * Arg : host, card structure & o/p argument card status
620 * Return : 0 on Success, 1 on Failure
621 * Flow : Get the current status of the card
622 */
623static uint32_t mmc_get_card_status(struct sdhci_host *host,
624 struct mmc_card *card, uint32_t *status)
625{
626 struct mmc_command cmd;
627 uint32_t mmc_ret = 0;
628
629 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
630
631 /* CMD13 Format:
632 * [31:16] RCA
633 * [15:0] stuff bits
634 */
635 cmd.cmd_index = CMD13_SEND_STATUS;
636 cmd.argument = card->rca << 16;
637 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
638 cmd.resp_type = SDHCI_CMD_RESP_R1;
639
640 /* send command */
641 mmc_ret = sdhci_send_command(host, &cmd);
642 if (mmc_ret)
643 return mmc_ret;
644
645 /* Checking ADDR_OUT_OF_RANGE error in CMD13 response */
646 if ((cmd.resp[0] >> 31) & 0x01)
647 return 1;
648
649 *status = cmd.resp[0];
650 return 0;
651}
652
653/*
654 * Function: mmc get ext csd
655 * Arg : host, card structure & array to hold ext attributes
656 * Return : 0 on Success, 1 on Failure
657 * Flow : Send ext csd command & get the card attributes
658 */
659static uint32_t mmc_get_ext_csd(struct sdhci_host *host, struct mmc_card *card)
660{
661 struct mmc_command cmd;
662 uint32_t mmc_ret = 0;
663
664 card->ext_csd = memalign(CACHE_LINE, ROUNDUP(512, CACHE_LINE));
665
666 ASSERT(card->ext_csd);
667
668 memset(card->ext_csd, 0, sizeof(card->ext_csd));
669
670 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
671
672 /* CMD8 */
673 cmd.cmd_index = CMD8_SEND_EXT_CSD;
674 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
675 cmd.resp_type = SDHCI_CMD_RESP_R1;
676 cmd.data.data_ptr = card->ext_csd;
677 cmd.data.num_blocks = 1;
678 cmd.data_present = 0x1;
679 cmd.trans_mode = SDHCI_MMC_READ;
680
681 /* send command */
682 mmc_ret = sdhci_send_command(host, &cmd);
683 if (mmc_ret)
684 return mmc_ret;
685
686 return mmc_ret;
687}
688
689/*
690 * Function: mmc switch command
691 * Arg : Host, card structure, access mode, index & value to be set
692 * Return : 0 on Success, 1 on Failure
693 * Flow : Send switch command to the card to set the ext attribute @ index
694 */
695static uint32_t mmc_switch_cmd(struct sdhci_host *host, struct mmc_card *card,
696 uint32_t access, uint32_t index, uint32_t value)
697{
698
699 struct mmc_command cmd;
700 uint32_t mmc_ret = 0;
701 uint32_t mmc_status;
702
703 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
704
705 /* CMD6 Format:
706 * [31:26] set to 0
707 * [25:24] access
708 * [23:16] index
709 * [15:8] value
710 * [7:3] set to 0
711 * [2:0] cmd set
712 */
713 cmd.cmd_index = CMD6_SWITCH_FUNC;
714 cmd.argument |= (access << 24);
715 cmd.argument |= (index << 16);
716 cmd.argument |= (value << 8);
717 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
718 cmd.resp_type = SDHCI_CMD_RESP_R1B;
719
720 mmc_ret = sdhci_send_command(host, &cmd);
721 if (mmc_ret) {
722 dprintf(CRITICAL, "CMD6 send failed\n");
723 return mmc_ret;
724 }
725
726 /* Check if the card completed the switch command processing */
727 mmc_ret = mmc_get_card_status(host, card, &mmc_status);
728 if (mmc_ret) {
729 dprintf(CRITICAL, "Get card status failed\n");
730 return mmc_ret;
731 }
732
733 if (MMC_CARD_STATUS(mmc_status) != MMC_TRAN_STATE) {
734 dprintf(CRITICAL, "Switch cmd failed. Card not in tran state\n");
735 mmc_ret = 1;
736 }
737
738 if (mmc_status & MMC_SWITCH_FUNC_ERR_FLAG) {
739 dprintf(CRITICAL, "Switch cmd failed. Switch Error.\n");
740 mmc_ret = 1;
741 }
742
743 return mmc_ret;
744}
745
746/*
747 * Function: mmc set bus width
748 * Arg : Host, card structure & width
749 * Return : 0 on Success, 1 on Failure
750 * Flow : Send switch command to set bus width
751 */
752static uint32_t mmc_set_bus_width(struct sdhci_host *host,
753 struct mmc_card *card,
754 uint32_t width)
755{
756 uint32_t mmc_ret = 0;
757
758 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE,
759 MMC_EXT_MMC_BUS_WIDTH, width);
760
761 if (mmc_ret) {
762 dprintf(CRITICAL, "Switch cmd failed\n");
763 return mmc_ret;
764 }
765
766 return 0;
767}
768
769
770/*
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -0700771 * Function: mmc card supports hs400 mode
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700772 * Arg : None
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -0700773 * Return : 1 if hs400 mode is supported, 0 otherwise
774 * Flow : Check the ext csd attributes of the card
775 */
776static uint8_t mmc_card_supports_hs400_mode(struct mmc_card *card)
777{
778 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_HS400_MODE)
779 return 1;
780 else
781 return 0;
782}
783
784/*
785 * Function: mmc card supports hs200 mode
786 * Arg : None
787 * Return : 1 if HS200 mode is supported, 0 otherwise
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700788 * Flow : Check the ext csd attributes of the card
789 */
790static uint8_t mmc_card_supports_hs200_mode(struct mmc_card *card)
791{
792 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_HS200_MODE)
793 return 1;
794 else
795 return 0;
796}
797
798/*
799 * Function: mmc card supports ddr mode
800 * Arg : None
801 * Return : 1 if DDR mode is supported, 0 otherwise
802 * Flow : Check the ext csd attributes of the card
803 */
804static uint8_t mmc_card_supports_ddr_mode(struct mmc_card *card)
805{
806 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_DDR_MODE)
807 return 1;
808 else
809 return 0;
810}
811
812/*
813 * Function : Enable HS200 mode
814 * Arg : Host, card structure and bus width
815 * Return : 0 on Success, 1 on Failure
816 * Flow :
817 * - Set the bus width to 4/8 bit SDR as supported by the target & host
818 * - Set the HS_TIMING on ext_csd 185 for the card
819 */
820static uint32_t mmc_set_hs200_mode(struct sdhci_host *host,
821 struct mmc_card *card, uint32_t width)
822{
823 uint32_t mmc_ret = 0;
824
Channagoud Kadabifd96a0b2014-03-31 15:26:00 -0700825 DBG("\n Enabling HS200 Mode Start\n");
826
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700827 /* Set 4/8 bit SDR bus width */
828 mmc_ret = mmc_set_bus_width(host, card, width);
829 if (mmc_ret) {
830 dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
831 card->rca);
832 return mmc_ret;
833 }
834
835 /* Setting HS200 in HS_TIMING using EXT_CSD (CMD6) */
836 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, MMC_HS200_TIMING);
837
838 if (mmc_ret) {
839 dprintf(CRITICAL, "Switch cmd returned failure %d\n", __LINE__);
840 return mmc_ret;
841 }
842
Channagoud Kadabi1b737632013-11-20 12:46:15 -0800843 /* Enable SDR104 mode in controller */
844 sdhci_set_uhs_mode(host, SDHCI_SDR104_MODE);
845
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -0700846 /* Run the clock @ 400 Mhz */
Channagoud Kadabi3f428532014-01-28 21:33:34 -0800847 if (host->caps.hs400_support && mmc_card_supports_hs400_mode(card))
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -0700848 {
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -0700849 /* Save the timing value, before changing the clock */
850 MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
Channagoud Kadabi41d78642014-03-12 17:16:39 -0700851 /*
852 * Set the MCI_CLK divider before changing the sdcc core
853 * core clk to ensure card receives no more than 200 MHZ
854 * clock frequency
855 */
856 sdhci_msm_set_mci_clk(host);
857 clock_config_mmc(host->msm_host->slot, SDHCI_CLK_400MHZ);
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -0700858 }
859 else
860 {
861 /* Save the timing value, before changing the clock */
862 MMC_SAVE_TIMING(host, MMC_HS200_TIMING);
863 }
864
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -0700865 /* Execute Tuning for hs200 mode */
866 if ((mmc_ret = sdhci_msm_execute_tuning(host, width)))
867 dprintf(CRITICAL, "Tuning for hs200 failed\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700868
Channagoud Kadabifd96a0b2014-03-31 15:26:00 -0700869 DBG("\n Enabling HS200 Mode Done\n");
870
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700871 return mmc_ret;
872}
873
874/*
875 * Function: mmc set ddr mode
876 * Arg : Host & card structure
877 * Return : 0 on Success, 1 on Failure
878 * Flow : Set bus width for ddr mode & set controller in DDR mode
879*/
880static uint8_t mmc_set_ddr_mode(struct sdhci_host *host, struct mmc_card *card)
881{
882 uint8_t mmc_ret = 0;
883
Channagoud Kadabifd96a0b2014-03-31 15:26:00 -0700884 DBG("\n Enabling DDR Mode Start\n");
885
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700886 /* Set width for 8 bit DDR mode by default */
887 mmc_ret = mmc_set_bus_width(host, card, DATA_DDR_BUS_WIDTH_8BIT);
888
889 if (mmc_ret) {
890 dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
891 card->rca);
892 return mmc_ret;
893 }
894
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -0700895 /* Save the timing value, before changing the clock */
896 MMC_SAVE_TIMING(host, SDHCI_DDR50_MODE);
897
898 /* Set the DDR mode in controller */
899 sdhci_set_uhs_mode(host, SDHCI_DDR50_MODE);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700900
Channagoud Kadabifd96a0b2014-03-31 15:26:00 -0700901 DBG("\n Enabling DDR Mode Done\n");
902
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700903 return 0;
904}
905
906/*
907 * Function: mmc set high speed interface
908 * Arg : Host & card structure
909 * Return : None
910 * Flow : Sets the sdcc clock & clock divider in the host controller
911 * Adjust the interface speed to optimal speed
912 */
913static uint32_t mmc_set_hs_interface(struct sdhci_host *host,
914 struct mmc_card *card)
915{
916 uint32_t mmc_ret = 0;
917
918 /* Setting HS_TIMING in EXT_CSD (CMD6) */
919 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE,
920 MMC_EXT_MMC_HS_TIMING, MMC_HS_TIMING);
921
922 if (mmc_ret) {
923 dprintf(CRITICAL, "Switch cmd returned failure %d\n", __LINE__);
924 return mmc_ret;
925 }
926
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -0700927 /* Save the timing value, before changing the clock */
928 MMC_SAVE_TIMING(host, SDHCI_SDR25_MODE);
929
930 /* Set the SDR25 mode in controller */
931 sdhci_set_uhs_mode(host, SDHCI_SDR25_MODE);
932
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700933 return 0;
934}
935
936/*
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -0700937 * Function : Enable HS400 mode
938 * Arg : Host, card structure and bus width
939 * Return : 0 on Success, 1 on Failure
940 * Flow :
941 * - Set the bus width to 8 bit DDR
942 * - Set the HS_TIMING on ext_csd 185 for the card
943 */
944uint32_t mmc_set_hs400_mode(struct sdhci_host *host,
945 struct mmc_card *card, uint32_t width)
946{
947 uint32_t mmc_ret = 0;
948
949 /*
950 * Emmc 5.0 spec does not allow changing to hs400 mode directly
951 * Need to follow the sequence to change to hs400 mode
952 * 1. Enable HS200 mode, perform tuning
953 * 2. Change to high speed mode
954 * 3. Enable DDR mode
955 * 4. Enable HS400 mode & execute tuning
956 */
957
Channagoud Kadabifd96a0b2014-03-31 15:26:00 -0700958 DBG("\n Enabling HS400 Mode Start\n");
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -0700959 /* HS400 mode is supported only in DDR 8-bit */
960 if (width != DATA_BUS_WIDTH_8BIT)
961 {
962 dprintf(CRITICAL, "Bus width is not 8-bit, cannot switch to hs400: %u\n", width);
963 return 1;
964 }
965
966 /* 1.Enable HS200 mode */
967 mmc_ret = mmc_set_hs200_mode(host, card, width);
968
969 if (mmc_ret)
970 {
971 dprintf(CRITICAL, "Failure Setting HS200 mode %s\t%d\n",__func__, __LINE__);
972 return mmc_ret;
973 }
974
975 /* 2. Enable High speed mode */
976 /* This is needed to set the clock to a low value &
977 * so that we can switch to hs_timing --> 0x1 */
978 /* Save the timing value, before changing the clock */
979 MMC_SAVE_TIMING(host, SDHCI_SDR12_MODE);
980 sdhci_set_uhs_mode(host, SDHCI_SDR12_MODE);
981
982 /* 3. Set HS_TIMING to 0x1 */
983 mmc_ret = mmc_set_hs_interface(host, card);
984 if (mmc_ret)
985 {
986 dprintf(CRITICAL, "Error adjusting interface speed!:%s\t%d\n", __func__, __LINE__);
987 return mmc_ret;
988 }
989
990 /*4. Enable DDR mode */
991 mmc_ret = mmc_set_ddr_mode(host, card);
992 if (mmc_ret)
993 {
994 dprintf(CRITICAL, "Failure setting DDR mode:%s\t%d\n", __func__, __LINE__);
995 return mmc_ret;
996 }
997
998 /*5. Set hs400 timing */
999 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, MMC_HS400_TIMING);
1000
1001 if (mmc_ret)
1002 {
1003 dprintf(CRITICAL, "Switch cmd returned failure %s\t%d\n",__func__, __LINE__);
1004 return mmc_ret;
1005 }
1006
1007 /* 6. Enable SDR104 mode in controller */
1008 /* Save the timing value, before changing the clock */
1009 MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
1010 sdhci_set_uhs_mode(host, SDHCI_SDR104_MODE);
Channagoud Kadabi41d78642014-03-12 17:16:39 -07001011 /*
1012 * Enable HS400 mode
1013 */
1014 sdhci_msm_set_mci_clk(host);
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -07001015
1016 /* 7. Execute Tuning for hs400 mode */
1017 if ((mmc_ret = sdhci_msm_execute_tuning(host, width)))
1018 dprintf(CRITICAL, "Tuning for hs400 failed\n");
1019
Channagoud Kadabifd96a0b2014-03-31 15:26:00 -07001020 DBG("\n Enabling HS400 Mode Done\n");
1021
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -07001022 return mmc_ret;
1023}
1024
1025/*
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001026 * Function: mmc_host_init
1027 * Arg : mmc device structure
1028 * Return : 0 on success, 1 on Failure
1029 * Flow : Initialize the host contoller
1030 * Set the clock rate to 400 KHZ for init
1031 */
1032static uint8_t mmc_host_init(struct mmc_device *dev)
1033{
1034 uint8_t mmc_ret = 0;
1035
1036 struct sdhci_host *host;
1037 struct mmc_config_data *cfg;
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -07001038 struct sdhci_msm_data *data;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001039
1040 event_t sdhc_event;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001041
1042 host = &dev->host;
1043 cfg = &dev->config;
1044
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001045 event_init(&sdhc_event, false, EVENT_FLAG_AUTOUNSIGNAL);
1046
1047 host->base = cfg->sdhc_base;
1048 host->sdhc_event = &sdhc_event;
Aparna Mallavarapuc6414522014-03-07 07:12:44 +05301049 host->caps.hs400_support = cfg->hs400_support;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001050
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -07001051 data = (struct sdhci_msm_data *) malloc(sizeof(struct sdhci_msm_data));
1052 ASSERT(data);
1053
1054 data->sdhc_event = &sdhc_event;
1055 data->pwrctl_base = cfg->pwrctl_base;
1056 data->pwr_irq = cfg->pwr_irq;
1057 data->slot = cfg->slot;
1058
1059 host->msm_host = data;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001060
Channagoud Kadabi4b2f9672013-08-08 17:44:03 -07001061 /* Initialize any clocks needed for SDC controller */
1062 clock_init_mmc(cfg->slot);
1063
1064 clock_config_mmc(cfg->slot, cfg->max_clk_rate);
1065
Channagoud Kadabifd96a0b2014-03-31 15:26:00 -07001066 /* Configure the CDC clocks needed for emmc storage
1067 * we use slot '1' for emmc
1068 */
1069 if (cfg->slot == 1)
1070 clock_config_cdc(cfg->slot);
1071
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001072 /*
1073 * MSM specific sdhc init
1074 */
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -07001075 sdhci_msm_init(host, data);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001076
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001077 /*
1078 * Initialize the controller, read the host capabilities
1079 * set power on mode
1080 */
1081 sdhci_init(host);
1082
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001083 /* Setup initial freq to 400KHz */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001084 mmc_ret = sdhci_clk_supply(host, SDHCI_CLK_400KHZ);
1085
1086 return mmc_ret;
1087}
1088
1089/*
1090 * Function: mmc identify card
1091 * Arg : host & card structure
1092 * Return : 0 on Success, 1 on Failure
1093 * Flow : Performs card identification process:
1094 * 1. Get card's unique identification number (CID)
1095 * 2. Get(for sd)/set (for mmc) relative card address (RCA)
1096 * 3. Select the card to put it in TRAN state
1097 */
1098static uint32_t mmc_identify_card(struct sdhci_host *host, struct mmc_card *card)
1099{
1100 uint32_t mmc_return = 0;
1101 uint32_t raw_csd[4];
1102
1103 /* Ask card to send its unique card identification (CID) number (CMD2) */
1104 mmc_return = mmc_all_send_cid(host, card);
1105 if (mmc_return) {
1106 dprintf(CRITICAL,"Failure getting card's CID number!\n");
1107 return mmc_return;
1108 }
1109
1110 /* Ask card to send a relative card address (RCA) (CMD3) */
1111 mmc_return = mmc_send_relative_address(host, card);
1112 if (mmc_return) {
1113 dprintf(CRITICAL, "Failure getting card's RCA!\n");
1114 return mmc_return;
1115 }
1116
1117 /* Get card's CSD register (CMD9) */
1118 mmc_return = mmc_send_csd(host, card);
1119 if (mmc_return) {
1120 dprintf(CRITICAL,"Failure getting card's CSD information!\n");
1121 return mmc_return;
1122 }
1123
1124 /* Select the card (CMD7) */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001125 mmc_return = mmc_select_card(host, card);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001126 if (mmc_return) {
1127 dprintf(CRITICAL, "Failure selecting the Card with RCA: %x\n",card->rca);
1128 return mmc_return;
1129 }
1130
1131 /* Set the card status as active */
1132 card->status = MMC_STATUS_ACTIVE;
1133
1134 return 0;
1135}
1136
1137/*
1138 * Function: mmc_reset_card_and_send_op
1139 * Arg : Host & Card structure
1140 * Return : 0 on Success, 1 on Failure
1141 * Flow : Routine to initialize MMC card. It resets a card to idle state,
1142 * verify operating voltage and set the card in ready state.
1143 */
1144static uint32_t mmc_reset_card_and_send_op(struct sdhci_host *host, struct mmc_card *card)
1145{
1146 uint32_t mmc_return = 0;
1147
1148 /* 1. Card Reset - CMD0 */
1149 mmc_return = mmc_reset_card(host);
1150 if (mmc_return) {
1151 dprintf(CRITICAL, "Failure resetting MMC cards!\n");
1152 return mmc_return;
1153 }
1154
1155 /* 2. Card Initialization process */
1156
1157 /*
1158 * Send CMD1 to identify and reject cards that do not match host's VDD range
1159 * profile. Cards sends its OCR register in response.
1160 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001161
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001162 mmc_return = mmc_send_op_cond(host, card);
1163
1164 /* OCR is not received, init could not complete */
1165 if (mmc_return) {
1166 dprintf(CRITICAL, "Failure getting OCR response from MMC Card\n");
1167 return mmc_return;
1168 }
1169
1170 return 0;
1171}
1172
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001173static uint32_t mmc_send_app_cmd(struct sdhci_host *host, struct mmc_card *card)
1174{
1175 struct mmc_command cmd = {0};
1176
1177 cmd.cmd_index = CMD55_APP_CMD;
1178 cmd.argument = (card->rca << 16);
1179 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1180 cmd.resp_type = SDHCI_CMD_RESP_R1;
1181
1182 if (sdhci_send_command(host, &cmd))
1183 {
1184 dprintf(CRITICAL, "Failed Sending CMD55\n");
1185 return 1;
1186 }
1187 return 0;
1188}
1189
1190uint32_t mmc_sd_card_init(struct sdhci_host *host, struct mmc_card *card)
1191{
1192 uint8_t i;
1193 uint32_t mmc_ret;
1194 struct mmc_command cmd;
1195
1196 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1197
1198 /* Use the SD card RCA 0x0 during init */
1199 card->rca = SD_CARD_RCA;
1200
1201 /* Send CMD8 for voltage check*/
1202 for (i = 0 ;i < SD_CMD8_MAX_RETRY; i++)
1203 {
1204 cmd.cmd_index = CMD8_SEND_IF_COND;
1205 cmd.argument = MMC_SD_HC_VOLT_SUPPLIED;
1206 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1207 cmd.resp_type = SDHCI_CMD_RESP_R7;
1208
1209 if (sdhci_send_command(host, &cmd))
1210 {
1211 dprintf(CRITICAL, "The response for CMD8 does not match the supplied value\n");
1212 return 1;
1213 }
1214 else
1215 {
1216 /* If the command response echos the voltage back */
1217 if (cmd.resp[0] == MMC_SD_HC_VOLT_SUPPLIED)
1218 break;
1219 }
1220 /* As per SDCC the spec try for max three times with
1221 * 1 ms delay
1222 */
1223 mdelay(1);
1224 }
1225
1226 if (i == SD_CMD8_MAX_RETRY && (cmd.resp[0] != MMC_SD_HC_VOLT_SUPPLIED))
1227 {
1228 dprintf(CRITICAL, "Error: CMD8 response timed out\n");
1229 return 1;
1230 }
1231
1232 /* Send ACMD41 for OCR */
1233 for (i = 0; i < SD_ACMD41_MAX_RETRY; i++)
1234 {
1235 /* Send APP_CMD before ACMD41*/
1236 if (mmc_send_app_cmd(host, card))
1237 {
1238 dprintf(CRITICAL, "Failed sending App command\n");
1239 return 1;
1240 }
1241
1242 /* APP_CMD is successful, send ACMD41 now */
1243 cmd.cmd_index = ACMD41_SEND_OP_COND;
1244 cmd.argument = MMC_SD_OCR | MMC_SD_HC_HCS;
1245 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1246 cmd.resp_type = SDHCI_CMD_RESP_R3;
1247
1248 if (sdhci_send_command(host, &cmd))
1249 {
1250 dprintf(CRITICAL, "Failure sending ACMD41\n");
1251 return 1;
1252 }
1253 else
1254 {
1255 if (cmd.resp[0] & MMC_SD_DEV_READY)
1256 {
1257 if (cmd.resp[0] & (1 << 30))
1258 card->type = MMC_CARD_TYPE_SDHC;
1259 else
1260 card->type = MMC_CARD_TYPE_STD_SD;
1261
1262 break;
1263 }
1264 }
1265 /*
1266 * As per SDCC spec try for max 1 second
1267 */
1268 mdelay(50);
1269 }
1270
1271 if (i == SD_ACMD41_MAX_RETRY && !(cmd.resp[0] & MMC_SD_DEV_READY))
1272 {
1273 dprintf(CRITICAL, "Error: ACMD41 response timed out\n");
1274 return 1;
1275 }
1276
1277 return 0;
1278}
1279
1280/*
1281 * Function to read SD card information from SD status
1282 */
1283static uint32_t mmc_sd_get_card_ssr(struct sdhci_host *host, struct mmc_card *card)
1284{
1285 BUF_DMA_ALIGN(raw_sd_status, 64);
1286 struct mmc_command cmd = {0};
1287 uint32_t sd_status[16];
1288 uint32_t *status = sd_status;
1289 uint32_t au_size;
1290 int i;
1291 int j;
1292
1293 if (mmc_send_app_cmd(host, card))
1294 {
1295 dprintf(CRITICAL, "Failed sending App command\n");
1296 return 1;
1297 }
1298
1299 cmd.cmd_index = ACMD13_SEND_SD_STATUS;
1300 cmd.argument = 0x0;
1301 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1302 cmd.resp_type = SDHCI_CMD_RESP_R2;
1303 cmd.trans_mode = SDHCI_MMC_READ;
1304 cmd.data_present = 0x1;
1305 cmd.data.data_ptr = raw_sd_status;
1306 cmd.data.num_blocks = 0x1;
1307 cmd.data.blk_sz = 0x40;
1308
1309 /* send command */
1310 if (sdhci_send_command(host, &cmd))
1311 return 1;
1312
1313 memcpy(sd_status, raw_sd_status, sizeof(sd_status));
1314
1315 for (i = 15, j = 0; i >=0 ; i--, j++)
1316 sd_status[i] = swap_endian32(sd_status[j]);
1317
1318 au_size = UNPACK_BITS(status, MMC_SD_AU_SIZE_BIT, MMC_SD_AU_SIZE_LEN, 32);
1319 /* Card AU size in sectors */
1320 card->ssr.au_size = 1 << (au_size + 4);
1321 card->ssr.num_aus = UNPACK_BITS(status, MMC_SD_ERASE_SIZE_BIT, MMC_SD_ERASE_SIZE_LEN, 32);
1322
1323 return 0;
1324}
1325
1326/*
1327 * Function to read the SD CARD configuration register
1328 */
1329static uint32_t mmc_sd_get_card_scr(struct sdhci_host *host, struct mmc_card *card)
1330{
1331 BUF_DMA_ALIGN(scr_resp, 8);
1332 struct mmc_command cmd = {0};
1333 uint32_t raw_scr[2];
1334
1335 /* Now read the SCR register */
1336 /* Send APP_CMD before ACMD51*/
1337 if (mmc_send_app_cmd(host, card))
1338 {
1339 dprintf(CRITICAL, "Failed sending App command\n");
1340 return 1;
1341 }
1342
1343 cmd.cmd_index = ACMD51_READ_CARD_SCR;
1344 cmd.argument = 0x0;
1345 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1346 cmd.resp_type = SDHCI_CMD_RESP_R1;
1347 cmd.trans_mode = SDHCI_MMC_READ;
1348 cmd.data_present = 0x1;
1349 cmd.data.data_ptr = scr_resp;
1350 cmd.data.num_blocks = 0x1;
1351 cmd.data.blk_sz = 0x8;
1352
1353 /* send command */
1354 if (sdhci_send_command(host, &cmd))
1355 return 1;
1356
1357 memcpy(raw_scr, scr_resp, sizeof(raw_scr));
1358
1359 card->raw_scr[0] = swap_endian32(raw_scr[0]);
1360 card->raw_scr[1] = swap_endian32(raw_scr[1]);
1361
1362 /*
1363 * Parse & Populate the SCR data as per sdcc spec
1364 */
1365 card->scr.bus_widths = (card->raw_scr[0] & SD_SCR_BUS_WIDTH_MASK) >> SD_SCR_BUS_WIDTH;
1366 card->scr.cmd23_support = (card->raw_scr[0] & SD_SCR_CMD23_SUPPORT);
1367 card->scr.sd_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC_MASK) >> SD_SCR_SD_SPEC;
1368 card->scr.sd3_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC3_MASK) >> SD_SCR_SD_SPEC3;
1369
1370 return 0;
1371}
1372
1373/*
1374 * Function: mmc_set_sd_bus_width
1375 * Arg : host, device structure & width
1376 * Return : 0 on Success, 1 on Failure
1377 * Flow : Set the bus width for the card
1378 */
1379uint32_t mmc_sd_set_bus_width(struct sdhci_host *host, struct mmc_card *card, uint8_t width)
1380{
1381 struct mmc_command cmd = {0};
1382
1383 /* Send APP_CMD before ACMD6*/
1384 if (mmc_send_app_cmd(host, card))
1385 {
1386 dprintf(CRITICAL, "Failed sending App command\n");
1387 return 1;
1388 }
1389
1390 cmd.cmd_index = ACMD6_SET_BUS_WIDTH;
1391 cmd.argument = (width == DATA_BUS_WIDTH_4BIT) ? (1<<1) : 0;
1392 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1393 cmd.resp_type = SDHCI_CMD_RESP_R1;
1394
1395 /* send command */
1396 if (sdhci_send_command(host, &cmd))
1397 return 1;
1398
1399 return 0;
1400}
1401
1402uint32_t mmc_sd_set_hs(struct sdhci_host *host, struct mmc_card *card)
1403{
1404 struct mmc_command cmd = {0};
1405 BUF_DMA_ALIGN(switch_resp, 64);
1406
1407 cmd.cmd_index = CMD6_SWITCH_FUNC;
1408 cmd.argument = MMC_SD_SWITCH_HS;
1409 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1410 cmd.resp_type = SDHCI_CMD_RESP_R1;
1411 cmd.trans_mode = SDHCI_MMC_READ;
1412 cmd.data_present = 0x1;
1413 cmd.data.data_ptr = switch_resp;
1414 cmd.data.num_blocks = 0x1;
1415 cmd.data.blk_sz = 0x40;
1416
1417 /* send command */
1418 if (sdhci_send_command(host, &cmd))
1419 return 1;
1420
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -07001421 /* Set the SDR25 mode in controller*/
1422 sdhci_set_uhs_mode(host, SDHCI_SDR25_MODE);
1423
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001424 return 0;
1425}
1426
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001427/*
1428 * Function: mmc_init_card
1429 * Arg : mmc device structure
1430 * Return : 0 on Success, 1 on Failure
1431 * Flow : Performs initialization and identification of eMMC cards connected
1432 * to the host.
1433 */
1434
1435static uint32_t mmc_card_init(struct mmc_device *dev)
1436{
1437 uint32_t mmc_return = 0;
1438 uint32_t status;
1439 uint8_t bus_width = 0;
1440
1441 struct sdhci_host *host;
1442 struct mmc_card *card;
1443 struct mmc_config_data *cfg;
1444
1445 host = &dev->host;
1446 card = &dev->card;
1447 cfg = &dev->config;
1448
1449 /* Initialize MMC card structure */
1450 card->status = MMC_STATUS_INACTIVE;
1451
1452 /* TODO: Get the OCR params from target */
1453 card->ocr = MMC_OCR_27_36 | MMC_OCR_SEC_MODE;
1454
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001455 /* Initialize the internal MMC */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001456 mmc_return = mmc_reset_card_and_send_op(host, card);
1457 if (mmc_return)
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001458 {
1459 dprintf(CRITICAL, "MMC card failed to respond, try for SD card\n");
1460 /* Reset the card & get the OCR */
1461 mmc_return = mmc_sd_card_init(host, card);
1462 if (mmc_return)
1463 {
1464 dprintf(CRITICAL, "Failed to initialize SD card\n");
1465 return mmc_return;
1466 }
1467 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001468
1469 /* Identify (CMD2, CMD3 & CMD9) and select the card (CMD7) */
1470 mmc_return = mmc_identify_card(host, card);
1471 if (mmc_return)
1472 return mmc_return;
1473
1474 /* set interface speed */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001475 if (MMC_CARD_SD(card))
1476 {
1477 mmc_return = mmc_sd_set_hs(host, card);
1478 if (mmc_return)
1479 {
1480 dprintf(CRITICAL, "Failed to set HS for SD card\n");
1481 return mmc_return;
1482 }
1483 }
1484 else
1485 {
1486 mmc_return = mmc_set_hs_interface(host, card);
1487 if (mmc_return) {
1488 dprintf(CRITICAL, "Error adjusting interface speed!\n");
1489 return mmc_return;
1490 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001491 }
1492
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001493 /* Now get the extended CSD for the card */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001494 if (MMC_CARD_MMC(card))
1495 {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001496 /* For MMC cards, also get the extended csd */
1497 mmc_return = mmc_get_ext_csd(host, card);
1498
1499 if (mmc_return) {
1500 dprintf(CRITICAL, "Failure getting card's ExtCSD information!\n");
1501 return mmc_return;
1502 }
1503 }
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001504 else
1505 {
1506 /*Read SCR for sd card */
1507 if (mmc_sd_get_card_scr(host, card))
1508 {
1509 dprintf(CRITICAL, "Failure getting card's SCR register\n");
1510 return 1;
1511 }
1512 /* Read SSR for the SD card */
1513 if (mmc_sd_get_card_ssr(host, card))
1514 {
1515 dprintf(CRITICAL, "Failed to get SSR from the card\n");
1516 return 1;
1517 }
1518 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001519
1520 /* Decode and save the CSD register */
1521 mmc_return = mmc_decode_and_save_csd(card);
1522 if (mmc_return) {
1523 dprintf(CRITICAL, "Failure decoding card's CSD information!\n");
1524 return mmc_return;
1525 }
1526
1527
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001528 if (MMC_CARD_MMC(card))
1529 {
1530 /* Set the bus width based on host, target capbilities */
1531 if (cfg->bus_width == DATA_BUS_WIDTH_8BIT && host->caps.bus_width_8bit)
1532 bus_width = DATA_BUS_WIDTH_8BIT;
1533 /*
1534 * Host contoller by default supports 4 bit & 1 bit mode.
1535 * No need to check for host support here
1536 */
1537 else if (cfg->bus_width == DATA_BUS_WIDTH_4BIT)
1538 bus_width = DATA_BUS_WIDTH_4BIT;
1539 else
1540 bus_width = DATA_BUS_WIDTH_1BIT;
1541
1542 /* Set 4/8 bit SDR bus width in controller */
1543 mmc_return = sdhci_set_bus_width(host, bus_width);
1544
1545 if (mmc_return) {
1546 dprintf(CRITICAL, "Failed to set bus width for host controller\n");
1547 return 1;
1548 }
1549
1550 /* Enable high speed mode in the follwing order:
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -07001551 * 1. HS400 mode if supported by host & card
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001552 * 1. HS200 mode if supported by host & card
1553 * 2. DDR mode host, if supported by host & card
1554 * 3. Use normal speed mode with supported bus width
1555 */
Channagoud Kadabi3f428532014-01-28 21:33:34 -08001556 if (host->caps.hs400_support && mmc_card_supports_hs400_mode(card))
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -07001557 {
1558 mmc_return = mmc_set_hs400_mode(host, card, bus_width);
1559 if (mmc_return)
1560 {
1561 dprintf(CRITICAL, "Failure to set HS400 mode for Card(RCA:%x)\n",
1562 card->rca);
1563 return mmc_return;
1564 }
1565 }
Channagoud Kadabi3f428532014-01-28 21:33:34 -08001566 else if (host->caps.sdr104_support && mmc_card_supports_hs200_mode(card))
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -07001567 {
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001568 mmc_return = mmc_set_hs200_mode(host, card, bus_width);
1569
1570 if (mmc_return) {
1571 dprintf(CRITICAL, "Failure to set HS200 mode for Card(RCA:%x)\n",
1572 card->rca);
1573 return mmc_return;
1574 }
Channagoud Kadabi3f428532014-01-28 21:33:34 -08001575 } else if (host->caps.ddr_support && mmc_card_supports_ddr_mode(card)) {
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001576 mmc_return = mmc_set_ddr_mode(host, card);
1577
1578 if (mmc_return) {
1579 dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
1580 card->rca);
1581 return mmc_return;
1582 }
1583 } else {
1584 /* Set 4/8 bit bus width for the card */
1585 mmc_return = mmc_set_bus_width(host, card, bus_width);
1586 if (mmc_return) {
1587 dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
1588 card->rca);
1589 return mmc_return;
1590 }
1591 }
1592 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001593 else
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001594 {
1595 /* Check the supported bus width for the card from SCR register */
1596 if (card->scr.bus_widths & SD_SCR_WIDTH_4BIT)
1597 bus_width = DATA_BUS_WIDTH_4BIT;
1598 else
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001599 bus_width = DATA_BUS_WIDTH_1BIT;
1600
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001601 mmc_return = mmc_sd_set_bus_width(host, card, bus_width);
1602 if (mmc_return)
1603 {
1604 dprintf(CRITICAL, "Failed to set bus width for the card\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001605 return mmc_return;
1606 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001607
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001608 /* Set bit SDR bus width in controller */
1609 mmc_return = sdhci_set_bus_width(host, bus_width);
1610 if (mmc_return)
1611 {
1612 dprintf(CRITICAL, "Failed to set bus width for host controller\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001613 return mmc_return;
1614 }
1615 }
1616
1617
1618 /* Verify TRAN state after changing speed and bus width */
1619 mmc_return = mmc_get_card_status(host, card, &status);
1620 if (mmc_return)
1621 return mmc_return;
1622
1623 if (MMC_CARD_STATUS(status) != MMC_TRAN_STATE)
1624 mmc_return = 1;
1625
Channagoud Kadabi57eb6302013-09-10 14:21:30 -07001626 card->block_size = MMC_BLK_SZ;
1627
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001628 return mmc_return;
1629}
1630
1631/*
1632 * Function: mmc display csd
1633 * Arg : None
1634 * Return : None
1635 * Flow : Displays the csd information
1636 */
1637static void mmc_display_csd(struct mmc_card *card)
1638{
1639 dprintf(SPEW, "erase_grpsize: %d\n", card->csd.erase_grp_size);
1640 dprintf(SPEW, "erase_grpmult: %d\n", card->csd.erase_grp_mult);
1641 dprintf(SPEW, "wp_grpsize: %d\n", card->csd.wp_grp_size);
1642 dprintf(SPEW, "wp_grpen: %d\n", card->csd.wp_grp_enable);
1643 dprintf(SPEW, "perm_wp: %d\n", card->csd.perm_wp);
1644 dprintf(SPEW, "temp_wp: %d\n", card->csd.temp_wp);
1645}
1646
1647/*
1648 * Function: mmc_init
1649 * Arg : MMC configuration data
1650 * Return : Pointer to mmc device
1651 * Flow : Entry point to MMC boot process
1652 * Initialize the sd host controller
1653 * Initialize the mmc card
1654 * Set the clock & high speed mode
1655 */
1656struct mmc_device *mmc_init(struct mmc_config_data *data)
1657{
1658 uint8_t mmc_ret = 0;
1659 struct mmc_device *dev;
1660
1661 dev = (struct mmc_device *) malloc (sizeof(struct mmc_device));
1662
1663 if (!dev) {
1664 dprintf(CRITICAL, "Error allocating mmc device\n");
1665 return NULL;
1666 }
1667
1668 ASSERT(data);
1669
1670 memcpy((void*)&dev->config, (void*)data, sizeof(struct mmc_config_data));
1671
1672 memset((struct mmc_card *)&dev->card, 0, sizeof(struct mmc_card));
1673
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001674 /* Initialize the host & clock */
1675 dprintf(SPEW, " Initializing MMC host data structure and clock!\n");
1676
1677 mmc_ret = mmc_host_init(dev);
1678 if (mmc_ret) {
1679 dprintf(CRITICAL, "Error Initializing MMC host : %u\n", mmc_ret);
1680 return NULL;
1681 }
1682
1683 /* Initialize and identify cards connected to host */
1684 mmc_ret = mmc_card_init(dev);
1685 if (mmc_ret) {
1686 dprintf(CRITICAL, "Failed detecting MMC/SDC @ slot%d\n",
1687 dev->config.slot);
1688 return NULL;
1689 }
1690
1691 dprintf(INFO, "Done initialization of the card\n");
1692
1693 mmc_display_csd(&dev->card);
1694
1695 return dev;
1696}
1697
1698/*
1699 * Function: mmc sdhci read
1700 * Arg : mmc device structure, block address, number of blocks & destination
1701 * Return : 0 on Success, non zero on success
1702 * Flow : Fill in the command structure & send the command
1703 */
1704uint32_t mmc_sdhci_read(struct mmc_device *dev, void *dest,
1705 uint64_t blk_addr, uint32_t num_blocks)
1706{
1707 uint32_t mmc_ret = 0;
1708 struct mmc_command cmd;
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -07001709 struct mmc_card *card = &dev->card;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001710
1711 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1712
1713 /* CMD17/18 Format:
1714 * [31:0] Data Address
1715 */
1716 if (num_blocks == 1)
1717 cmd.cmd_index = CMD17_READ_SINGLE_BLOCK;
1718 else
1719 cmd.cmd_index = CMD18_READ_MULTIPLE_BLOCK;
1720
Channagoud Kadabi0c2d4002013-12-20 11:17:45 -08001721 /*
1722 * Standard emmc cards use byte mode addressing
1723 * convert the block address to byte address before
1724 * sending the command
1725 */
1726 if (card->type == MMC_TYPE_STD_MMC)
1727 cmd.argument = blk_addr * card->block_size;
1728 else
1729 cmd.argument = blk_addr;
1730
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001731 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1732 cmd.resp_type = SDHCI_CMD_RESP_R1;
1733 cmd.trans_mode = SDHCI_MMC_READ;
1734 cmd.data_present = 0x1;
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -07001735
1736 /* Use CMD23 If card supports CMD23:
1737 * For SD card use the value read from SCR register
1738 * For emmc by default use CMD23.
1739 * Also as per SDCC spec always use CMD23 to stop
1740 * multiblock read/write if UHS (Ultra High Speed) is
1741 * enabled
1742 */
1743 if (MMC_CARD_SD(card))
1744 cmd.cmd23_support = dev->card.scr.cmd23_support;
1745 else
1746 cmd.cmd23_support = 0x1;
1747
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001748 cmd.data.data_ptr = dest;
1749 cmd.data.num_blocks = num_blocks;
1750
1751 /* send command */
1752 mmc_ret = sdhci_send_command(&dev->host, &cmd);
1753 if (mmc_ret) {
1754 return mmc_ret;
1755 }
1756
1757 /* Response contains 32 bit Card status. Here we'll check
1758 BLOCK_LEN_ERROR and ADDRESS_ERROR */
1759 if (cmd.resp[0] & MMC_R1_BLOCK_LEN_ERR) {
1760 dprintf(CRITICAL, "The transferred bytes does not match the block length\n");
1761 return 1;
1762 }
1763
1764 /* Misaligned address not matching block length */
1765 if (cmd.resp[0] & MMC_R1_ADDR_ERR) {
1766 dprintf(CRITICAL, "The misaligned address did not match the block length used\n");
1767 return 1;
1768 }
1769
1770 if (MMC_CARD_STATUS(cmd.resp[0]) != MMC_TRAN_STATE) {
1771 dprintf(CRITICAL, "MMC read failed, card is not in TRAN state\n");
1772 return 1;
1773 }
1774
1775 return mmc_ret;
1776}
1777
1778/*
1779 * Function: mmc sdhci write
1780 * Arg : mmc device structure, block address, number of blocks & source
1781 * Return : 0 on Success, non zero on success
1782 * Flow : Fill in the command structure & send the command
1783 */
1784uint32_t mmc_sdhci_write(struct mmc_device *dev, void *src,
1785 uint64_t blk_addr, uint32_t num_blocks)
1786{
1787 uint32_t mmc_ret = 0;
1788 struct mmc_command cmd;
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -07001789 struct mmc_card *card = &dev->card;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001790
1791 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1792
1793 /* CMD24/25 Format:
1794 * [31:0] Data Address
1795 */
1796
1797 if (num_blocks == 1)
1798 cmd.cmd_index = CMD24_WRITE_SINGLE_BLOCK;
1799 else
1800 cmd.cmd_index = CMD25_WRITE_MULTIPLE_BLOCK;
1801
Channagoud Kadabi0c2d4002013-12-20 11:17:45 -08001802 /*
1803 * Standard emmc cards use byte mode addressing
1804 * convert the block address to byte address before
1805 * sending the command
1806 */
1807 if (card->type == MMC_TYPE_STD_MMC)
1808 cmd.argument = blk_addr * card->block_size;
1809 else
1810 cmd.argument = blk_addr;
1811
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001812 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1813 cmd.resp_type = SDHCI_CMD_RESP_R1;
1814 cmd.trans_mode = SDHCI_MMC_WRITE;
Channagoud Kadabicfeee4d2013-07-26 12:02:49 -07001815
1816 /* Use CMD23 If card supports CMD23:
1817 * For SD card use the value read from SCR register
1818 * For emmc by default use CMD23.
1819 * Also as per SDCC spec always use CMD23 to stop
1820 * multiblock read/write if UHS (Ultra High Speed) is
1821 * enabled
1822 */
1823 if (MMC_CARD_SD(card))
1824 cmd.cmd23_support = dev->card.scr.cmd23_support;
1825 else
1826 cmd.cmd23_support = 0x1;
1827
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001828 cmd.data_present = 0x1;
1829 cmd.data.data_ptr = src;
1830 cmd.data.num_blocks = num_blocks;
1831
1832 /* send command */
1833 mmc_ret = sdhci_send_command(&dev->host, &cmd);
1834 if (mmc_ret)
1835 return mmc_ret;
1836
1837 /* Response contains 32 bit Card status. Here we'll check
1838 BLOCK_LEN_ERROR and ADDRESS_ERROR */
1839 if (cmd.resp[0] & MMC_R1_BLOCK_LEN_ERR) {
1840 dprintf(CRITICAL, "The transferred bytes does not match the block length\n");
1841 return 1;
1842 }
1843
1844 /* Misaligned address not matching block length */
1845 if (cmd.resp[0] & MMC_R1_ADDR_ERR) {
1846 dprintf(CRITICAL, "The misaligned address did not match the block length used\n");
1847 return 1;
1848 }
1849
1850 if (MMC_CARD_STATUS(cmd.resp[0]) != MMC_TRAN_STATE) {
1851 dprintf(CRITICAL, "MMC read failed, card is not in TRAN state\n");
1852 return 1;
1853 }
1854
1855 return mmc_ret;
1856}
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001857
1858/*
1859 * Send the erase group start address using CMD35
1860 */
1861static uint32_t mmc_send_erase_grp_start(struct mmc_device *dev, uint32_t erase_start)
1862{
1863 struct mmc_command cmd;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001864 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001865
1866 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1867
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001868 if (MMC_CARD_MMC(card))
1869 cmd.cmd_index = CMD35_ERASE_GROUP_START;
1870 else
1871 cmd.cmd_index = CMD32_ERASE_WR_BLK_START;
1872
vijay kumarc8cc1bd2014-03-28 11:24:48 +05301873 /*
1874 * Standard emmc cards use byte mode addressing
1875 * convert the block address to byte address before
1876 * sending the command
1877 */
1878 if (card->type == MMC_TYPE_STD_MMC)
1879 cmd.argument = erase_start * card->block_size;
1880 else
1881 cmd.argument = erase_start;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001882 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1883 cmd.resp_type = SDHCI_CMD_RESP_R1;
1884
1885 /* send command */
1886 if (sdhci_send_command(&dev->host, &cmd))
1887 return 1;
1888
1889 /*
1890 * CMD35 on failure returns address out of range error
1891 */
1892 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
1893 {
1894 dprintf(CRITICAL, "Address for CMD35 is out of range\n");
1895 return 1;
1896 }
1897
1898 return 0;
1899}
1900
1901/*
1902 * Send the erase group end address using CMD36
1903 */
1904static uint32_t mmc_send_erase_grp_end(struct mmc_device *dev, uint32_t erase_end)
1905{
1906 struct mmc_command cmd;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001907 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001908
1909 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1910
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001911 if (MMC_CARD_MMC(card))
1912 cmd.cmd_index = CMD36_ERASE_GROUP_END;
1913 else
1914 cmd.cmd_index = CMD33_ERASE_WR_BLK_END;
1915
vijay kumarc8cc1bd2014-03-28 11:24:48 +05301916 /*
1917 * Standard emmc cards use byte mode addressing
1918 * convert the block address to byte address before
1919 * sending the command
1920 */
1921 if (card->type == MMC_TYPE_STD_MMC)
1922 cmd.argument = erase_end * card->block_size;
1923 else
1924 cmd.argument = erase_end;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001925 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1926 cmd.resp_type = SDHCI_CMD_RESP_R1;
1927
1928 /* send command */
1929 if (sdhci_send_command(&dev->host, &cmd))
1930 return 1;
1931
1932 /*
1933 * CMD3 on failure returns address out of range error
1934 */
1935 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
1936 {
1937 dprintf(CRITICAL, "Address for CMD36 is out of range\n");
1938 return 1;
1939 }
1940
1941 return 0;
1942}
1943
1944/*
1945 * Send the erase CMD38, to erase the selected erase groups
1946 */
1947static uint32_t mmc_send_erase(struct mmc_device *dev)
1948{
1949 struct mmc_command cmd;
1950 uint32_t status;
Channagoud Kadabi6d1751b2013-07-05 13:03:52 -07001951 uint32_t retry = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001952
1953 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1954
1955 cmd.cmd_index = CMD38_ERASE;
1956 cmd.argument = 0x00000000;
1957 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1958 cmd.resp_type = SDHCI_CMD_RESP_R1B;
1959
1960 /* send command */
1961 if (sdhci_send_command(&dev->host, &cmd))
1962 return 1;
1963
1964 do
1965 {
1966 if (mmc_get_card_status(&dev->host, &dev->card, &status))
1967 {
1968 dprintf(CRITICAL, "Failed to get card status after erase\n");
1969 return 1;
1970 }
1971 /* Check if the response of erase command has eras skip status set */
1972 if (status & MMC_R1_WP_ERASE_SKIP)
1973 dprintf(CRITICAL, "Write Protect set for the region, only partial space was erased\n");
1974
1975 retry++;
1976 udelay(1000);
1977 if (retry == MMC_MAX_CARD_STAT_RETRY)
1978 {
1979 dprintf(CRITICAL, "Card status check timed out after sending erase command\n");
1980 return 1;
1981 }
1982 } while(!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
1983
1984
1985 return 0;
1986}
1987
1988
1989/*
1990 * Function: mmc sdhci erase
1991 * Arg : mmc device structure, block address and length
1992 * Return : 0 on Success, non zero on failure
1993 * Flow : Fill in the command structure & send the command
1994 */
1995uint32_t mmc_sdhci_erase(struct mmc_device *dev, uint32_t blk_addr, uint64_t len)
1996{
1997 uint32_t erase_unit_sz = 0;
1998 uint32_t erase_start;
1999 uint32_t erase_end;
2000 uint32_t blk_end;
2001 uint32_t num_erase_grps;
2002 uint32_t *out;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002003 struct mmc_card *card;
2004
2005
2006 card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002007
2008 /*
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002009 * Calculate the erase unit size,
2010 * 1. Based on emmc 4.5 spec for emmc card
2011 * 2. Use SD Card Status info for SD cards
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002012 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002013 if (MMC_CARD_MMC(card))
2014 {
2015 /*
2016 * Calculate the erase unit size as per the emmc specification v4.5
2017 */
2018 if (dev->card.ext_csd[MMC_ERASE_GRP_DEF])
2019 erase_unit_sz = (MMC_HC_ERASE_MULT * dev->card.ext_csd[MMC_HC_ERASE_GRP_SIZE]) / MMC_BLK_SZ;
2020 else
2021 erase_unit_sz = (dev->card.csd.erase_grp_size + 1) * (dev->card.csd.erase_grp_mult + 1);
2022 }
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002023 else
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002024 erase_unit_sz = dev->card.ssr.au_size * dev->card.ssr.num_aus;
2025
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002026
2027 /* Convert length in blocks */
2028 len = len / MMC_BLK_SZ;
2029
2030 if (len < erase_unit_sz)
2031 {
2032 dprintf(CRITICAL, "Requested length is less than min erase group size\n");
2033 return 1;
2034 }
2035
2036 /* Calculate erase groups based on the length in blocks */
2037 num_erase_grps = len / erase_unit_sz;
2038
2039 /* Start address of the erase range */
2040 erase_start = blk_addr;
2041
2042 /* Last address of the erase range */
2043 erase_end = blk_addr + ((num_erase_grps - 1) * erase_unit_sz);
2044
2045 /* Boundary check for overlap */
2046 blk_end = blk_addr + len;
2047
2048 if (erase_end > blk_end)
2049 {
2050 dprintf(CRITICAL, "The erase group overlaps the max requested for erase\n");
2051 erase_end -= erase_unit_sz;
2052 }
2053
2054 /* Send CMD35 for erase group start */
2055 if (mmc_send_erase_grp_start(dev, erase_start))
2056 {
2057 dprintf(CRITICAL, "Failed to send erase grp start address\n");
2058 return 1;
2059 }
2060
2061 /* Send CMD36 for erase group end */
2062 if (mmc_send_erase_grp_end(dev, erase_end))
2063 {
2064 dprintf(CRITICAL, "Failed to send erase grp end address\n");
2065 return 1;
2066 }
2067
2068 /* Send CMD38 to perform erase */
2069 if (mmc_send_erase(dev))
2070 {
2071 dprintf(CRITICAL, "Failed to erase the specified partition\n");
2072 return 1;
2073 }
2074 return 0;
2075}
2076
2077/*
2078 * Function: mmc get wp status
2079 * Arg : mmc device structure, block address and buffer for getting wp status
2080 * Return : 0 on Success, 1 on Failure
2081 * Flow : Get the WP group status by sending CMD31
2082 */
2083uint32_t mmc_get_wp_status(struct mmc_device *dev, uint32_t addr, uint8_t *wp_status)
2084{
2085 struct mmc_command cmd;
2086
2087 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2088
2089 cmd.cmd_index = CMD31_SEND_WRITE_PROT_TYPE;
2090 cmd.argument = addr;
2091 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2092 cmd.resp_type = SDHCI_CMD_RESP_R1;
2093 cmd.trans_mode = SDHCI_MMC_READ;
2094 cmd.data_present = 0x1;
2095 cmd.data.data_ptr = wp_status;
2096 cmd.data.num_blocks = 0x1;
2097 cmd.data.blk_sz = 0x8;
2098
2099 if (sdhci_send_command(&dev->host, &cmd))
2100 {
2101 dprintf(CRITICAL, "Failed to get status of write protect bits\n");
2102 return 1;
2103 }
2104
2105 return 0;
2106}
2107
2108/*
2109 * Function: mmc set/clear WP on user area
2110 * Arg : mmc device structure, block address,len, & flag to set or clear
2111 * Return : 0 on success, 1 on failure
2112 * Flow : Function to set/clear power on write protect on user area
2113 */
2114
2115uint32_t mmc_set_clr_power_on_wp_user(struct mmc_device *dev, uint32_t addr, uint64_t len, uint8_t set_clr)
2116{
2117 struct mmc_command cmd;
2118 uint32_t wp_grp_size;
2119 uint32_t status;
2120 uint32_t num_wp_grps;
2121 uint32_t ret;
Channagoud Kadabi6d1751b2013-07-05 13:03:52 -07002122 uint32_t retry = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002123 uint32_t i;
2124
2125 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2126
2127 /* Convert len into blocks */
2128 len = len / MMC_BLK_SZ;
2129
2130 /* Disable PERM WP */
2131 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_SET_BIT, MMC_USR_WP, MMC_US_PERM_WP_DIS);
2132
2133 if (ret)
2134 {
2135 dprintf(CRITICAL, "Failed to Disable PERM WP\n");
2136 return ret;
2137 }
2138
2139 /* Read the default values for user WP */
2140 ret = mmc_get_ext_csd(&dev->host, &dev->card);
2141
2142 if (ret)
2143 {
2144 dprintf(CRITICAL, "Failed to read ext csd for the card\n");
2145 return ret;
2146 }
2147
2148 /* Check if user power on WP is disabled or perm WP is enabled */
2149 if ((dev->card.ext_csd[MMC_USR_WP] & MMC_US_PWR_WP_DIS)
2150 || (dev->card.ext_csd[MMC_USR_WP] & MMC_US_PERM_WP_EN))
2151 {
2152 dprintf(CRITICAL, "Power on protection is disabled, cannot be set\n");
2153 return 1;
2154 }
2155
2156 /* Calculate the wp grp size */
2157 if (dev->card.ext_csd[MMC_ERASE_GRP_DEF])
2158 wp_grp_size = MMC_HC_ERASE_MULT * dev->card.ext_csd[MMC_HC_ERASE_GRP_SIZE] / MMC_BLK_SZ;
2159 else
2160 wp_grp_size = (dev->card.csd.wp_grp_size + 1) * (dev->card.csd.erase_grp_size + 1) \
2161 * (dev->card.csd.erase_grp_mult + 1);
2162
2163
2164 if (len < wp_grp_size)
2165 {
2166 dprintf(CRITICAL, "Length is less than min WP size, WP was not set\n");
2167 return 1;
2168 }
2169
2170 /* Set power on USER WP */
2171 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_SET_BIT, MMC_USR_WP, MMC_US_PWR_WP_EN);
2172
2173 if (ret)
2174 {
2175 dprintf(CRITICAL, "Failed to set power on WP for user\n");
2176 return ret;
2177 }
2178
2179 num_wp_grps = ROUNDUP(len, wp_grp_size) / wp_grp_size;
2180
2181 if (set_clr)
2182 cmd.cmd_index = CMD28_SET_WRITE_PROTECT;
2183 else
2184 cmd.cmd_index = CMD29_CLEAR_WRITE_PROTECT;
2185
2186 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2187 cmd.resp_type = SDHCI_CMD_RESP_R1B;
2188
2189 for(i = 0; i < num_wp_grps; i++)
2190 {
2191 cmd.argument = addr + (i * wp_grp_size);
2192
2193 if (sdhci_send_command(&dev->host, &cmd))
2194 return 1;
2195
2196 /* CMD28/CMD29 On failure returns address out of range error */
2197 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2198 {
2199 dprintf(CRITICAL, "Address for CMD28/29 is out of range\n");
2200 return 1;
2201 }
2202
2203 /* Check the card status */
2204 do
2205 {
2206 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2207 {
2208 dprintf(CRITICAL, "Failed to get card status afterapplying write protect\n");
2209 return 1;
2210 }
2211
2212 /* Time out for WP command */
2213 retry++;
2214 udelay(1000);
2215 if (retry == MMC_MAX_CARD_STAT_RETRY)
2216 {
2217 dprintf(CRITICAL, "Card status timed out after sending write protect command\n");
2218 return 1;
2219 }
2220 } while (!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2221
2222 }
2223
2224 return 0;
2225}
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -07002226
2227/* Function to put the mmc card to sleep */
2228void mmc_put_card_to_sleep(struct mmc_device *dev)
2229{
2230 struct mmc_command cmd = {0};
2231 struct mmc_card *card = &dev->card;
2232
2233 cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
2234 cmd.argument = 0x00000000;
2235 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2236 cmd.resp_type = SDHCI_CMD_RESP_NONE;
2237
2238 /* send command */
2239 if(sdhci_send_command(&dev->host, &cmd))
2240 {
2241 dprintf(CRITICAL, "card deselect error: %s\n", __func__);
2242 return;
2243 }
2244
2245 cmd.cmd_index = CMD5_SLEEP_AWAKE;
2246 cmd.argument = (card->rca << MMC_CARD_RCA_BIT) | MMC_CARD_SLEEP;
2247 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2248 cmd.resp_type = SDHCI_CMD_RESP_R1B;
2249
2250 /* send command */
2251 if(sdhci_send_command(&dev->host, &cmd))
2252 dprintf(CRITICAL, "card sleep error: %s\n", __func__);
2253}