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Vineet Bajajfeef0a92015-04-29 17:09:44 +05301/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef _PANEL_ADV7533_1080p60_H_
30#define _PANEL_ADV7533_1080p60_H_
31/*---------------------------------------------------------------------------*/
32/* HEADER files */
33/*---------------------------------------------------------------------------*/
34#include "panel.h"
35
36/*---------------------------------------------------------------------------*/
37/* Panel configuration */
38/*---------------------------------------------------------------------------*/
39static struct panel_config adv7533_1080p_video_panel_data = {
Ajay Singh Parmarf2fc3232015-07-01 12:07:59 -070040 "qcom,mdss_dsi_adv7533_1080p", "dsi:0:", "qcom,mdss-dsi-panel",
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -050041 10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, "NONE"
Vineet Bajajfeef0a92015-04-29 17:09:44 +053042};
43
44/*---------------------------------------------------------------------------*/
45/* Panel resolution */
46/*---------------------------------------------------------------------------*/
47static struct panel_resolution adv7533_1080p_video_panel_res = {
48 1920, 1080, 88, 148, 44, 0, 4, 36, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0
49};
50
51/*---------------------------------------------------------------------------*/
52/* Panel color information */
53/*---------------------------------------------------------------------------*/
54static struct color_info adv7533_1080p_video_color = {
55 24, 0, 0xff, 0, 0, 0
56};
57
58static struct mipi_dsi_i2c_cmd adv7533_1080p_common_cfg[] = {
59 {ADV7533_MAIN, 0xd6, 0x48, 5}, /* HPD overriden */
60 {ADV7533_MAIN, 0x41, 0x10, 5}, /* HDMI normal */
61 {ADV7533_CEC_DSI, 0x03, 0x89, 0}, /* HDMI enabled */
62 {ADV7533_MAIN, 0x16, 0x20, 0},
63 {ADV7533_MAIN, 0x9A, 0xE0, 0},
64 {ADV7533_MAIN, 0xBA, 0x70, 0},
65 {ADV7533_MAIN, 0xDE, 0x82, 0},
66 {ADV7533_MAIN, 0xE4, 0x40, 0},
67 {ADV7533_MAIN, 0xE5, 0x80, 0},
68 {ADV7533_CEC_DSI, 0x15, 0xD0, 0},
69 {ADV7533_CEC_DSI, 0x17, 0xD0, 0},
70 {ADV7533_CEC_DSI, 0x24, 0x20, 0},
71 {ADV7533_CEC_DSI, 0x57, 0x11, 0},
72 /* hdmi or dvi mode: hdmi */
73 {ADV7533_MAIN, 0xAF, 0x06, 0},
74 {ADV7533_MAIN, 0x40, 0x80, 0},
75 {ADV7533_MAIN, 0x4C, 0x04, 0},
76 {ADV7533_MAIN, 0x49, 0x02, 0},
77 {ADV7533_MAIN, 0x0D, 1 << 6, 0},
78 {ADV7533_CEC_DSI, 0x1C, 0x30, 0},
79};
80
81#define ADV7533_1080P_CONFIG_COMMANDS 19
82
83static struct mipi_dsi_i2c_cmd adv7533_1080p_tg_i2c_command[] = {
84 /*4 Lanes*/
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -050085 {ADV7533_CEC_DSI, 0x1C, 0x40, 0},
Vineet Bajajfeef0a92015-04-29 17:09:44 +053086 /* hsync and vsync active low */
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -050087 {ADV7533_MAIN, 0x17, 0x02, 0},
Vineet Bajajfeef0a92015-04-29 17:09:44 +053088 /* Control for Pixel Clock Divider */
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -050089 {ADV7533_CEC_DSI, 0x16, 0x00, 0},
Vineet Bajajfeef0a92015-04-29 17:09:44 +053090 /* Timing Generator Enable */
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -050091 {ADV7533_CEC_DSI, 0x27, 0xCB, 0},
Vineet Bajajfeef0a92015-04-29 17:09:44 +053092 /* h_width 0x898 2200*/
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -050093 {ADV7533_CEC_DSI, 0x28, 0x89, 0},
94 {ADV7533_CEC_DSI, 0x29, 0x80, 0},
Vineet Bajajfeef0a92015-04-29 17:09:44 +053095 /* hsync_width 0x2c 44*/
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -050096 {ADV7533_CEC_DSI, 0x2A, 0x02, 0},
97 {ADV7533_CEC_DSI, 0x2B, 0xC0, 0},
Vineet Bajajfeef0a92015-04-29 17:09:44 +053098 /* hfp 0x58 88 */
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -050099 {ADV7533_CEC_DSI, 0x2C, 0x05, 0},
100 {ADV7533_CEC_DSI, 0x2D, 0x80, 0},
Vineet Bajajfeef0a92015-04-29 17:09:44 +0530101 /* hbp 0x94 148 */
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -0500102 {ADV7533_CEC_DSI, 0x2E, 0x09, 0},
103 {ADV7533_CEC_DSI, 0x2F, 0x40, 0},
Vineet Bajajfeef0a92015-04-29 17:09:44 +0530104 /* v_total 0x465 1125*/
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -0500105 {ADV7533_CEC_DSI, 0x30, 0x46, 0},
106 {ADV7533_CEC_DSI, 0x31, 0x50, 0},
Vineet Bajajfeef0a92015-04-29 17:09:44 +0530107 /* vsync_width 0x05 5*/
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -0500108 {ADV7533_CEC_DSI, 0x32, 0x00, 0},
109 {ADV7533_CEC_DSI, 0x33, 0x50, 0},
Vineet Bajajfeef0a92015-04-29 17:09:44 +0530110 /* vfp 0x04 4 */
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -0500111 {ADV7533_CEC_DSI, 0x34, 0x00, 0},
112 {ADV7533_CEC_DSI, 0x35, 0x40, 0},
Vineet Bajajfeef0a92015-04-29 17:09:44 +0530113 /* vbp 0x24 36 */
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -0500114 {ADV7533_CEC_DSI, 0x36, 0x02, 0},
115 {ADV7533_CEC_DSI, 0x37, 0x40, 0},
Vineet Bajajfeef0a92015-04-29 17:09:44 +0530116 /* Timing Generator Enable */
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -0500117 {ADV7533_CEC_DSI, 0x27, 0xCB, 0},
118 {ADV7533_CEC_DSI, 0x27, 0x8B, 0},
119 {ADV7533_CEC_DSI, 0x27, 0xCB, 0},
Vineet Bajajfeef0a92015-04-29 17:09:44 +0530120 /* Reset Internal Timing Generator */
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -0500121 {ADV7533_MAIN, 0xAF, 0x16, 0},
Vineet Bajajfeef0a92015-04-29 17:09:44 +0530122 /* HDMI Mode Select */
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -0500123 {ADV7533_CEC_DSI, 0x03, 0x89, 0},
Vineet Bajajfeef0a92015-04-29 17:09:44 +0530124 /* HDMI Output Enable */
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -0500125 {ADV7533_MAIN, 0x40, 0x80, 0},
Vineet Bajajfeef0a92015-04-29 17:09:44 +0530126 /* GC Packet Enable */
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -0500127 {ADV7533_MAIN, 0x4C, 0x04, 0},
Vineet Bajajfeef0a92015-04-29 17:09:44 +0530128 /* Colour Depth 24-bit per pixel */
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -0500129 {ADV7533_MAIN, 0x49, 0x00, 0},
Vineet Bajajfeef0a92015-04-29 17:09:44 +0530130 /* Down Dither Output 8-bit Colour Depth */
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -0500131 {ADV7533_CEC_DSI, 0x05, 0xF8, 0},
Vineet Bajajfeef0a92015-04-29 17:09:44 +0530132 /* ADI Required Write */
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -0500133 {ADV7533_CEC_DSI, 0xBE, 0x3D, 0},
Vineet Bajajfeef0a92015-04-29 17:09:44 +0530134 /* Test Pattern Disable (0x55[7] = 0) */
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -0500135 {ADV7533_CEC_DSI, 0x55, 0x00, 0},
Vineet Bajajfeef0a92015-04-29 17:09:44 +0530136};
137
138#define ADV7533_1080P_TG_COMMANDS 31
139
140static struct command_state adv7533_1080p_video_state = {
141 0, 1
142};
143
144/*---------------------------------------------------------------------------*/
145/* Command mode panel information */
146/*---------------------------------------------------------------------------*/
147static struct commandpanel_info adv7533_1080p_video_command_panel = {
148 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
149};
150
151/*---------------------------------------------------------------------------*/
152/* Video mode panel information */
153/*---------------------------------------------------------------------------*/
154static struct videopanel_info adv7533_1080p_video_video_panel = {
155 1, 0, 0, 0, 1, 1, 0, 0, 0x9
156};
157
158/*---------------------------------------------------------------------------*/
159/* Lane configuration */
160/*---------------------------------------------------------------------------*/
161static struct lane_configuration adv7533_1080p_video_lane_config = {
162 4, 0, 1, 1, 1, 1, 1
163};
164
165/*---------------------------------------------------------------------------*/
166/* Panel timing */
167/*---------------------------------------------------------------------------*/
168static const uint32_t adv7533_1080p_video_timings[] = {
169 0xa9, 0x4A, 0x32, 0x00, 0x82, 0x86, 0x38, 0x4e, 0x3d, 0x03, 0x04, 0x00
170};
171
172static struct panel_timing adv7533_1080p_video_timing_info = {
173 0x0, 0x04, 0x01, 0x27
174};
175
Siddharth Zavericd8f5fa2015-12-12 14:49:08 -0500176static const uint32_t adv7533_1080p_thulium_video_timings[] = {
177 0x1d, 0x1a, 0x03, 0x05, 0x01, 0x03, 0x04, 0xa0,
178 0x1d, 0x1a, 0x03, 0x05, 0x01, 0x03, 0x04, 0xa0,
179 0x1d, 0x1a, 0x03, 0x05, 0x01, 0x03, 0x04, 0xa0,
180 0x1d, 0x1a, 0x03, 0x05, 0x01, 0x03, 0x04, 0xa0,
181 0x1d, 0x1a, 0x03, 0x05, 0x01, 0x03, 0x04, 0xa0,
182};
183
Vineet Bajajfeef0a92015-04-29 17:09:44 +0530184#endif /*_PANEL_ADV7533_1080p60_H_*/
185