| #include "kona.dtsi" |
| |
| / { |
| model = "Qualcomm Technologies, Inc. kona v2"; |
| compatible = "qcom,kona"; |
| qcom,msm-id = <356 0x20000>; |
| }; |
| |
| &CPU4 { |
| dynamic-power-coefficient = <533>; |
| }; |
| |
| &CPU5 { |
| dynamic-power-coefficient = <533>; |
| }; |
| |
| &CPU6 { |
| dynamic-power-coefficient = <533>; |
| }; |
| |
| &CPU7 { |
| dynamic-power-coefficient = <642>; |
| }; |
| |
| &clock_camcc { |
| compatible = "qcom,camcc-kona-v2", "syscon"; |
| }; |
| |
| &clock_videocc { |
| compatible = "qcom,videocc-kona-v2", "syscon"; |
| }; |
| |
| &clock_npucc { |
| compatible = "qcom,npucc-kona-v2", "syscon"; |
| }; |
| |
| &spss_utils { |
| qcom,spss-dev-firmware-name = "spss2d"; /* 8 chars max */ |
| qcom,spss-test-firmware-name = "spss2t"; /* 8 chars max */ |
| qcom,spss-prod-firmware-name = "spss2p"; /* 8 chars max */ |
| }; |
| |
| #include "kona-v2-gpu.dtsi" |
| |
| &cpu0_cpu_l3_latmon { |
| qcom,core-dev-table = |
| < 300000 300000000 >, |
| < 403200 403200000 >, |
| < 518400 518400000 >, |
| < 691200 614400000 >, |
| < 883200 825600000 >, |
| < 1075200 921600000 >, |
| < 1171200 1017600000 >, |
| < 1344000 1132800000 >, |
| < 1420800 1228800000 >, |
| < 1516800 1324800000 >, |
| < 1612800 1516800000 >, |
| < 1804800 1612800000 >; |
| }; |
| |
| &cpu4_cpu_l3_latmon { |
| qcom,core-dev-table = |
| < 300000 300000000 >, |
| < 825600 614400000 >, |
| < 1171200 825600000 >, |
| < 1478400 1017600000 >, |
| < 1670400 1228800000 >, |
| < 2054400 1324800000 >, |
| < 2419200 1516800000 >, |
| < 2841600 1612800000 >; |
| }; |
| |
| &cpu7_cpu_l3_latmon { |
| qcom,core-dev-table = |
| < 300000 300000000 >, |
| < 825600 614400000 >, |
| < 1171200 825600000 >, |
| < 1478400 1017600000 >, |
| < 1670400 1228800000 >, |
| < 2054400 1324800000 >, |
| < 2419200 1516800000 >, |
| < 2841600 1612800000 >; |
| }; |
| |
| &cpu0_cpu_llcc_latmon { |
| qcom,core-dev-table = |
| < 300000 MHZ_TO_MBPS( 150, 16) >, |
| < 787200 MHZ_TO_MBPS( 300, 16) >, |
| < 1516800 MHZ_TO_MBPS( 466, 16) >, |
| < 1804800 MHZ_TO_MBPS( 600, 16) >; |
| }; |
| |
| &cpu4_cpu_llcc_latmon { |
| qcom,core-dev-table = |
| < 300000 MHZ_TO_MBPS( 150, 16) >, |
| < 710400 MHZ_TO_MBPS( 300, 16) >, |
| < 1056000 MHZ_TO_MBPS( 466, 16) >, |
| < 1286400 MHZ_TO_MBPS( 600, 16) >, |
| < 1862400 MHZ_TO_MBPS( 806, 16) >, |
| < 2419200 MHZ_TO_MBPS( 933, 16) >, |
| < 2841600 MHZ_TO_MBPS( 1000, 16) >; |
| }; |
| |
| &cpu0_llcc_ddr_latmon { |
| qcom,cachemiss-ev = <0x1000>; |
| ddr4-map { |
| qcom,ddr-type = <DDR_TYPE_LPDDR4X>; |
| qcom,core-dev-table = |
| < 300000 MHZ_TO_MBPS( 200, 4) >, |
| < 787200 MHZ_TO_MBPS( 451, 4) >, |
| < 1171200 MHZ_TO_MBPS( 547, 4) >, |
| < 1516800 MHZ_TO_MBPS( 768, 4) >, |
| < 1804800 MHZ_TO_MBPS( 1017, 4) >; |
| }; |
| |
| ddr5-map { |
| qcom,ddr-type = <DDR_TYPE_LPDDR5>; |
| qcom,core-dev-table = |
| < 300000 MHZ_TO_MBPS( 200, 4) >, |
| < 787200 MHZ_TO_MBPS( 451, 4) >, |
| < 1171200 MHZ_TO_MBPS( 547, 4) >, |
| < 1516800 MHZ_TO_MBPS( 768, 4) >, |
| < 1804800 MHZ_TO_MBPS( 1017, 4) >; |
| }; |
| }; |
| |
| &cpu4_llcc_ddr_latmon { |
| qcom,cachemiss-ev = <0x1000>; |
| ddr4-map { |
| qcom,ddr-type = <DDR_TYPE_LPDDR4X>; |
| qcom,core-dev-table = |
| < 300000 MHZ_TO_MBPS( 200, 4) >, |
| < 710400 MHZ_TO_MBPS( 451, 4) >, |
| < 825600 MHZ_TO_MBPS( 547, 4) >, |
| < 1056000 MHZ_TO_MBPS( 768, 4) >, |
| < 1286400 MHZ_TO_MBPS(1017, 4) >, |
| < 1574400 MHZ_TO_MBPS(1353, 4) >, |
| < 1862400 MHZ_TO_MBPS(1555, 4) >, |
| < 2419200 MHZ_TO_MBPS(1804, 4) >, |
| < 2745600 MHZ_TO_MBPS(2092, 4) >, |
| < 2841600 MHZ_TO_MBPS(2736, 4) >; |
| }; |
| |
| ddr5-map { |
| qcom,ddr-type = <DDR_TYPE_LPDDR5>; |
| qcom,core-dev-table = |
| < 300000 MHZ_TO_MBPS( 200, 4) >, |
| < 710400 MHZ_TO_MBPS( 451, 4) >, |
| < 825600 MHZ_TO_MBPS( 547, 4) >, |
| < 1056000 MHZ_TO_MBPS( 768, 4) >, |
| < 1286400 MHZ_TO_MBPS(1017, 4) >, |
| < 1862400 MHZ_TO_MBPS(1555, 4) >, |
| < 2419200 MHZ_TO_MBPS(1804, 4) >, |
| < 2745600 MHZ_TO_MBPS(2092, 4) >, |
| < 2841600 MHZ_TO_MBPS(2736, 4) >; |
| }; |
| }; |
| |
| &cpu4_computemon { |
| ddr4-map { |
| qcom,ddr-type = <DDR_TYPE_LPDDR4X>; |
| qcom,core-dev-table = |
| < 1862400 MHZ_TO_MBPS( 200, 4) >, |
| < 2745600 MHZ_TO_MBPS(1017, 4) >, |
| < 2841600 MHZ_TO_MBPS(2092, 4) >; |
| }; |
| |
| ddr5-map { |
| qcom,ddr-type = <DDR_TYPE_LPDDR5>; |
| qcom,core-dev-table = |
| < 1862400 MHZ_TO_MBPS( 200, 4) >, |
| < 2745600 MHZ_TO_MBPS(1017, 4) >, |
| < 2841600 MHZ_TO_MBPS(2736, 4) >; |
| }; |
| }; |
| |
| &cpu4_qoslatmon { |
| qcom,cachemiss-ev = <0x1000>; |
| }; |
| |
| /* NPU overrides */ |
| &msm_npu { |
| qcom,npu-pwrlevels { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "qcom,npu-pwrlevels"; |
| initial-pwrlevel = <5>; |
| qcom,npu-pwrlevel@0 { |
| reg = <0>; |
| vreg = <1>; |
| clk-freq = <19200000 |
| 100000000 |
| 300000000 |
| 300000000 |
| 300000000 |
| 300000000 |
| 200000000 |
| 40000000 |
| 300000000 |
| 100000000 |
| 19200000 |
| 50000000 |
| 50000000 |
| 100000000 |
| 100000000 |
| 100000000 |
| 19200000 |
| 100000000 |
| 19200000 |
| 50000000 |
| 200000000 |
| 200000000 |
| 50000000 |
| 19200000 |
| 300000000 |
| 300000000 |
| 19200000 |
| 300000000>; |
| }; |
| |
| qcom,npu-pwrlevel@1 { |
| reg = <1>; |
| vreg = <2>; |
| clk-freq = <19200000 |
| 200000000 |
| 406000000 |
| 406000000 |
| 406000000 |
| 406000000 |
| 267000000 |
| 40000000 |
| 403000000 |
| 200000000 |
| 19200000 |
| 50000000 |
| 50000000 |
| 200000000 |
| 200000000 |
| 200000000 |
| 19200000 |
| 200000000 |
| 19200000 |
| 50000000 |
| 406000000 |
| 406000000 |
| 50000000 |
| 19200000 |
| 406000000 |
| 406000000 |
| 19200000 |
| 400000000>; |
| }; |
| |
| qcom,npu-pwrlevel@2 { |
| reg = <2>; |
| vreg = <3>; |
| clk-freq = <19200000 |
| 333000000 |
| 533000000 |
| 533000000 |
| 533000000 |
| 533000000 |
| 403000000 |
| 75000000 |
| 533000000 |
| 214000000 |
| 19200000 |
| 50000000 |
| 100000000 |
| 214000000 |
| 214000000 |
| 214000000 |
| 19200000 |
| 214000000 |
| 19200000 |
| 50000000 |
| 533000000 |
| 533000000 |
| 50000000 |
| 19200000 |
| 533000000 |
| 533000000 |
| 19200000 |
| 500000000>; |
| }; |
| |
| qcom,npu-pwrlevel@3 { |
| reg = <3>; |
| vreg = <4>; |
| clk-freq = <19200000 |
| 428000000 |
| 730000000 |
| 730000000 |
| 730000000 |
| 730000000 |
| 533000000 |
| 75000000 |
| 700000000 |
| 300000000 |
| 19200000 |
| 100000000 |
| 200000000 |
| 300000000 |
| 300000000 |
| 300000000 |
| 19200000 |
| 300000000 |
| 19200000 |
| 100000000 |
| 730000000 |
| 730000000 |
| 100000000 |
| 19200000 |
| 730000000 |
| 730000000 |
| 19200000 |
| 660000000>; |
| }; |
| |
| qcom,npu-pwrlevel@4 { |
| reg = <4>; |
| vreg = <6>; |
| clk-freq = <19200000 |
| 500000000 |
| 920000000 |
| 920000000 |
| 920000000 |
| 920000000 |
| 700000000 |
| 75000000 |
| 806000000 |
| 300000000 |
| 19200000 |
| 100000000 |
| 200000000 |
| 300000000 |
| 300000000 |
| 300000000 |
| 19200000 |
| 300000000 |
| 19200000 |
| 100000000 |
| 920000000 |
| 920000000 |
| 100000000 |
| 19200000 |
| 920000000 |
| 920000000 |
| 19200000 |
| 800000000>; |
| }; |
| |
| qcom,npu-pwrlevel@5 { |
| reg = <5>; |
| vreg = <7>; |
| clk-freq = <19200000 |
| 500000000 |
| 1000000000 |
| 1000000000 |
| 1000000000 |
| 1000000000 |
| 700000000 |
| 75000000 |
| 806000000 |
| 300000000 |
| 19200000 |
| 100000000 |
| 200000000 |
| 300000000 |
| 300000000 |
| 300000000 |
| 19200000 |
| 300000000 |
| 19200000 |
| 100000000 |
| 1000000000 |
| 1000000000 |
| 100000000 |
| 19200000 |
| 1000000000 |
| 1000000000 |
| 19200000 |
| 800000000>; |
| }; |
| }; |
| }; |
| |
| &cpufreq_hw { |
| interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-names = "dcvsh0_int", "dcvsh1_int", "dcvsh2_int"; |
| }; |