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gerrit-public.fairphone.software / kernel / msm-4.19 / 9b0224459fa8ee7c60d16a0b710ebf039da9f365 / . / arch / arm64 / boot / dts / vendor / qcom / kona-v2.dtsi
blob: 8ca5010a1ab7bc68189d14ecfd34442b37711167 [file] [log] [blame]
Luca Weiss9b022442023-04-14 14:47:36 +0200[diff] [blame^]1#include "kona.dtsi"
2
3/ {
4 model = "Qualcomm Technologies, Inc. kona v2";
5 compatible = "qcom,kona";
6 qcom,msm-id = <356 0x20000>;
7};
8
9&CPU4 {
10 dynamic-power-coefficient = <533>;
11};
12
13&CPU5 {
14 dynamic-power-coefficient = <533>;
15};
16
17&CPU6 {
18 dynamic-power-coefficient = <533>;
19};
20
21&CPU7 {
22 dynamic-power-coefficient = <642>;
23};
24
25&clock_camcc {
26 compatible = "qcom,camcc-kona-v2", "syscon";
27};
28
29&clock_videocc {
30 compatible = "qcom,videocc-kona-v2", "syscon";
31};
32
33&clock_npucc {
34 compatible = "qcom,npucc-kona-v2", "syscon";
35};
36
37&spss_utils {
38 qcom,spss-dev-firmware-name = "spss2d"; /* 8 chars max */
39 qcom,spss-test-firmware-name = "spss2t"; /* 8 chars max */
40 qcom,spss-prod-firmware-name = "spss2p"; /* 8 chars max */
41};
42
43#include "kona-v2-gpu.dtsi"
44
45&cpu0_cpu_l3_latmon {
46 qcom,core-dev-table =
47 < 300000 300000000 >,
48 < 403200 403200000 >,
49 < 518400 518400000 >,
50 < 691200 614400000 >,
51 < 883200 825600000 >,
52 < 1075200 921600000 >,
53 < 1171200 1017600000 >,
54 < 1344000 1132800000 >,
55 < 1420800 1228800000 >,
56 < 1516800 1324800000 >,
57 < 1612800 1516800000 >,
58 < 1804800 1612800000 >;
59};
60
61&cpu4_cpu_l3_latmon {
62 qcom,core-dev-table =
63 < 300000 300000000 >,
64 < 825600 614400000 >,
65 < 1171200 825600000 >,
66 < 1478400 1017600000 >,
67 < 1670400 1228800000 >,
68 < 2054400 1324800000 >,
69 < 2419200 1516800000 >,
70 < 2841600 1612800000 >;
71};
72
73&cpu7_cpu_l3_latmon {
74 qcom,core-dev-table =
75 < 300000 300000000 >,
76 < 825600 614400000 >,
77 < 1171200 825600000 >,
78 < 1478400 1017600000 >,
79 < 1670400 1228800000 >,
80 < 2054400 1324800000 >,
81 < 2419200 1516800000 >,
82 < 2841600 1612800000 >;
83};
84
85&cpu0_cpu_llcc_latmon {
86 qcom,core-dev-table =
87 < 300000 MHZ_TO_MBPS( 150, 16) >,
88 < 787200 MHZ_TO_MBPS( 300, 16) >,
89 < 1516800 MHZ_TO_MBPS( 466, 16) >,
90 < 1804800 MHZ_TO_MBPS( 600, 16) >;
91};
92
93&cpu4_cpu_llcc_latmon {
94 qcom,core-dev-table =
95 < 300000 MHZ_TO_MBPS( 150, 16) >,
96 < 710400 MHZ_TO_MBPS( 300, 16) >,
97 < 1056000 MHZ_TO_MBPS( 466, 16) >,
98 < 1286400 MHZ_TO_MBPS( 600, 16) >,
99 < 1862400 MHZ_TO_MBPS( 806, 16) >,
100 < 2419200 MHZ_TO_MBPS( 933, 16) >,
101 < 2841600 MHZ_TO_MBPS( 1000, 16) >;
102};
103
104&cpu0_llcc_ddr_latmon {
105 qcom,cachemiss-ev = <0x1000>;
106 ddr4-map {
107 qcom,ddr-type = <DDR_TYPE_LPDDR4X>;
108 qcom,core-dev-table =
109 < 300000 MHZ_TO_MBPS( 200, 4) >,
110 < 787200 MHZ_TO_MBPS( 451, 4) >,
111 < 1171200 MHZ_TO_MBPS( 547, 4) >,
112 < 1516800 MHZ_TO_MBPS( 768, 4) >,
113 < 1804800 MHZ_TO_MBPS( 1017, 4) >;
114 };
115
116 ddr5-map {
117 qcom,ddr-type = <DDR_TYPE_LPDDR5>;
118 qcom,core-dev-table =
119 < 300000 MHZ_TO_MBPS( 200, 4) >,
120 < 787200 MHZ_TO_MBPS( 451, 4) >,
121 < 1171200 MHZ_TO_MBPS( 547, 4) >,
122 < 1516800 MHZ_TO_MBPS( 768, 4) >,
123 < 1804800 MHZ_TO_MBPS( 1017, 4) >;
124 };
125};
126
127&cpu4_llcc_ddr_latmon {
128 qcom,cachemiss-ev = <0x1000>;
129 ddr4-map {
130 qcom,ddr-type = <DDR_TYPE_LPDDR4X>;
131 qcom,core-dev-table =
132 < 300000 MHZ_TO_MBPS( 200, 4) >,
133 < 710400 MHZ_TO_MBPS( 451, 4) >,
134 < 825600 MHZ_TO_MBPS( 547, 4) >,
135 < 1056000 MHZ_TO_MBPS( 768, 4) >,
136 < 1286400 MHZ_TO_MBPS(1017, 4) >,
137 < 1574400 MHZ_TO_MBPS(1353, 4) >,
138 < 1862400 MHZ_TO_MBPS(1555, 4) >,
139 < 2419200 MHZ_TO_MBPS(1804, 4) >,
140 < 2745600 MHZ_TO_MBPS(2092, 4) >,
141 < 2841600 MHZ_TO_MBPS(2736, 4) >;
142 };
143
144 ddr5-map {
145 qcom,ddr-type = <DDR_TYPE_LPDDR5>;
146 qcom,core-dev-table =
147 < 300000 MHZ_TO_MBPS( 200, 4) >,
148 < 710400 MHZ_TO_MBPS( 451, 4) >,
149 < 825600 MHZ_TO_MBPS( 547, 4) >,
150 < 1056000 MHZ_TO_MBPS( 768, 4) >,
151 < 1286400 MHZ_TO_MBPS(1017, 4) >,
152 < 1862400 MHZ_TO_MBPS(1555, 4) >,
153 < 2419200 MHZ_TO_MBPS(1804, 4) >,
154 < 2745600 MHZ_TO_MBPS(2092, 4) >,
155 < 2841600 MHZ_TO_MBPS(2736, 4) >;
156 };
157};
158
159&cpu4_computemon {
160 ddr4-map {
161 qcom,ddr-type = <DDR_TYPE_LPDDR4X>;
162 qcom,core-dev-table =
163 < 1862400 MHZ_TO_MBPS( 200, 4) >,
164 < 2745600 MHZ_TO_MBPS(1017, 4) >,
165 < 2841600 MHZ_TO_MBPS(2092, 4) >;
166 };
167
168 ddr5-map {
169 qcom,ddr-type = <DDR_TYPE_LPDDR5>;
170 qcom,core-dev-table =
171 < 1862400 MHZ_TO_MBPS( 200, 4) >,
172 < 2745600 MHZ_TO_MBPS(1017, 4) >,
173 < 2841600 MHZ_TO_MBPS(2736, 4) >;
174 };
175};
176
177&cpu4_qoslatmon {
178 qcom,cachemiss-ev = <0x1000>;
179};
180
181/* NPU overrides */
182&msm_npu {
183 qcom,npu-pwrlevels {
184 #address-cells = <1>;
185 #size-cells = <0>;
186 compatible = "qcom,npu-pwrlevels";
187 initial-pwrlevel = <5>;
188 qcom,npu-pwrlevel@0 {
189 reg = <0>;
190 vreg = <1>;
191 clk-freq = <19200000
192 100000000
193 300000000
194 300000000
195 300000000
196 300000000
197 200000000
198 40000000
199 300000000
200 100000000
201 19200000
202 50000000
203 50000000
204 100000000
205 100000000
206 100000000
207 19200000
208 100000000
209 19200000
210 50000000
211 200000000
212 200000000
213 50000000
214 19200000
215 300000000
216 300000000
217 19200000
218 300000000>;
219 };
220
221 qcom,npu-pwrlevel@1 {
222 reg = <1>;
223 vreg = <2>;
224 clk-freq = <19200000
225 200000000
226 406000000
227 406000000
228 406000000
229 406000000
230 267000000
231 40000000
232 403000000
233 200000000
234 19200000
235 50000000
236 50000000
237 200000000
238 200000000
239 200000000
240 19200000
241 200000000
242 19200000
243 50000000
244 406000000
245 406000000
246 50000000
247 19200000
248 406000000
249 406000000
250 19200000
251 400000000>;
252 };
253
254 qcom,npu-pwrlevel@2 {
255 reg = <2>;
256 vreg = <3>;
257 clk-freq = <19200000
258 333000000
259 533000000
260 533000000
261 533000000
262 533000000
263 403000000
264 75000000
265 533000000
266 214000000
267 19200000
268 50000000
269 100000000
270 214000000
271 214000000
272 214000000
273 19200000
274 214000000
275 19200000
276 50000000
277 533000000
278 533000000
279 50000000
280 19200000
281 533000000
282 533000000
283 19200000
284 500000000>;
285 };
286
287 qcom,npu-pwrlevel@3 {
288 reg = <3>;
289 vreg = <4>;
290 clk-freq = <19200000
291 428000000
292 730000000
293 730000000
294 730000000
295 730000000
296 533000000
297 75000000
298 700000000
299 300000000
300 19200000
301 100000000
302 200000000
303 300000000
304 300000000
305 300000000
306 19200000
307 300000000
308 19200000
309 100000000
310 730000000
311 730000000
312 100000000
313 19200000
314 730000000
315 730000000
316 19200000
317 660000000>;
318 };
319
320 qcom,npu-pwrlevel@4 {
321 reg = <4>;
322 vreg = <6>;
323 clk-freq = <19200000
324 500000000
325 920000000
326 920000000
327 920000000
328 920000000
329 700000000
330 75000000
331 806000000
332 300000000
333 19200000
334 100000000
335 200000000
336 300000000
337 300000000
338 300000000
339 19200000
340 300000000
341 19200000
342 100000000
343 920000000
344 920000000
345 100000000
346 19200000
347 920000000
348 920000000
349 19200000
350 800000000>;
351 };
352
353 qcom,npu-pwrlevel@5 {
354 reg = <5>;
355 vreg = <7>;
356 clk-freq = <19200000
357 500000000
358 1000000000
359 1000000000
360 1000000000
361 1000000000
362 700000000
363 75000000
364 806000000
365 300000000
366 19200000
367 100000000
368 200000000
369 300000000
370 300000000
371 300000000
372 19200000
373 300000000
374 19200000
375 100000000
376 1000000000
377 1000000000
378 100000000
379 19200000
380 1000000000
381 1000000000
382 19200000
383 800000000>;
384 };
385 };
386};
387
388&cpufreq_hw {
389 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
390 <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
391 <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
392 interrupt-names = "dcvsh0_int", "dcvsh1_int", "dcvsh2_int";
393};