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Vinayak Holikattie0eca632013-02-25 21:44:33 +05301/*
2 * Universal Flash Storage Host controller driver
3 *
4 * This code is based on drivers/scsi/ufs/ufshcd.h
5 * Copyright (C) 2011-2013 Samsung India Software Operations
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02006 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
Vinayak Holikattie0eca632013-02-25 21:44:33 +05307 *
8 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
35 */
36
37#ifndef _UFSHCD_H
38#define _UFSHCD_H
39
40#include <linux/module.h>
41#include <linux/kernel.h>
42#include <linux/init.h>
43#include <linux/interrupt.h>
44#include <linux/io.h>
45#include <linux/delay.h>
46#include <linux/slab.h>
47#include <linux/spinlock.h>
48#include <linux/workqueue.h>
49#include <linux/errno.h>
50#include <linux/types.h>
51#include <linux/wait.h>
52#include <linux/bitops.h>
53#include <linux/pm_runtime.h>
54#include <linux/clk.h>
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053055#include <linux/completion.h>
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +030056#include <linux/regulator/consumer.h>
Yaniv Gardif37aabc2016-03-10 17:37:20 +020057#include "unipro.h"
Vinayak Holikattie0eca632013-02-25 21:44:33 +053058
59#include <asm/irq.h>
60#include <asm/byteorder.h>
61#include <scsi/scsi.h>
62#include <scsi/scsi_cmnd.h>
63#include <scsi/scsi_host.h>
64#include <scsi/scsi_tcq.h>
65#include <scsi/scsi_dbg.h>
66#include <scsi/scsi_eh.h>
67
68#include "ufs.h"
69#include "ufshci.h"
70
71#define UFSHCD "ufshcd"
72#define UFSHCD_DRIVER_VERSION "0.2"
73
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +030074struct ufs_hba;
75
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053076enum dev_cmd_type {
77 DEV_CMD_TYPE_NOP = 0x0,
Dolev Raviv68078d52013-07-30 00:35:58 +053078 DEV_CMD_TYPE_QUERY = 0x1,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053079};
80
Vinayak Holikattie0eca632013-02-25 21:44:33 +053081/**
82 * struct uic_command - UIC command structure
83 * @command: UIC command
84 * @argument1: UIC command argument 1
85 * @argument2: UIC command argument 2
86 * @argument3: UIC command argument 3
87 * @cmd_active: Indicate if UIC command is outstanding
88 * @result: UIC command result
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053089 * @done: UIC command completion
Vinayak Holikattie0eca632013-02-25 21:44:33 +053090 */
91struct uic_command {
92 u32 command;
93 u32 argument1;
94 u32 argument2;
95 u32 argument3;
96 int cmd_active;
97 int result;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053098 struct completion done;
Vinayak Holikattie0eca632013-02-25 21:44:33 +053099};
100
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300101/* Used to differentiate the power management options */
102enum ufs_pm_op {
103 UFS_RUNTIME_PM,
104 UFS_SYSTEM_PM,
105 UFS_SHUTDOWN_PM,
106};
107
108#define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
109#define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
110#define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
111
112/* Host <-> Device UniPro Link state */
113enum uic_link_state {
114 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
115 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
116 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
117};
118
119#define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
120#define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
121 UIC_LINK_ACTIVE_STATE)
122#define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
123 UIC_LINK_HIBERN8_STATE)
124#define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
125#define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
126 UIC_LINK_ACTIVE_STATE)
127#define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
128 UIC_LINK_HIBERN8_STATE)
129
130/*
131 * UFS Power management levels.
132 * Each level is in increasing order of power savings.
133 */
134enum ufs_pm_level {
135 UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
136 UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
137 UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
138 UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
139 UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
140 UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
141 UFS_PM_LVL_MAX
142};
143
144struct ufs_pm_lvl_states {
145 enum ufs_dev_pwr_mode dev_state;
146 enum uic_link_state link_state;
147};
148
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530149/**
150 * struct ufshcd_lrb - local reference block
151 * @utr_descriptor_ptr: UTRD address of the command
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530152 * @ucd_req_ptr: UCD address of the command
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530153 * @ucd_rsp_ptr: Response UPIU address for this command
154 * @ucd_prdt_ptr: PRDT address of the command
155 * @cmd: pointer to SCSI command
156 * @sense_buffer: pointer to sense buffer address of the SCSI command
157 * @sense_bufflen: Length of the sense buffer
158 * @scsi_status: SCSI status of the command
159 * @command_type: SCSI, UFS, Query.
160 * @task_tag: Task tag of the command
161 * @lun: LUN of the command
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530162 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530163 */
164struct ufshcd_lrb {
165 struct utp_transfer_req_desc *utr_descriptor_ptr;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530166 struct utp_upiu_req *ucd_req_ptr;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530167 struct utp_upiu_rsp *ucd_rsp_ptr;
168 struct ufshcd_sg_entry *ucd_prdt_ptr;
169
170 struct scsi_cmnd *cmd;
171 u8 *sense_buffer;
172 unsigned int sense_bufflen;
173 int scsi_status;
174
175 int command_type;
176 int task_tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +0300177 u8 lun; /* UPIU LUN id field is only 8-bit wide */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530178 bool intr_cmd;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530179};
180
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530181/**
Tomas Winklera230c2f2016-02-09 10:25:41 +0200182 * struct ufs_query - holds relevant data structures for query request
Dolev Raviv68078d52013-07-30 00:35:58 +0530183 * @request: request upiu and function
184 * @descriptor: buffer for sending/receiving descriptor
185 * @response: response upiu and response
186 */
187struct ufs_query {
188 struct ufs_query_req request;
189 u8 *descriptor;
190 struct ufs_query_res response;
191};
192
193/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530194 * struct ufs_dev_cmd - all assosiated fields with device management commands
195 * @type: device management command type - Query, NOP OUT
196 * @lock: lock to allow one command at a time
197 * @complete: internal commands completion
198 * @tag_wq: wait queue until free command slot is available
199 */
200struct ufs_dev_cmd {
201 enum dev_cmd_type type;
202 struct mutex lock;
203 struct completion *complete;
204 wait_queue_head_t tag_wq;
Dolev Raviv68078d52013-07-30 00:35:58 +0530205 struct ufs_query query;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530206};
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530207
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +0300208/**
209 * struct ufs_clk_info - UFS clock related info
210 * @list: list headed by hba->clk_list_head
211 * @clk: clock node
212 * @name: clock name
213 * @max_freq: maximum frequency supported by the clock
Sahitya Tummala4cff6d992014-09-25 15:32:33 +0300214 * @min_freq: min frequency that can be used for clock scaling
Sahitya Tummala856b3482014-09-25 15:32:34 +0300215 * @curr_freq: indicates the current frequency that it is set to
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +0300216 * @enabled: variable to check against multiple enable/disable
217 */
218struct ufs_clk_info {
219 struct list_head list;
220 struct clk *clk;
221 const char *name;
222 u32 max_freq;
Sahitya Tummala4cff6d992014-09-25 15:32:33 +0300223 u32 min_freq;
Sahitya Tummala856b3482014-09-25 15:32:34 +0300224 u32 curr_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +0300225 bool enabled;
226};
227
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200228enum ufs_notify_change_status {
229 PRE_CHANGE,
230 POST_CHANGE,
231};
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300232
233struct ufs_pa_layer_attr {
234 u32 gear_rx;
235 u32 gear_tx;
236 u32 lane_rx;
237 u32 lane_tx;
238 u32 pwr_rx;
239 u32 pwr_tx;
240 u32 hs_rate;
241};
242
243struct ufs_pwr_mode_info {
244 bool is_valid;
245 struct ufs_pa_layer_attr info;
246};
247
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300248/**
249 * struct ufs_hba_variant_ops - variant specific callbacks
250 * @name: variant name
251 * @init: called when the driver is initialized
252 * @exit: called to cleanup everything done in init
Yaniv Gardi9949e702015-05-17 18:55:05 +0300253 * @get_ufs_hci_version: called to get UFS HCI version
Sahitya Tummala856b3482014-09-25 15:32:34 +0300254 * @clk_scale_notify: notifies that clks are scaled up/down
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300255 * @setup_clocks: called before touching any of the controller registers
256 * @setup_regulators: called before accessing the host controller
257 * @hce_enable_notify: called before and after HCE enable bit is set to allow
258 * variant specific Uni-Pro initialization.
259 * @link_startup_notify: called before and after Link startup is carried out
260 * to allow variant specific Uni-Pro initialization.
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300261 * @pwr_change_notify: called before and after a power mode change
262 * is carried out to allow vendor spesific capabilities
263 * to be set.
Kiwoong Kim0e675ef2016-11-10 21:14:36 +0900264 * @setup_xfer_req: called before any transfer request is issued
265 * to set some things
Kiwoong Kimd2877be2016-11-10 21:16:15 +0900266 * @setup_task_mgmt: called before any task management request is issued
267 * to set some things
Kiwoong Kimee32c902016-11-10 21:17:43 +0900268 * @hibern8_notify: called around hibern8 enter/exit
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800269 * @apply_dev_quirks: called to apply device specific quirks
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300270 * @suspend: called during host controller PM callback
271 * @resume: called during host controller PM callback
Yaniv Gardi6e3fd442015-10-28 13:15:50 +0200272 * @dbg_register_dump: used to dump controller debug information
Joao Pinto4b9ffb52016-05-11 12:21:30 +0100273 * @phy_initialization: used to initialize phys
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300274 */
275struct ufs_hba_variant_ops {
276 const char *name;
277 int (*init)(struct ufs_hba *);
278 void (*exit)(struct ufs_hba *);
Yaniv Gardi9949e702015-05-17 18:55:05 +0300279 u32 (*get_ufs_hci_version)(struct ufs_hba *);
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200280 int (*clk_scale_notify)(struct ufs_hba *, bool,
281 enum ufs_notify_change_status);
Subhash Jadavani1e879e82016-10-06 21:48:22 -0700282 int (*setup_clocks)(struct ufs_hba *, bool,
283 enum ufs_notify_change_status);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300284 int (*setup_regulators)(struct ufs_hba *, bool);
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200285 int (*hce_enable_notify)(struct ufs_hba *,
286 enum ufs_notify_change_status);
287 int (*link_startup_notify)(struct ufs_hba *,
288 enum ufs_notify_change_status);
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300289 int (*pwr_change_notify)(struct ufs_hba *,
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200290 enum ufs_notify_change_status status,
291 struct ufs_pa_layer_attr *,
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300292 struct ufs_pa_layer_attr *);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +0900293 void (*setup_xfer_req)(struct ufs_hba *, int, bool);
Kiwoong Kimd2877be2016-11-10 21:16:15 +0900294 void (*setup_task_mgmt)(struct ufs_hba *, int, u8);
Kiwoong Kimee32c902016-11-10 21:17:43 +0900295 void (*hibern8_notify)(struct ufs_hba *, enum uic_cmd_dme,
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800296 enum ufs_notify_change_status);
297 int (*apply_dev_quirks)(struct ufs_hba *);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300298 int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
299 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
Yaniv Gardi6e3fd442015-10-28 13:15:50 +0200300 void (*dbg_register_dump)(struct ufs_hba *hba);
Joao Pinto4b9ffb52016-05-11 12:21:30 +0100301 int (*phy_initialization)(struct ufs_hba *);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300302};
303
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300304/* clock gating state */
305enum clk_gating_state {
306 CLKS_OFF,
307 CLKS_ON,
308 REQ_CLKS_OFF,
309 REQ_CLKS_ON,
310};
311
312/**
313 * struct ufs_clk_gating - UFS clock gating related info
314 * @gate_work: worker to turn off clocks after some delay as specified in
315 * delay_ms
316 * @ungate_work: worker to turn on clocks that will be used in case of
317 * interrupt context
318 * @state: the current clocks state
319 * @delay_ms: gating delay in ms
320 * @is_suspended: clk gating is suspended when set to 1 which can be used
321 * during suspend/resume
322 * @delay_attr: sysfs attribute to control delay_attr
Sahitya Tummalab4274112016-12-22 18:40:39 -0800323 * @enable_attr: sysfs attribute to enable/disable clock gating
324 * @is_enabled: Indicates the current status of clock gating
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300325 * @active_reqs: number of requests that are pending and should be waited for
326 * completion before gating clocks.
327 */
328struct ufs_clk_gating {
329 struct delayed_work gate_work;
330 struct work_struct ungate_work;
331 enum clk_gating_state state;
332 unsigned long delay_ms;
333 bool is_suspended;
334 struct device_attribute delay_attr;
Sahitya Tummalab4274112016-12-22 18:40:39 -0800335 struct device_attribute enable_attr;
336 bool is_enabled;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300337 int active_reqs;
338};
339
Sahitya Tummala856b3482014-09-25 15:32:34 +0300340struct ufs_clk_scaling {
341 ktime_t busy_start_t;
342 bool is_busy_started;
343 unsigned long tot_busy_t;
344 unsigned long window_start_t;
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800345 struct device_attribute enable_attr;
346 bool is_allowed;
Sahitya Tummala856b3482014-09-25 15:32:34 +0300347};
348
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530349/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +0300350 * struct ufs_init_prefetch - contains data that is pre-fetched once during
351 * initialization
352 * @icc_level: icc level which was read during initialization
353 */
354struct ufs_init_prefetch {
355 u32 icc_level;
356};
357
358/**
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530359 * struct ufs_hba - per adapter private structure
360 * @mmio_base: UFSHCI base register address
361 * @ucdl_base_addr: UFS Command Descriptor base address
362 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
363 * @utmrdl_base_addr: UTP Task Management Descriptor base address
364 * @ucdl_dma_addr: UFS Command Descriptor DMA address
365 * @utrdl_dma_addr: UTRDL DMA address
366 * @utmrdl_dma_addr: UTMRDL DMA address
367 * @host: Scsi_Host instance of the driver
368 * @dev: device handle
369 * @lrb: local reference block
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530370 * @lrb_in_use: lrb in use
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530371 * @outstanding_tasks: Bits representing outstanding task requests
372 * @outstanding_reqs: Bits representing outstanding transfer requests
373 * @capabilities: UFS Controller Capabilities
374 * @nutrs: Transfer Request Queue depth supported by controller
375 * @nutmrs: Task Management Queue depth supported by controller
376 * @ufs_version: UFS Version to which controller complies
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300377 * @vops: pointer to variant specific operations
378 * @priv: pointer to variant specific private data
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530379 * @irq: Irq number of the controller
380 * @active_uic_cmd: handle of active UIC command
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +0530381 * @uic_cmd_mutex: mutex for uic command
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530382 * @tm_wq: wait queue for task management
383 * @tm_tag_wq: wait queue for free task management slots
384 * @tm_slots_in_use: bit map of task management request slots in use
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +0530385 * @pwr_done: completion for power mode change
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530386 * @tm_condition: condition variable for task management
387 * @ufshcd_state: UFSHCD states
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530388 * @eh_flags: Error handling flags
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530389 * @intr_mask: Interrupt Mask Bits
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530390 * @ee_ctrl_mask: Exception event control mask
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300391 * @is_powered: flag to check if HBA is powered
Yaniv Gardi3a4bf062014-09-25 15:32:27 +0300392 * @is_init_prefetch: flag to check if data was pre-fetched in initialization
393 * @init_prefetch_data: data pre-fetched during initialization
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530394 * @eh_work: Worker to handle UFS errors that require s/w attention
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530395 * @eeh_work: Worker to handle exception events
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530396 * @errors: HBA errors
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530397 * @uic_error: UFS interconnect layer error status
398 * @saved_err: sticky error mask
399 * @saved_uic_err: sticky UIC error mask
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530400 * @dev_cmd: ufs device management command information
Yaniv Gardicad2e032015-03-31 17:37:14 +0300401 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530402 * @auto_bkops_enabled: to track whether bkops is enabled in device
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +0300403 * @vreg_info: UFS device voltage regulator information
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +0300404 * @clk_list_head: UFS host controller clocks list node head
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300405 * @pwr_info: holds current power mode
406 * @max_pwr_info: keeps the device max valid pwm
Yaniv Gardiafdfff52016-03-10 17:37:15 +0200407 * @urgent_bkops_lvl: keeps track of urgent bkops level for device
408 * @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for
409 * device is known or not.
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530410 */
411struct ufs_hba {
412 void __iomem *mmio_base;
413
414 /* Virtual memory reference */
415 struct utp_transfer_cmd_desc *ucdl_base_addr;
416 struct utp_transfer_req_desc *utrdl_base_addr;
417 struct utp_task_req_desc *utmrdl_base_addr;
418
419 /* DMA memory reference */
420 dma_addr_t ucdl_dma_addr;
421 dma_addr_t utrdl_dma_addr;
422 dma_addr_t utmrdl_dma_addr;
423
424 struct Scsi_Host *host;
425 struct device *dev;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +0300426 /*
427 * This field is to keep a reference to "scsi_device" corresponding to
428 * "UFS device" W-LU.
429 */
430 struct scsi_device *sdev_ufs_device;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530431
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300432 enum ufs_dev_pwr_mode curr_dev_pwr_mode;
433 enum uic_link_state uic_link_state;
434 /* Desired UFS power management level during runtime PM */
435 enum ufs_pm_level rpm_lvl;
436 /* Desired UFS power management level during system PM */
437 enum ufs_pm_level spm_lvl;
subhashj@codeaurora.org09690d52016-12-22 18:41:00 -0800438 struct device_attribute rpm_lvl_attr;
439 struct device_attribute spm_lvl_attr;
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300440 int pm_op_in_progress;
441
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530442 struct ufshcd_lrb *lrb;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530443 unsigned long lrb_in_use;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530444
445 unsigned long outstanding_tasks;
446 unsigned long outstanding_reqs;
447
448 u32 capabilities;
449 int nutrs;
450 int nutmrs;
451 u32 ufs_version;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300452 struct ufs_hba_variant_ops *vops;
453 void *priv;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530454 unsigned int irq;
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300455 bool is_irq_enabled;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530456
Yaniv Gardib8521902015-05-17 18:54:57 +0300457 /* Interrupt aggregation support is broken */
458 #define UFSHCD_QUIRK_BROKEN_INTR_AGGR UFS_BIT(0)
459
Yaniv Gardicad2e032015-03-31 17:37:14 +0300460 /*
461 * delay before each dme command is required as the unipro
462 * layer has shown instabilities
463 */
Yaniv Gardib8521902015-05-17 18:54:57 +0300464 #define UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS UFS_BIT(1)
465
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +0300466 /*
467 * If UFS host controller is having issue in processing LCC (Line
468 * Control Command) coming from device then enable this quirk.
469 * When this quirk is enabled, host controller driver should disable
470 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
471 * attribute of device to 0).
472 */
473 #define UFSHCD_QUIRK_BROKEN_LCC UFS_BIT(2)
Yaniv Gardicad2e032015-03-31 17:37:14 +0300474
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +0300475 /*
476 * The attribute PA_RXHSUNTERMCAP specifies whether or not the
477 * inbound Link supports unterminated line in HS mode. Setting this
478 * attribute to 1 fixes moving to HS gear.
479 */
480 #define UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP UFS_BIT(3)
481
Yaniv Gardi874237f2015-05-17 18:55:03 +0300482 /*
483 * This quirk needs to be enabled if the host contoller only allows
484 * accessing the peer dme attributes in AUTO mode (FAST AUTO or
485 * SLOW AUTO).
486 */
487 #define UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE UFS_BIT(4)
488
Yaniv Gardi9949e702015-05-17 18:55:05 +0300489 /*
490 * This quirk needs to be enabled if the host contoller doesn't
491 * advertise the correct version in UFS_VER register. If this quirk
492 * is enabled, standard UFS host driver will call the vendor specific
493 * ops (get_ufs_hci_version) to get the correct version.
494 */
495 #define UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION UFS_BIT(5)
496
Kiwoong Kim75b1cc42016-11-22 17:06:59 +0900497 /*
498 * This quirk needs to be enabled if the host contoller regards
499 * resolution of the values of PRDTO and PRDTL in UTRD as byte.
500 */
501 #define UFSHCD_QUIRK_PRDT_BYTE_GRAN UFS_BIT(7)
502
Yaniv Gardicad2e032015-03-31 17:37:14 +0300503 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +0530504
Yaniv Gardic58ab7a2016-03-10 17:37:10 +0200505 /* Device deviations from standard UFS device spec. */
506 unsigned int dev_quirks;
507
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530508 wait_queue_head_t tm_wq;
509 wait_queue_head_t tm_tag_wq;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530510 unsigned long tm_condition;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530511 unsigned long tm_slots_in_use;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530512
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300513 struct uic_command *active_uic_cmd;
514 struct mutex uic_cmd_mutex;
515 struct completion *uic_async_done;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +0530516
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530517 u32 ufshcd_state;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530518 u32 eh_flags;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530519 u32 intr_mask;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530520 u16 ee_ctrl_mask;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300521 bool is_powered;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +0300522 bool is_init_prefetch;
523 struct ufs_init_prefetch init_prefetch_data;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530524
525 /* Work Queues */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530526 struct work_struct eh_work;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530527 struct work_struct eeh_work;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530528
529 /* HBA Errors */
530 u32 errors;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530531 u32 uic_error;
532 u32 saved_err;
533 u32 saved_uic_err;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530534
535 /* Device management request data */
536 struct ufs_dev_cmd dev_cmd;
Yaniv Gardicad2e032015-03-31 17:37:14 +0300537 ktime_t last_dme_cmd_tstamp;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530538
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300539 /* Keeps information of the UFS device connected to this host */
540 struct ufs_dev_info dev_info;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530541 bool auto_bkops_enabled;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +0300542 struct ufs_vreg_info vreg_info;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +0300543 struct list_head clk_list_head;
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300544
545 bool wlun_dev_clr_ua;
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300546
Yaniv Gardi54b879b2016-03-10 17:37:05 +0200547 /* Number of lanes available (1 or 2) for Rx/Tx */
548 u32 lanes_per_direction;
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300549 struct ufs_pa_layer_attr pwr_info;
550 struct ufs_pwr_mode_info max_pwr_info;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300551
552 struct ufs_clk_gating clk_gating;
553 /* Control to enable/disable host capabilities */
554 u32 caps;
555 /* Allow dynamic clk gating */
556#define UFSHCD_CAP_CLK_GATING (1 << 0)
557 /* Allow hiberb8 with clk gating */
558#define UFSHCD_CAP_HIBERN8_WITH_CLK_GATING (1 << 1)
Sahitya Tummala856b3482014-09-25 15:32:34 +0300559 /* Allow dynamic clk scaling */
560#define UFSHCD_CAP_CLK_SCALING (1 << 2)
Subhash Jadavani374a2462014-09-25 15:32:35 +0300561 /* Allow auto bkops to enabled during runtime suspend */
562#define UFSHCD_CAP_AUTO_BKOPS_SUSPEND (1 << 3)
Yaniv Gardib8521902015-05-17 18:54:57 +0300563 /*
564 * This capability allows host controller driver to use the UFS HCI's
565 * interrupt aggregation capability.
566 * CAUTION: Enabling this might reduce overall UFS throughput.
567 */
568#define UFSHCD_CAP_INTR_AGGR (1 << 4)
Sahitya Tummala856b3482014-09-25 15:32:34 +0300569
570 struct devfreq *devfreq;
571 struct ufs_clk_scaling clk_scaling;
Dolev Ravive7850602014-09-25 15:32:36 +0300572 bool is_sys_suspended;
Yaniv Gardiafdfff52016-03-10 17:37:15 +0200573
574 enum bkops_status urgent_bkops_lvl;
575 bool is_urgent_bkops_lvl_checked;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530576};
577
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300578/* Returns true if clocks can be gated. Otherwise false */
579static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
580{
581 return hba->caps & UFSHCD_CAP_CLK_GATING;
582}
583static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
584{
585 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
586}
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800587static inline int ufshcd_is_clkscaling_supported(struct ufs_hba *hba)
Sahitya Tummala856b3482014-09-25 15:32:34 +0300588{
589 return hba->caps & UFSHCD_CAP_CLK_SCALING;
590}
Subhash Jadavani374a2462014-09-25 15:32:35 +0300591static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
592{
593 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
594}
595
Yaniv Gardib8521902015-05-17 18:54:57 +0300596static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
597{
Joao Pinto4b9ffb52016-05-11 12:21:30 +0100598/* DWC UFS Core has the Interrupt aggregation feature but is not detectable*/
599#ifndef CONFIG_SCSI_UFS_DWC
Yaniv Gardib8521902015-05-17 18:54:57 +0300600 if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
601 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
602 return true;
603 else
604 return false;
Joao Pinto4b9ffb52016-05-11 12:21:30 +0100605#else
606return true;
607#endif
Yaniv Gardib8521902015-05-17 18:54:57 +0300608}
609
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530610#define ufshcd_writel(hba, val, reg) \
611 writel((val), (hba)->mmio_base + (reg))
612#define ufshcd_readl(hba, reg) \
613 readl((hba)->mmio_base + (reg))
614
Dolev Ravive7850602014-09-25 15:32:36 +0300615/**
616 * ufshcd_rmwl - read modify write into a register
617 * @hba - per adapter instance
618 * @mask - mask to apply on read value
619 * @val - actual value to write
620 * @reg - register address
621 */
622static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
623{
624 u32 tmp;
625
626 tmp = ufshcd_readl(hba, reg);
627 tmp &= ~mask;
628 tmp |= (val & mask);
629 ufshcd_writel(hba, tmp, reg);
630}
631
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300632int ufshcd_alloc_host(struct device *, struct ufs_hba **);
Yaniv Gardi47555a52015-10-28 13:15:49 +0200633void ufshcd_dealloc_host(struct ufs_hba *);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300634int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530635void ufshcd_remove(struct ufs_hba *);
Yaniv Gardi596585a2016-03-10 17:37:08 +0200636int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
637 u32 val, unsigned long interval_us,
638 unsigned long timeout_ms, bool can_sleep);
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530639
Dolev Raviv68078d52013-07-30 00:35:58 +0530640static inline void check_upiu_size(void)
641{
642 BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
643 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
644}
645
Yaniv Gardi1ce58982015-10-28 13:15:47 +0200646/**
647 * ufshcd_set_variant - set variant specific data to the hba
648 * @hba - per adapter instance
649 * @variant - pointer to variant specific data
650 */
651static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
652{
653 BUG_ON(!hba);
654 hba->priv = variant;
655}
656
657/**
658 * ufshcd_get_variant - get variant specific data from the hba
659 * @hba - per adapter instance
660 */
661static inline void *ufshcd_get_variant(struct ufs_hba *hba)
662{
663 BUG_ON(!hba);
664 return hba->priv;
665}
666
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530667extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
668extern int ufshcd_runtime_resume(struct ufs_hba *hba);
669extern int ufshcd_runtime_idle(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300670extern int ufshcd_system_suspend(struct ufs_hba *hba);
671extern int ufshcd_system_resume(struct ufs_hba *hba);
672extern int ufshcd_shutdown(struct ufs_hba *hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530673extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
674 u8 attr_set, u32 mib_val, u8 peer);
675extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
676 u32 *mib_val, u8 peer);
677
678/* UIC command interfaces for DME primitives */
679#define DME_LOCAL 0
680#define DME_PEER 1
681#define ATTR_SET_NOR 0 /* NORMAL */
682#define ATTR_SET_ST 1 /* STATIC */
683
684static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
685 u32 mib_val)
686{
687 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
688 mib_val, DME_LOCAL);
689}
690
691static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
692 u32 mib_val)
693{
694 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
695 mib_val, DME_LOCAL);
696}
697
698static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
699 u32 mib_val)
700{
701 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
702 mib_val, DME_PEER);
703}
704
705static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
706 u32 mib_val)
707{
708 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
709 mib_val, DME_PEER);
710}
711
712static inline int ufshcd_dme_get(struct ufs_hba *hba,
713 u32 attr_sel, u32 *mib_val)
714{
715 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
716}
717
718static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
719 u32 attr_sel, u32 *mib_val)
720{
721 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
722}
723
Yaniv Gardib573d482016-03-10 17:37:09 +0200724int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size);
725
Yaniv Gardif37aabc2016-03-10 17:37:20 +0200726static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info)
727{
728 return (pwr_info->pwr_rx == FAST_MODE ||
729 pwr_info->pwr_rx == FASTAUTO_MODE) &&
730 (pwr_info->pwr_tx == FAST_MODE ||
731 pwr_info->pwr_tx == FASTAUTO_MODE);
732}
733
Yaniv Gardib573d482016-03-10 17:37:09 +0200734#define ASCII_STD true
735
736int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index, u8 *buf,
737 u32 size, bool ascii);
738
Yaniv Gardidc3c8d32016-02-01 15:02:46 +0200739/* Expose Query-Request API */
740int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
741 enum flag_idn idn, bool *flag_res);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300742int ufshcd_hold(struct ufs_hba *hba, bool async);
743void ufshcd_release(struct ufs_hba *hba);
Yaniv Gardi37113102016-03-10 17:37:16 +0200744u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba);
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200745
746/* Wrapper functions for safely calling variant operations */
747static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
748{
749 if (hba->vops)
750 return hba->vops->name;
751 return "";
752}
753
754static inline int ufshcd_vops_init(struct ufs_hba *hba)
755{
756 if (hba->vops && hba->vops->init)
757 return hba->vops->init(hba);
758
759 return 0;
760}
761
762static inline void ufshcd_vops_exit(struct ufs_hba *hba)
763{
764 if (hba->vops && hba->vops->exit)
765 return hba->vops->exit(hba);
766}
767
768static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
769{
770 if (hba->vops && hba->vops->get_ufs_hci_version)
771 return hba->vops->get_ufs_hci_version(hba);
772
773 return ufshcd_readl(hba, REG_UFS_VERSION);
774}
775
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200776static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
777 bool up, enum ufs_notify_change_status status)
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200778{
779 if (hba->vops && hba->vops->clk_scale_notify)
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200780 return hba->vops->clk_scale_notify(hba, up, status);
781 return 0;
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200782}
783
Subhash Jadavani1e879e82016-10-06 21:48:22 -0700784static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on,
785 enum ufs_notify_change_status status)
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200786{
787 if (hba->vops && hba->vops->setup_clocks)
Subhash Jadavani1e879e82016-10-06 21:48:22 -0700788 return hba->vops->setup_clocks(hba, on, status);
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200789 return 0;
790}
791
792static inline int ufshcd_vops_setup_regulators(struct ufs_hba *hba, bool status)
793{
794 if (hba->vops && hba->vops->setup_regulators)
795 return hba->vops->setup_regulators(hba, status);
796
797 return 0;
798}
799
800static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
801 bool status)
802{
803 if (hba->vops && hba->vops->hce_enable_notify)
804 return hba->vops->hce_enable_notify(hba, status);
805
806 return 0;
807}
808static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
809 bool status)
810{
811 if (hba->vops && hba->vops->link_startup_notify)
812 return hba->vops->link_startup_notify(hba, status);
813
814 return 0;
815}
816
817static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
818 bool status,
819 struct ufs_pa_layer_attr *dev_max_params,
820 struct ufs_pa_layer_attr *dev_req_params)
821{
822 if (hba->vops && hba->vops->pwr_change_notify)
823 return hba->vops->pwr_change_notify(hba, status,
824 dev_max_params, dev_req_params);
825
826 return -ENOTSUPP;
827}
828
Kiwoong Kim0e675ef2016-11-10 21:14:36 +0900829static inline void ufshcd_vops_setup_xfer_req(struct ufs_hba *hba, int tag,
830 bool is_scsi_cmd)
831{
832 if (hba->vops && hba->vops->setup_xfer_req)
833 return hba->vops->setup_xfer_req(hba, tag, is_scsi_cmd);
834}
835
Kiwoong Kimd2877be2016-11-10 21:16:15 +0900836static inline void ufshcd_vops_setup_task_mgmt(struct ufs_hba *hba,
837 int tag, u8 tm_function)
838{
839 if (hba->vops && hba->vops->setup_task_mgmt)
840 return hba->vops->setup_task_mgmt(hba, tag, tm_function);
841}
842
Kiwoong Kimee32c902016-11-10 21:17:43 +0900843static inline void ufshcd_vops_hibern8_notify(struct ufs_hba *hba,
844 enum uic_cmd_dme cmd,
845 enum ufs_notify_change_status status)
846{
847 if (hba->vops && hba->vops->hibern8_notify)
848 return hba->vops->hibern8_notify(hba, cmd, status);
849}
850
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800851static inline int ufshcd_vops_apply_dev_quirks(struct ufs_hba *hba)
852{
853 if (hba->vops && hba->vops->apply_dev_quirks)
854 return hba->vops->apply_dev_quirks(hba);
855 return 0;
856}
857
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200858static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op)
859{
860 if (hba->vops && hba->vops->suspend)
861 return hba->vops->suspend(hba, op);
862
863 return 0;
864}
865
866static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
867{
868 if (hba->vops && hba->vops->resume)
869 return hba->vops->resume(hba, op);
870
871 return 0;
872}
873
Yaniv Gardi6e3fd442015-10-28 13:15:50 +0200874static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
875{
876 if (hba->vops && hba->vops->dbg_register_dump)
877 hba->vops->dbg_register_dump(hba);
878}
879
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530880#endif /* End of Header */