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Steven Tothd19770e2007-03-11 20:44:05 -03001/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
Steven Toth6d897612008-09-03 17:12:12 -03004 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
Steven Tothd19770e2007-03-11 20:44:05 -03005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
Steven Tothd19770e2007-03-11 20:44:05 -030016 */
17
18#include <linux/init.h>
19#include <linux/module.h>
20#include <linux/pci.h>
21#include <linux/delay.h>
Steven Toth7b888012008-01-10 03:40:49 -030022#include <media/cx25840.h>
Igor M. Liplianin78db8542011-01-25 17:04:00 -030023#include <linux/firmware.h>
Igor M. Liplianincff4fa82011-09-23 11:17:41 -030024#include <misc/altera.h>
Steven Tothd19770e2007-03-11 20:44:05 -030025
26#include "cx23885.h"
Steven Toth90a71b12008-08-04 21:38:46 -030027#include "tuner-xc2028.h"
Abylay Ospanb8f0d302011-07-14 05:20:29 -030028#include "netup-eeprom.h"
Igor M. Liplianin5a23b072009-03-03 12:06:09 -030029#include "netup-init.h"
Igor M. Liplianin78db8542011-01-25 17:04:00 -030030#include "altera-ci.h"
istvan_v@mailbox.hu0cf8af52011-07-11 10:58:35 -030031#include "xc4000.h"
Igor M. Liplianin78db8542011-01-25 17:04:00 -030032#include "xc5000.h"
Andy Walls29f8a0a2009-09-26 23:17:30 -030033#include "cx23888-ir.h"
Steven Tothd19770e2007-03-11 20:44:05 -030034
Anton Nurkin89343052012-08-14 01:35:44 -030035static unsigned int netup_card_rev = 4;
Abylay Ospan2d124212011-07-18 04:14:28 -030036module_param(netup_card_rev, int, 0644);
37MODULE_PARM_DESC(netup_card_rev,
38 "NetUP Dual DVB-T/C CI card revision");
Andy Wallsfa647f22010-07-19 21:22:05 -030039static unsigned int enable_885_ir;
40module_param(enable_885_ir, int, 0644);
41MODULE_PARM_DESC(enable_885_ir,
42 "Enable integrated IR controller for supported\n"
43 "\t\t CX2388[57] boards that are wired for it:\n"
44 "\t\t\tHVR-1250 (reported safe)\n"
Djuri Baars076f0e32012-07-28 09:01:38 -030045 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n"
Andy Wallsfa647f22010-07-19 21:22:05 -030046 "\t\t\tTeVii S470 (reported unsafe)\n"
47 "\t\t This can cause an interrupt storm with some cards.\n"
48 "\t\t Default: 0 [Disabled]");
49
Steven Tothd19770e2007-03-11 20:44:05 -030050/* ------------------------------------------------------------------ */
51/* board config info */
52
53struct cx23885_board cx23885_boards[] = {
54 [CX23885_BOARD_UNKNOWN] = {
55 .name = "UNKNOWN/GENERIC",
Steven Tothc7712612008-01-10 02:24:27 -030056 /* Ensure safe default for unknown boards */
57 .clk_freq = 0,
Steven Tothd19770e2007-03-11 20:44:05 -030058 .input = {{
59 .type = CX23885_VMUX_COMPOSITE1,
60 .vmux = 0,
Steven Toth9c8ced52008-10-16 20:18:44 -030061 }, {
Steven Tothd19770e2007-03-11 20:44:05 -030062 .type = CX23885_VMUX_COMPOSITE2,
63 .vmux = 1,
Steven Toth9c8ced52008-10-16 20:18:44 -030064 }, {
Steven Tothd19770e2007-03-11 20:44:05 -030065 .type = CX23885_VMUX_COMPOSITE3,
66 .vmux = 2,
Steven Toth9c8ced52008-10-16 20:18:44 -030067 }, {
Steven Tothd19770e2007-03-11 20:44:05 -030068 .type = CX23885_VMUX_COMPOSITE4,
69 .vmux = 3,
Steven Toth9c8ced52008-10-16 20:18:44 -030070 } },
Steven Tothd19770e2007-03-11 20:44:05 -030071 },
72 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
73 .name = "Hauppauge WinTV-HVR1800lp",
Steven Tothd19770e2007-03-11 20:44:05 -030074 .portc = CX23885_MPEG_DVB,
75 .input = {{
76 .type = CX23885_VMUX_TELEVISION,
77 .vmux = 0,
78 .gpio0 = 0xff00,
Steven Toth9c8ced52008-10-16 20:18:44 -030079 }, {
Steven Tothd19770e2007-03-11 20:44:05 -030080 .type = CX23885_VMUX_DEBUG,
81 .vmux = 0,
82 .gpio0 = 0xff01,
Steven Toth9c8ced52008-10-16 20:18:44 -030083 }, {
Steven Tothd19770e2007-03-11 20:44:05 -030084 .type = CX23885_VMUX_COMPOSITE1,
85 .vmux = 1,
86 .gpio0 = 0xff02,
Steven Toth9c8ced52008-10-16 20:18:44 -030087 }, {
Steven Tothd19770e2007-03-11 20:44:05 -030088 .type = CX23885_VMUX_SVIDEO,
89 .vmux = 2,
90 .gpio0 = 0xff02,
Steven Toth9c8ced52008-10-16 20:18:44 -030091 } },
Steven Tothd19770e2007-03-11 20:44:05 -030092 },
93 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
94 .name = "Hauppauge WinTV-HVR1800",
Steven Toth7b888012008-01-10 03:40:49 -030095 .porta = CX23885_ANALOG_VIDEO,
Steven Totha589b662008-01-13 23:44:47 -030096 .portb = CX23885_MPEG_ENCODER,
Steven Tothd19770e2007-03-11 20:44:05 -030097 .portc = CX23885_MPEG_DVB,
Steven Toth7b888012008-01-10 03:40:49 -030098 .tuner_type = TUNER_PHILIPS_TDA8290,
99 .tuner_addr = 0x42, /* 0x84 >> 1 */
Igor M. Liplianin557f48d2011-01-25 17:05:00 -0300100 .tuner_bus = 1,
Steven Tothd19770e2007-03-11 20:44:05 -0300101 .input = {{
102 .type = CX23885_VMUX_TELEVISION,
Steven Toth7b888012008-01-10 03:40:49 -0300103 .vmux = CX25840_VIN7_CH3 |
104 CX25840_VIN5_CH2 |
105 CX25840_VIN2_CH1,
Steven Toth33cdeb32011-10-10 11:09:55 -0300106 .amux = CX25840_AUDIO8,
Steven Toth7b888012008-01-10 03:40:49 -0300107 .gpio0 = 0,
Steven Toth9c8ced52008-10-16 20:18:44 -0300108 }, {
Steven Tothd19770e2007-03-11 20:44:05 -0300109 .type = CX23885_VMUX_COMPOSITE1,
Steven Toth7b888012008-01-10 03:40:49 -0300110 .vmux = CX25840_VIN7_CH3 |
111 CX25840_VIN4_CH2 |
112 CX25840_VIN6_CH1,
Steven Toth33cdeb32011-10-10 11:09:55 -0300113 .amux = CX25840_AUDIO7,
Steven Toth7b888012008-01-10 03:40:49 -0300114 .gpio0 = 0,
Steven Toth9c8ced52008-10-16 20:18:44 -0300115 }, {
Steven Tothd19770e2007-03-11 20:44:05 -0300116 .type = CX23885_VMUX_SVIDEO,
Steven Toth7b888012008-01-10 03:40:49 -0300117 .vmux = CX25840_VIN7_CH3 |
118 CX25840_VIN4_CH2 |
119 CX25840_VIN8_CH1 |
120 CX25840_SVIDEO_ON,
Steven Toth33cdeb32011-10-10 11:09:55 -0300121 .amux = CX25840_AUDIO7,
Steven Toth7b888012008-01-10 03:40:49 -0300122 .gpio0 = 0,
Steven Toth9c8ced52008-10-16 20:18:44 -0300123 } },
Steven Tothd19770e2007-03-11 20:44:05 -0300124 },
Steven Totha77743b2007-08-22 21:01:20 -0300125 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
126 .name = "Hauppauge WinTV-HVR1250",
Devin Heitmuellerd214ddc2012-07-01 16:15:13 -0300127 .porta = CX23885_ANALOG_VIDEO,
Steven Totha77743b2007-08-22 21:01:20 -0300128 .portc = CX23885_MPEG_DVB,
Devin Heitmuellerd214ddc2012-07-01 16:15:13 -0300129#ifdef MT2131_NO_ANALOG_SUPPORT_YET
130 .tuner_type = TUNER_PHILIPS_TDA8290,
131 .tuner_addr = 0x42, /* 0x84 >> 1 */
132 .tuner_bus = 1,
133#endif
134 .force_bff = 1,
Steven Totha77743b2007-08-22 21:01:20 -0300135 .input = {{
Devin Heitmuellerd214ddc2012-07-01 16:15:13 -0300136#ifdef MT2131_NO_ANALOG_SUPPORT_YET
Steven Totha77743b2007-08-22 21:01:20 -0300137 .type = CX23885_VMUX_TELEVISION,
Devin Heitmuellerd214ddc2012-07-01 16:15:13 -0300138 .vmux = CX25840_VIN7_CH3 |
139 CX25840_VIN5_CH2 |
140 CX25840_VIN2_CH1,
141 .amux = CX25840_AUDIO8,
Steven Totha77743b2007-08-22 21:01:20 -0300142 .gpio0 = 0xff00,
Steven Toth9c8ced52008-10-16 20:18:44 -0300143 }, {
Devin Heitmuellerd214ddc2012-07-01 16:15:13 -0300144#endif
Steven Totha77743b2007-08-22 21:01:20 -0300145 .type = CX23885_VMUX_COMPOSITE1,
Devin Heitmuellerd214ddc2012-07-01 16:15:13 -0300146 .vmux = CX25840_VIN7_CH3 |
147 CX25840_VIN4_CH2 |
148 CX25840_VIN6_CH1,
149 .amux = CX25840_AUDIO7,
Steven Totha77743b2007-08-22 21:01:20 -0300150 .gpio0 = 0xff02,
Steven Toth9c8ced52008-10-16 20:18:44 -0300151 }, {
Steven Totha77743b2007-08-22 21:01:20 -0300152 .type = CX23885_VMUX_SVIDEO,
Devin Heitmuellerd214ddc2012-07-01 16:15:13 -0300153 .vmux = CX25840_VIN7_CH3 |
154 CX25840_VIN4_CH2 |
155 CX25840_VIN8_CH1 |
156 CX25840_SVIDEO_ON,
157 .amux = CX25840_AUDIO7,
Steven Totha77743b2007-08-22 21:01:20 -0300158 .gpio0 = 0xff02,
Steven Toth9c8ced52008-10-16 20:18:44 -0300159 } },
Steven Totha77743b2007-08-22 21:01:20 -0300160 },
Michael Krufky9bc37ca2007-09-08 15:17:13 -0300161 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
162 .name = "DViCO FusionHDTV5 Express",
Steven Totha6a3f142007-09-08 21:31:56 -0300163 .portb = CX23885_MPEG_DVB,
Michael Krufky9bc37ca2007-09-08 15:17:13 -0300164 },
Steven Tothd1987d52007-12-18 01:57:06 -0300165 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
166 .name = "Hauppauge WinTV-HVR1500Q",
167 .portc = CX23885_MPEG_DVB,
168 },
Michael Krufky07b4a832007-12-18 01:09:11 -0300169 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
170 .name = "Hauppauge WinTV-HVR1500",
Mijhail Moreyra18d64472011-10-10 11:09:53 -0300171 .porta = CX23885_ANALOG_VIDEO,
Michael Krufky07b4a832007-12-18 01:09:11 -0300172 .portc = CX23885_MPEG_DVB,
Mijhail Moreyra18d64472011-10-10 11:09:53 -0300173 .tuner_type = TUNER_XC2028,
174 .tuner_addr = 0x61, /* 0xc2 >> 1 */
175 .input = {{
176 .type = CX23885_VMUX_TELEVISION,
177 .vmux = CX25840_VIN7_CH3 |
178 CX25840_VIN5_CH2 |
179 CX25840_VIN2_CH1,
180 .gpio0 = 0,
181 }, {
182 .type = CX23885_VMUX_COMPOSITE1,
183 .vmux = CX25840_VIN7_CH3 |
184 CX25840_VIN4_CH2 |
185 CX25840_VIN6_CH1,
186 .gpio0 = 0,
187 }, {
188 .type = CX23885_VMUX_SVIDEO,
189 .vmux = CX25840_VIN7_CH3 |
190 CX25840_VIN4_CH2 |
191 CX25840_VIN8_CH1 |
192 CX25840_SVIDEO_ON,
193 .gpio0 = 0,
194 } },
Michael Krufky07b4a832007-12-18 01:09:11 -0300195 },
Steven Tothb3ea0162008-04-19 01:14:19 -0300196 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
197 .name = "Hauppauge WinTV-HVR1200",
198 .portc = CX23885_MPEG_DVB,
199 },
Steven Totha780a312008-04-19 01:25:52 -0300200 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
201 .name = "Hauppauge WinTV-HVR1700",
202 .portc = CX23885_MPEG_DVB,
203 },
Steven Toth66762372008-04-22 15:38:26 -0300204 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
205 .name = "Hauppauge WinTV-HVR1400",
206 .portc = CX23885_MPEG_DVB,
207 },
Michael Krufky335377b2008-05-07 01:43:10 -0300208 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
209 .name = "DViCO FusionHDTV7 Dual Express",
Steven Tothaaadeac2008-06-30 20:58:38 -0300210 .portb = CX23885_MPEG_DVB,
Michael Krufky335377b2008-05-07 01:43:10 -0300211 .portc = CX23885_MPEG_DVB,
212 },
Steven Tothaef2d182008-08-04 21:39:53 -0300213 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
214 .name = "DViCO FusionHDTV DVB-T Dual Express",
215 .portb = CX23885_MPEG_DVB,
216 .portc = CX23885_MPEG_DVB,
217 },
Steven Toth4c56b042008-08-12 13:30:03 -0300218 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
219 .name = "Leadtek Winfast PxDVR3200 H",
220 .portc = CX23885_MPEG_DVB,
221 },
Anca Emanuel642ca1a2013-09-13 11:28:12 -0300222 [CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200] = {
223 .name = "Leadtek Winfast PxPVR2200",
224 .porta = CX23885_ANALOG_VIDEO,
225 .tuner_type = TUNER_XC2028,
226 .tuner_addr = 0x61,
227 .tuner_bus = 1,
228 .input = {{
229 .type = CX23885_VMUX_TELEVISION,
230 .vmux = CX25840_VIN2_CH1 |
231 CX25840_VIN5_CH2,
232 .amux = CX25840_AUDIO8,
233 .gpio0 = 0x704040,
234 }, {
235 .type = CX23885_VMUX_COMPOSITE1,
236 .vmux = CX25840_COMPOSITE1,
237 .amux = CX25840_AUDIO7,
238 .gpio0 = 0x704040,
239 }, {
240 .type = CX23885_VMUX_SVIDEO,
241 .vmux = CX25840_SVIDEO_LUMA3 |
242 CX25840_SVIDEO_CHROMA4,
243 .amux = CX25840_AUDIO7,
244 .gpio0 = 0x704040,
245 }, {
246 .type = CX23885_VMUX_COMPONENT,
247 .vmux = CX25840_VIN7_CH1 |
248 CX25840_VIN6_CH2 |
249 CX25840_VIN8_CH3 |
250 CX25840_COMPONENT_ON,
251 .amux = CX25840_AUDIO7,
252 .gpio0 = 0x704040,
253 } },
254 },
istvan_v@mailbox.hu0cf8af52011-07-11 10:58:35 -0300255 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
256 .name = "Leadtek Winfast PxDVR3200 H XC4000",
257 .porta = CX23885_ANALOG_VIDEO,
258 .portc = CX23885_MPEG_DVB,
259 .tuner_type = TUNER_XC4000,
260 .tuner_addr = 0x61,
Miroslav Slugen9ee85372011-12-11 20:19:34 -0300261 .radio_type = UNSET,
262 .radio_addr = ADDR_UNSET,
istvan_v@mailbox.hu0cf8af52011-07-11 10:58:35 -0300263 .input = {{
264 .type = CX23885_VMUX_TELEVISION,
265 .vmux = CX25840_VIN2_CH1 |
266 CX25840_VIN5_CH2 |
267 CX25840_NONE0_CH3,
268 }, {
269 .type = CX23885_VMUX_COMPOSITE1,
270 .vmux = CX25840_COMPOSITE1,
271 }, {
272 .type = CX23885_VMUX_SVIDEO,
273 .vmux = CX25840_SVIDEO_LUMA3 |
274 CX25840_SVIDEO_CHROMA4,
275 }, {
276 .type = CX23885_VMUX_COMPONENT,
277 .vmux = CX25840_VIN7_CH1 |
278 CX25840_VIN6_CH2 |
279 CX25840_VIN8_CH3 |
280 CX25840_COMPONENT_ON,
281 } },
282 },
Igor M. Liplianin9bb1b7e2008-11-23 14:11:16 -0300283 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
284 .name = "Compro VideoMate E650F",
285 .portc = CX23885_MPEG_DVB,
286 },
Igor M. Liplianin96318d02009-01-17 12:11:20 -0300287 [CX23885_BOARD_TBS_6920] = {
288 .name = "TurboSight TBS 6920",
289 .portb = CX23885_MPEG_DVB,
290 },
Luis Alvese6001482013-10-01 22:11:35 -0300291 [CX23885_BOARD_TBS_6980] = {
292 .name = "TurboSight TBS 6980",
293 .portb = CX23885_MPEG_DVB,
294 .portc = CX23885_MPEG_DVB,
295 },
296 [CX23885_BOARD_TBS_6981] = {
297 .name = "TurboSight TBS 6981",
298 .portb = CX23885_MPEG_DVB,
299 .portc = CX23885_MPEG_DVB,
300 },
Igor M. Liplianin579943f2009-01-17 12:18:26 -0300301 [CX23885_BOARD_TEVII_S470] = {
302 .name = "TeVii S470",
303 .portb = CX23885_MPEG_DVB,
304 },
Igor M. Liplianinc9b8b042009-01-17 12:23:31 -0300305 [CX23885_BOARD_DVBWORLD_2005] = {
306 .name = "DVBWorld DVB-S2 2005",
307 .portb = CX23885_MPEG_DVB,
308 },
Igor M. Liplianin5a23b072009-03-03 12:06:09 -0300309 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
Igor M. Liplianin78db8542011-01-25 17:04:00 -0300310 .ci_type = 1,
Igor M. Liplianin5a23b072009-03-03 12:06:09 -0300311 .name = "NetUP Dual DVB-S2 CI",
312 .portb = CX23885_MPEG_DVB,
313 .portc = CX23885_MPEG_DVB,
314 },
Steven Toth2074dff2009-05-02 11:39:46 -0300315 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
316 .name = "Hauppauge WinTV-HVR1270",
Michael Krufkya5dbf452009-05-03 23:27:02 -0300317 .portc = CX23885_MPEG_DVB,
Steven Toth2074dff2009-05-02 11:39:46 -0300318 },
Michael Krufkyd099bec2009-05-08 22:39:24 -0300319 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
320 .name = "Hauppauge WinTV-HVR1275",
321 .portc = CX23885_MPEG_DVB,
322 },
Michael Krufky19bc5792009-05-08 16:05:29 -0300323 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
324 .name = "Hauppauge WinTV-HVR1255",
Devin Heitmueller0ac60ac2012-07-01 16:15:14 -0300325 .porta = CX23885_ANALOG_VIDEO,
Michael Krufky19bc5792009-05-08 16:05:29 -0300326 .portc = CX23885_MPEG_DVB,
Devin Heitmueller0ac60ac2012-07-01 16:15:14 -0300327 .tuner_type = TUNER_ABSENT,
328 .tuner_addr = 0x42, /* 0x84 >> 1 */
329 .force_bff = 1,
330 .input = {{
331 .type = CX23885_VMUX_TELEVISION,
332 .vmux = CX25840_VIN7_CH3 |
333 CX25840_VIN5_CH2 |
334 CX25840_VIN2_CH1 |
335 CX25840_DIF_ON,
336 .amux = CX25840_AUDIO8,
337 }, {
338 .type = CX23885_VMUX_COMPOSITE1,
339 .vmux = CX25840_VIN7_CH3 |
340 CX25840_VIN4_CH2 |
341 CX25840_VIN6_CH1,
342 .amux = CX25840_AUDIO7,
343 }, {
344 .type = CX23885_VMUX_SVIDEO,
345 .vmux = CX25840_VIN7_CH3 |
346 CX25840_VIN4_CH2 |
347 CX25840_VIN8_CH1 |
348 CX25840_SVIDEO_ON,
349 .amux = CX25840_AUDIO7,
350 } },
351 },
352 [CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = {
353 .name = "Hauppauge WinTV-HVR1255",
354 .porta = CX23885_ANALOG_VIDEO,
355 .portc = CX23885_MPEG_DVB,
356 .tuner_type = TUNER_ABSENT,
357 .tuner_addr = 0x42, /* 0x84 >> 1 */
358 .force_bff = 1,
359 .input = {{
360 .type = CX23885_VMUX_TELEVISION,
361 .vmux = CX25840_VIN7_CH3 |
362 CX25840_VIN5_CH2 |
363 CX25840_VIN2_CH1 |
364 CX25840_DIF_ON,
365 .amux = CX25840_AUDIO8,
366 }, {
367 .type = CX23885_VMUX_SVIDEO,
368 .vmux = CX25840_VIN7_CH3 |
369 CX25840_VIN4_CH2 |
370 CX25840_VIN8_CH1 |
371 CX25840_SVIDEO_ON,
372 .amux = CX25840_AUDIO7,
373 } },
Michael Krufky19bc5792009-05-08 16:05:29 -0300374 },
Michael Krufky6b926ec2009-05-12 17:32:17 -0300375 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
376 .name = "Hauppauge WinTV-HVR1210",
377 .portc = CX23885_MPEG_DVB,
378 },
David Wong493b7122009-05-18 05:25:49 -0300379 [CX23885_BOARD_MYGICA_X8506] = {
380 .name = "Mygica X8506 DMB-TH",
David T.L. Wong6f0d8c02009-10-21 13:15:30 -0300381 .tuner_type = TUNER_XC5000,
382 .tuner_addr = 0x61,
Igor M. Liplianin557f48d2011-01-25 17:05:00 -0300383 .tuner_bus = 1,
David T.L. Wongbc1548a2009-10-21 11:09:28 -0300384 .porta = CX23885_ANALOG_VIDEO,
David Wong493b7122009-05-18 05:25:49 -0300385 .portb = CX23885_MPEG_DVB,
David T.L. Wongbc1548a2009-10-21 11:09:28 -0300386 .input = {
387 {
David T.L. Wong6f0d8c02009-10-21 13:15:30 -0300388 .type = CX23885_VMUX_TELEVISION,
389 .vmux = CX25840_COMPOSITE2,
390 },
391 {
David T.L. Wongbc1548a2009-10-21 11:09:28 -0300392 .type = CX23885_VMUX_COMPOSITE1,
393 .vmux = CX25840_COMPOSITE8,
394 },
395 {
396 .type = CX23885_VMUX_SVIDEO,
397 .vmux = CX25840_SVIDEO_LUMA3 |
398 CX25840_SVIDEO_CHROMA4,
399 },
400 {
401 .type = CX23885_VMUX_COMPONENT,
402 .vmux = CX25840_COMPONENT_ON |
403 CX25840_VIN1_CH1 |
404 CX25840_VIN6_CH2 |
405 CX25840_VIN7_CH3,
406 },
407 },
David Wong493b7122009-05-18 05:25:49 -0300408 },
David Wong2365b2d2009-06-17 01:38:12 -0300409 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
410 .name = "Magic-Pro ProHDTV Extreme 2",
David T.L. Wong6f0d8c02009-10-21 13:15:30 -0300411 .tuner_type = TUNER_XC5000,
412 .tuner_addr = 0x61,
Igor M. Liplianin557f48d2011-01-25 17:05:00 -0300413 .tuner_bus = 1,
David T.L. Wongbc1548a2009-10-21 11:09:28 -0300414 .porta = CX23885_ANALOG_VIDEO,
David Wong2365b2d2009-06-17 01:38:12 -0300415 .portb = CX23885_MPEG_DVB,
David T.L. Wongbc1548a2009-10-21 11:09:28 -0300416 .input = {
417 {
David T.L. Wong6f0d8c02009-10-21 13:15:30 -0300418 .type = CX23885_VMUX_TELEVISION,
419 .vmux = CX25840_COMPOSITE2,
420 },
421 {
David T.L. Wongbc1548a2009-10-21 11:09:28 -0300422 .type = CX23885_VMUX_COMPOSITE1,
423 .vmux = CX25840_COMPOSITE8,
424 },
425 {
426 .type = CX23885_VMUX_SVIDEO,
427 .vmux = CX25840_SVIDEO_LUMA3 |
428 CX25840_SVIDEO_CHROMA4,
429 },
430 {
431 .type = CX23885_VMUX_COMPONENT,
432 .vmux = CX25840_COMPONENT_ON |
433 CX25840_VIN1_CH1 |
434 CX25840_VIN6_CH2 |
435 CX25840_VIN7_CH3,
436 },
437 },
David Wong2365b2d2009-06-17 01:38:12 -0300438 },
Steven Toth136973802009-07-20 15:37:25 -0300439 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
440 .name = "Hauppauge WinTV-HVR1850",
Steven Toth35045132012-01-04 21:08:35 -0300441 .porta = CX23885_ANALOG_VIDEO,
Steven Toth136973802009-07-20 15:37:25 -0300442 .portb = CX23885_MPEG_ENCODER,
443 .portc = CX23885_MPEG_DVB,
Steven Toth35045132012-01-04 21:08:35 -0300444 .tuner_type = TUNER_ABSENT,
445 .tuner_addr = 0x42, /* 0x84 >> 1 */
446 .force_bff = 1,
447 .input = {{
448 .type = CX23885_VMUX_TELEVISION,
449 .vmux = CX25840_VIN7_CH3 |
450 CX25840_VIN5_CH2 |
451 CX25840_VIN2_CH1 |
452 CX25840_DIF_ON,
453 .amux = CX25840_AUDIO8,
454 }, {
455 .type = CX23885_VMUX_COMPOSITE1,
456 .vmux = CX25840_VIN7_CH3 |
457 CX25840_VIN4_CH2 |
458 CX25840_VIN6_CH1,
459 .amux = CX25840_AUDIO7,
460 }, {
461 .type = CX23885_VMUX_SVIDEO,
462 .vmux = CX25840_VIN7_CH3 |
463 CX25840_VIN4_CH2 |
464 CX25840_VIN8_CH1 |
465 CX25840_SVIDEO_ON,
466 .amux = CX25840_AUDIO7,
467 } },
Steven Toth136973802009-07-20 15:37:25 -0300468 },
Vladimir Geroy34e383d2009-09-18 18:55:47 -0300469 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
470 .name = "Compro VideoMate E800",
471 .portc = CX23885_MPEG_DVB,
472 },
Michael Krufkyaee0b242009-11-11 01:52:45 -0300473 [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
474 .name = "Hauppauge WinTV-HVR1290",
475 .portc = CX23885_MPEG_DVB,
476 },
David T. L. Wongea5697f2009-10-26 08:54:04 -0300477 [CX23885_BOARD_MYGICA_X8558PRO] = {
478 .name = "Mygica X8558 PRO DMB-TH",
479 .portb = CX23885_MPEG_DVB,
480 .portc = CX23885_MPEG_DVB,
481 },
Kusanagi Kouichi0b32d652010-01-22 04:55:28 -0300482 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
483 .name = "LEADTEK WinFast PxTV1200",
484 .porta = CX23885_ANALOG_VIDEO,
485 .tuner_type = TUNER_XC2028,
486 .tuner_addr = 0x61,
Igor M. Liplianin557f48d2011-01-25 17:05:00 -0300487 .tuner_bus = 1,
Kusanagi Kouichi0b32d652010-01-22 04:55:28 -0300488 .input = {{
489 .type = CX23885_VMUX_TELEVISION,
490 .vmux = CX25840_VIN2_CH1 |
491 CX25840_VIN5_CH2 |
492 CX25840_NONE0_CH3,
493 }, {
494 .type = CX23885_VMUX_COMPOSITE1,
495 .vmux = CX25840_COMPOSITE1,
496 }, {
497 .type = CX23885_VMUX_SVIDEO,
498 .vmux = CX25840_SVIDEO_LUMA3 |
499 CX25840_SVIDEO_CHROMA4,
500 }, {
501 .type = CX23885_VMUX_COMPONENT,
502 .vmux = CX25840_VIN7_CH1 |
503 CX25840_VIN6_CH2 |
504 CX25840_VIN8_CH3 |
505 CX25840_COMPONENT_ON,
506 } },
507 },
Alexey Chernov9028f582010-12-06 17:09:53 -0300508 [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
509 .name = "GoTView X5 3D Hybrid",
510 .tuner_type = TUNER_XC5000,
511 .tuner_addr = 0x64,
Igor M. Liplianin557f48d2011-01-25 17:05:00 -0300512 .tuner_bus = 1,
Alexey Chernov9028f582010-12-06 17:09:53 -0300513 .porta = CX23885_ANALOG_VIDEO,
514 .portb = CX23885_MPEG_DVB,
515 .input = {{
516 .type = CX23885_VMUX_TELEVISION,
517 .vmux = CX25840_VIN2_CH1 |
518 CX25840_VIN5_CH2,
519 .gpio0 = 0x02,
520 }, {
521 .type = CX23885_VMUX_COMPOSITE1,
522 .vmux = CX23885_VMUX_COMPOSITE1,
523 }, {
524 .type = CX23885_VMUX_SVIDEO,
525 .vmux = CX25840_SVIDEO_LUMA3 |
526 CX25840_SVIDEO_CHROMA4,
527 } },
528 },
Igor M. Liplianin78db8542011-01-25 17:04:00 -0300529 [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
530 .ci_type = 2,
531 .name = "NetUP Dual DVB-T/C-CI RF",
532 .porta = CX23885_ANALOG_VIDEO,
533 .portb = CX23885_MPEG_DVB,
534 .portc = CX23885_MPEG_DVB,
Igor M. Liplianin10d0dcd2011-01-25 17:06:00 -0300535 .num_fds_portb = 2,
536 .num_fds_portc = 2,
Igor M. Liplianin78db8542011-01-25 17:04:00 -0300537 .tuner_type = TUNER_XC5000,
538 .tuner_addr = 0x64,
539 .input = { {
540 .type = CX23885_VMUX_TELEVISION,
541 .vmux = CX25840_COMPOSITE1,
542 } },
543 },
Steven Toth2cb9ccd2011-10-10 11:09:55 -0300544 [CX23885_BOARD_MPX885] = {
545 .name = "MPX-885",
546 .porta = CX23885_ANALOG_VIDEO,
547 .input = {{
548 .type = CX23885_VMUX_COMPOSITE1,
549 .vmux = CX25840_COMPOSITE1,
550 .amux = CX25840_AUDIO6,
551 .gpio0 = 0,
552 }, {
553 .type = CX23885_VMUX_COMPOSITE2,
554 .vmux = CX25840_COMPOSITE2,
555 .amux = CX25840_AUDIO6,
556 .gpio0 = 0,
557 }, {
558 .type = CX23885_VMUX_COMPOSITE3,
559 .vmux = CX25840_COMPOSITE3,
560 .amux = CX25840_AUDIO7,
561 .gpio0 = 0,
562 }, {
563 .type = CX23885_VMUX_COMPOSITE4,
564 .vmux = CX25840_COMPOSITE4,
565 .amux = CX25840_AUDIO7,
566 .gpio0 = 0,
567 } },
568 },
Alfredo Jesús Delaiti87988752011-11-09 15:13:00 -0300569 [CX23885_BOARD_MYGICA_X8507] = {
Mauro Carvalho Chehab0d1b5262013-08-09 08:53:27 -0300570 .name = "Mygica X8502/X8507 ISDB-T",
Alfredo Jesús Delaiti87988752011-11-09 15:13:00 -0300571 .tuner_type = TUNER_XC5000,
572 .tuner_addr = 0x61,
573 .tuner_bus = 1,
574 .porta = CX23885_ANALOG_VIDEO,
Mauro Carvalho Chehab0d1b5262013-08-09 08:53:27 -0300575 .portb = CX23885_MPEG_DVB,
Alfredo Jesús Delaiti87988752011-11-09 15:13:00 -0300576 .input = {
577 {
578 .type = CX23885_VMUX_TELEVISION,
579 .vmux = CX25840_COMPOSITE2,
580 .amux = CX25840_AUDIO8,
581 },
582 {
583 .type = CX23885_VMUX_COMPOSITE1,
584 .vmux = CX25840_COMPOSITE8,
Alfredo Jesús Delaiti082c0572012-09-21 10:33:51 -0300585 .amux = CX25840_AUDIO7,
Alfredo Jesús Delaiti87988752011-11-09 15:13:00 -0300586 },
587 {
588 .type = CX23885_VMUX_SVIDEO,
589 .vmux = CX25840_SVIDEO_LUMA3 |
590 CX25840_SVIDEO_CHROMA4,
Alfredo Jesús Delaiti082c0572012-09-21 10:33:51 -0300591 .amux = CX25840_AUDIO7,
Alfredo Jesús Delaiti87988752011-11-09 15:13:00 -0300592 },
593 {
594 .type = CX23885_VMUX_COMPONENT,
595 .vmux = CX25840_COMPONENT_ON |
596 CX25840_VIN1_CH1 |
597 CX25840_VIN6_CH2 |
598 CX25840_VIN7_CH3,
Alfredo Jesús Delaiti082c0572012-09-21 10:33:51 -0300599 .amux = CX25840_AUDIO7,
Alfredo Jesús Delaiti87988752011-11-09 15:13:00 -0300600 },
601 },
Stefan Ringel722c90e2012-01-07 09:20:48 -0300602 },
603 [CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
604 .name = "TerraTec Cinergy T PCIe Dual",
605 .portb = CX23885_MPEG_DVB,
606 .portc = CX23885_MPEG_DVB,
Igor M. Liplianin7b134e82012-05-11 11:45:42 -0300607 },
608 [CX23885_BOARD_TEVII_S471] = {
609 .name = "TeVii S471",
610 .portb = CX23885_MPEG_DVB,
Mariusz Bia?o?czykf6671902012-09-12 07:59:18 -0300611 },
612 [CX23885_BOARD_PROF_8000] = {
613 .name = "Prof Revolution DVB-S2 8000",
614 .portb = CX23885_MPEG_DVB,
Michael Krufky7c62f5a2012-12-15 23:34:09 -0300615 },
616 [CX23885_BOARD_HAUPPAUGE_HVR4400] = {
617 .name = "Hauppauge WinTV-HVR4400",
Matthias Schwarzott36efec42014-07-22 17:12:13 -0300618 .porta = CX23885_ANALOG_VIDEO,
Michael Krufky7c62f5a2012-12-15 23:34:09 -0300619 .portb = CX23885_MPEG_DVB,
Matthias Schwarzott36efec42014-07-22 17:12:13 -0300620 .portc = CX23885_MPEG_DVB,
621 .tuner_type = TUNER_NXP_TDA18271,
622 .tuner_addr = 0x60, /* 0xc0 >> 1 */
623 .tuner_bus = 1,
Michael Krufky7c62f5a2012-12-15 23:34:09 -0300624 },
Oleh Kravchenkoe8d42372012-12-08 18:20:59 -0300625 [CX23885_BOARD_AVERMEDIA_HC81R] = {
626 .name = "AVerTV Hybrid Express Slim HC81R",
627 .tuner_type = TUNER_XC2028,
628 .tuner_addr = 0x61, /* 0xc2 >> 1 */
629 .tuner_bus = 1,
630 .porta = CX23885_ANALOG_VIDEO,
631 .input = {{
632 .type = CX23885_VMUX_TELEVISION,
633 .vmux = CX25840_VIN2_CH1 |
634 CX25840_VIN5_CH2 |
635 CX25840_NONE0_CH3 |
636 CX25840_NONE1_CH3,
637 .amux = CX25840_AUDIO8,
638 }, {
639 .type = CX23885_VMUX_SVIDEO,
640 .vmux = CX25840_VIN8_CH1 |
641 CX25840_NONE_CH2 |
642 CX25840_VIN7_CH3 |
643 CX25840_SVIDEO_ON,
644 .amux = CX25840_AUDIO6,
645 }, {
646 .type = CX23885_VMUX_COMPONENT,
647 .vmux = CX25840_VIN1_CH1 |
648 CX25840_NONE_CH2 |
649 CX25840_NONE0_CH3 |
650 CX25840_NONE1_CH3,
651 .amux = CX25840_AUDIO6,
652 } },
Hans Verkuilcce11b02014-06-27 11:15:42 -0300653 },
James Harper46b21bb2014-06-12 07:12:24 -0300654 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2] = {
655 .name = "DViCO FusionHDTV DVB-T Dual Express2",
656 .portb = CX23885_MPEG_DVB,
657 .portc = CX23885_MPEG_DVB,
658 },
Hans Verkuilcce11b02014-06-27 11:15:42 -0300659 [CX23885_BOARD_HAUPPAUGE_IMPACTVCBE] = {
660 .name = "Hauppauge ImpactVCB-e",
661 .tuner_type = TUNER_ABSENT,
662 .porta = CX23885_ANALOG_VIDEO,
663 .input = {{
664 .type = CX23885_VMUX_COMPOSITE1,
665 .vmux = CX25840_VIN7_CH3 |
666 CX25840_VIN4_CH2 |
667 CX25840_VIN6_CH1,
668 .amux = CX25840_AUDIO7,
669 }, {
670 .type = CX23885_VMUX_SVIDEO,
671 .vmux = CX25840_VIN7_CH3 |
672 CX25840_VIN4_CH2 |
673 CX25840_VIN8_CH1 |
674 CX25840_SVIDEO_ON,
675 .amux = CX25840_AUDIO7,
676 } },
677 },
Olli Salonen29442262014-08-11 16:58:15 -0300678 [CX23885_BOARD_DVBSKY_T9580] = {
679 .name = "DVBSky T9580",
680 .portb = CX23885_MPEG_DVB,
681 .portc = CX23885_MPEG_DVB,
682 },
Olli Salonen82c10272014-09-29 04:44:16 -0300683 [CX23885_BOARD_DVBSKY_T980C] = {
684 .name = "DVBSky T980C",
685 .portb = CX23885_MPEG_DVB,
686 },
nibble.max0e6c7b02014-10-23 07:01:44 -0300687 [CX23885_BOARD_DVBSKY_S950C] = {
688 .name = "DVBSky S950C",
689 .portb = CX23885_MPEG_DVB,
690 },
Steven Tothd19770e2007-03-11 20:44:05 -0300691};
692const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
693
694/* ------------------------------------------------------------------ */
695/* PCI subsystem IDs */
696
697struct cx23885_subid cx23885_subids[] = {
698 {
699 .subvendor = 0x0070,
700 .subdevice = 0x3400,
701 .card = CX23885_BOARD_UNKNOWN,
Steven Toth9c8ced52008-10-16 20:18:44 -0300702 }, {
Steven Tothd19770e2007-03-11 20:44:05 -0300703 .subvendor = 0x0070,
704 .subdevice = 0x7600,
705 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
Steven Toth9c8ced52008-10-16 20:18:44 -0300706 }, {
Steven Tothd19770e2007-03-11 20:44:05 -0300707 .subvendor = 0x0070,
708 .subdevice = 0x7800,
709 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
Steven Toth9c8ced52008-10-16 20:18:44 -0300710 }, {
Steven Tothd19770e2007-03-11 20:44:05 -0300711 .subvendor = 0x0070,
712 .subdevice = 0x7801,
713 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
Steven Toth9c8ced52008-10-16 20:18:44 -0300714 }, {
Steven Totha77743b2007-08-22 21:01:20 -0300715 .subvendor = 0x0070,
Michael Krufky6ccb8cf2007-12-27 21:46:34 -0300716 .subdevice = 0x7809,
717 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
Steven Toth9c8ced52008-10-16 20:18:44 -0300718 }, {
Michael Krufky6ccb8cf2007-12-27 21:46:34 -0300719 .subvendor = 0x0070,
Steven Totha77743b2007-08-22 21:01:20 -0300720 .subdevice = 0x7911,
721 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
Steven Toth9c8ced52008-10-16 20:18:44 -0300722 }, {
Michael Krufky9bc37ca2007-09-08 15:17:13 -0300723 .subvendor = 0x18ac,
724 .subdevice = 0xd500,
725 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
Steven Toth9c8ced52008-10-16 20:18:44 -0300726 }, {
Steven Tothd1987d52007-12-18 01:57:06 -0300727 .subvendor = 0x0070,
Michael Krufkyb00fff02007-12-27 22:19:31 -0300728 .subdevice = 0x7790,
729 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
Steven Toth9c8ced52008-10-16 20:18:44 -0300730 }, {
Michael Krufkyb00fff02007-12-27 22:19:31 -0300731 .subvendor = 0x0070,
Steven Tothd1987d52007-12-18 01:57:06 -0300732 .subdevice = 0x7797,
733 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
Steven Toth9c8ced52008-10-16 20:18:44 -0300734 }, {
Michael Krufky07b4a832007-12-18 01:09:11 -0300735 .subvendor = 0x0070,
Michael Krufkyb00fff02007-12-27 22:19:31 -0300736 .subdevice = 0x7710,
737 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
Steven Toth9c8ced52008-10-16 20:18:44 -0300738 }, {
Michael Krufkyb00fff02007-12-27 22:19:31 -0300739 .subvendor = 0x0070,
Michael Krufky07b4a832007-12-18 01:09:11 -0300740 .subdevice = 0x7717,
741 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
Steven Tothb3ea0162008-04-19 01:14:19 -0300742 }, {
743 .subvendor = 0x0070,
744 .subdevice = 0x71d1,
745 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
Steven Totha780a312008-04-19 01:25:52 -0300746 }, {
747 .subvendor = 0x0070,
Michael Krufky3c3852c2008-05-02 16:12:44 -0300748 .subdevice = 0x71d3,
749 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
750 }, {
751 .subvendor = 0x0070,
Steven Totha780a312008-04-19 01:25:52 -0300752 .subdevice = 0x8101,
753 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
Steven Toth66762372008-04-22 15:38:26 -0300754 }, {
755 .subvendor = 0x0070,
756 .subdevice = 0x8010,
757 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
Steven Toth9c8ced52008-10-16 20:18:44 -0300758 }, {
Michael Krufky335377b2008-05-07 01:43:10 -0300759 .subvendor = 0x18ac,
760 .subdevice = 0xd618,
761 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
Steven Toth9c8ced52008-10-16 20:18:44 -0300762 }, {
Steven Tothaef2d182008-08-04 21:39:53 -0300763 .subvendor = 0x18ac,
764 .subdevice = 0xdb78,
765 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
Steven Toth4c56b042008-08-12 13:30:03 -0300766 }, {
767 .subvendor = 0x107d,
768 .subdevice = 0x6681,
769 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
Igor M. Liplianin9bb1b7e2008-11-23 14:11:16 -0300770 }, {
istvan_v@mailbox.hu0cf8af52011-07-11 10:58:35 -0300771 .subvendor = 0x107d,
Anca Emanuel642ca1a2013-09-13 11:28:12 -0300772 .subdevice = 0x6f21,
773 .card = CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200,
774 }, {
775 .subvendor = 0x107d,
istvan_v@mailbox.hu0cf8af52011-07-11 10:58:35 -0300776 .subdevice = 0x6f39,
777 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
778 }, {
Igor M. Liplianin9bb1b7e2008-11-23 14:11:16 -0300779 .subvendor = 0x185b,
780 .subdevice = 0xe800,
781 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
Igor M. Liplianin96318d02009-01-17 12:11:20 -0300782 }, {
783 .subvendor = 0x6920,
784 .subdevice = 0x8888,
785 .card = CX23885_BOARD_TBS_6920,
Igor M. Liplianin579943f2009-01-17 12:18:26 -0300786 }, {
Luis Alvese6001482013-10-01 22:11:35 -0300787 .subvendor = 0x6980,
788 .subdevice = 0x8888,
789 .card = CX23885_BOARD_TBS_6980,
790 }, {
791 .subvendor = 0x6981,
792 .subdevice = 0x8888,
793 .card = CX23885_BOARD_TBS_6981,
794 }, {
Igor M. Liplianin579943f2009-01-17 12:18:26 -0300795 .subvendor = 0xd470,
796 .subdevice = 0x9022,
797 .card = CX23885_BOARD_TEVII_S470,
Igor M. Liplianinc9b8b042009-01-17 12:23:31 -0300798 }, {
799 .subvendor = 0x0001,
800 .subdevice = 0x2005,
801 .card = CX23885_BOARD_DVBWORLD_2005,
Igor M. Liplianin5a23b072009-03-03 12:06:09 -0300802 }, {
803 .subvendor = 0x1b55,
804 .subdevice = 0x2a2c,
805 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
Steven Toth2074dff2009-05-02 11:39:46 -0300806 }, {
807 .subvendor = 0x0070,
808 .subdevice = 0x2211,
809 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
Michael Krufkyd099bec2009-05-08 22:39:24 -0300810 }, {
811 .subvendor = 0x0070,
812 .subdevice = 0x2215,
813 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
Michael Krufky19bc5792009-05-08 16:05:29 -0300814 }, {
815 .subvendor = 0x0070,
Michael Krufky7d7b5282010-06-30 18:17:35 -0300816 .subdevice = 0x221d,
817 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
818 }, {
819 .subvendor = 0x0070,
Michael Krufky19bc5792009-05-08 16:05:29 -0300820 .subdevice = 0x2251,
821 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
Michael Krufky6b926ec2009-05-12 17:32:17 -0300822 }, {
823 .subvendor = 0x0070,
Michael Krufky7d7b5282010-06-30 18:17:35 -0300824 .subdevice = 0x2259,
Devin Heitmueller0ac60ac2012-07-01 16:15:14 -0300825 .card = CX23885_BOARD_HAUPPAUGE_HVR1255_22111,
Michael Krufky7d7b5282010-06-30 18:17:35 -0300826 }, {
827 .subvendor = 0x0070,
Michael Krufky6b926ec2009-05-12 17:32:17 -0300828 .subdevice = 0x2291,
829 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
830 }, {
831 .subvendor = 0x0070,
832 .subdevice = 0x2295,
833 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
David Wong493b7122009-05-18 05:25:49 -0300834 }, {
Michael Krufky7d7b5282010-06-30 18:17:35 -0300835 .subvendor = 0x0070,
836 .subdevice = 0x2299,
837 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
838 }, {
839 .subvendor = 0x0070,
840 .subdevice = 0x229d,
841 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
842 }, {
843 .subvendor = 0x0070,
844 .subdevice = 0x22f0,
845 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
846 }, {
847 .subvendor = 0x0070,
848 .subdevice = 0x22f1,
849 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
850 }, {
851 .subvendor = 0x0070,
852 .subdevice = 0x22f2,
853 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
854 }, {
855 .subvendor = 0x0070,
856 .subdevice = 0x22f3,
857 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
858 }, {
859 .subvendor = 0x0070,
860 .subdevice = 0x22f4,
861 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
862 }, {
863 .subvendor = 0x0070,
864 .subdevice = 0x22f5,
865 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
866 }, {
David Wong493b7122009-05-18 05:25:49 -0300867 .subvendor = 0x14f1,
868 .subdevice = 0x8651,
869 .card = CX23885_BOARD_MYGICA_X8506,
David Wong2365b2d2009-06-17 01:38:12 -0300870 }, {
871 .subvendor = 0x14f1,
872 .subdevice = 0x8657,
873 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
Steven Toth136973802009-07-20 15:37:25 -0300874 }, {
875 .subvendor = 0x0070,
876 .subdevice = 0x8541,
877 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
Vladimir Geroy34e383d2009-09-18 18:55:47 -0300878 }, {
879 .subvendor = 0x1858,
880 .subdevice = 0xe800,
881 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
Michael Krufkyaee0b242009-11-11 01:52:45 -0300882 }, {
883 .subvendor = 0x0070,
884 .subdevice = 0x8551,
885 .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
David T. L. Wongea5697f2009-10-26 08:54:04 -0300886 }, {
887 .subvendor = 0x14f1,
888 .subdevice = 0x8578,
889 .card = CX23885_BOARD_MYGICA_X8558PRO,
Kusanagi Kouichi0b32d652010-01-22 04:55:28 -0300890 }, {
891 .subvendor = 0x107d,
892 .subdevice = 0x6f22,
893 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
Alexey Chernov9028f582010-12-06 17:09:53 -0300894 }, {
895 .subvendor = 0x5654,
896 .subdevice = 0x2390,
897 .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
Igor M. Liplianin78db8542011-01-25 17:04:00 -0300898 }, {
899 .subvendor = 0x1b55,
900 .subdevice = 0xe2e4,
901 .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
Alfredo Jesús Delaiti87988752011-11-09 15:13:00 -0300902 }, {
903 .subvendor = 0x14f1,
904 .subdevice = 0x8502,
905 .card = CX23885_BOARD_MYGICA_X8507,
Stefan Ringel722c90e2012-01-07 09:20:48 -0300906 }, {
907 .subvendor = 0x153b,
908 .subdevice = 0x117e,
909 .card = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
Igor M. Liplianin7b134e82012-05-11 11:45:42 -0300910 }, {
911 .subvendor = 0xd471,
912 .subdevice = 0x9022,
913 .card = CX23885_BOARD_TEVII_S471,
Mariusz Bia?o?czykf6671902012-09-12 07:59:18 -0300914 }, {
915 .subvendor = 0x8000,
916 .subdevice = 0x3034,
917 .card = CX23885_BOARD_PROF_8000,
Michael Krufky7c62f5a2012-12-15 23:34:09 -0300918 }, {
919 .subvendor = 0x0070,
920 .subdevice = 0xc108,
921 .card = CX23885_BOARD_HAUPPAUGE_HVR4400,
922 }, {
923 .subvendor = 0x0070,
924 .subdevice = 0xc138,
925 .card = CX23885_BOARD_HAUPPAUGE_HVR4400,
926 }, {
927 .subvendor = 0x0070,
928 .subdevice = 0xc12a,
929 .card = CX23885_BOARD_HAUPPAUGE_HVR4400,
930 }, {
931 .subvendor = 0x0070,
932 .subdevice = 0xc1f8,
933 .card = CX23885_BOARD_HAUPPAUGE_HVR4400,
Oleh Kravchenkoe8d42372012-12-08 18:20:59 -0300934 }, {
935 .subvendor = 0x1461,
936 .subdevice = 0xd939,
937 .card = CX23885_BOARD_AVERMEDIA_HC81R,
Hans Verkuilcce11b02014-06-27 11:15:42 -0300938 }, {
939 .subvendor = 0x0070,
940 .subdevice = 0x7133,
941 .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
James Harper46b21bb2014-06-12 07:12:24 -0300942 }, {
943 .subvendor = 0x18ac,
944 .subdevice = 0xdb98,
945 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2,
Olli Salonen29442262014-08-11 16:58:15 -0300946 }, {
947 .subvendor = 0x4254,
948 .subdevice = 0x9580,
949 .card = CX23885_BOARD_DVBSKY_T9580,
Olli Salonen82c10272014-09-29 04:44:16 -0300950 }, {
951 .subvendor = 0x4254,
952 .subdevice = 0x980c,
953 .card = CX23885_BOARD_DVBSKY_T980C,
nibble.max0e6c7b02014-10-23 07:01:44 -0300954 }, {
955 .subvendor = 0x4254,
956 .subdevice = 0x950c,
957 .card = CX23885_BOARD_DVBSKY_S950C,
Steven Tothd19770e2007-03-11 20:44:05 -0300958 },
959};
960const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
961
962void cx23885_card_list(struct cx23885_dev *dev)
963{
964 int i;
965
966 if (0 == dev->pci->subsystem_vendor &&
967 0 == dev->pci->subsystem_device) {
Steven Toth9c8ced52008-10-16 20:18:44 -0300968 printk(KERN_INFO
969 "%s: Board has no valid PCIe Subsystem ID and can't\n"
970 "%s: be autodetected. Pass card=<n> insmod option\n"
971 "%s: to workaround that. Redirect complaints to the\n"
972 "%s: vendor of the TV card. Best regards,\n"
Steven Tothd19770e2007-03-11 20:44:05 -0300973 "%s: -- tux\n",
974 dev->name, dev->name, dev->name, dev->name, dev->name);
975 } else {
Steven Toth9c8ced52008-10-16 20:18:44 -0300976 printk(KERN_INFO
977 "%s: Your board isn't known (yet) to the driver.\n"
978 "%s: Try to pick one of the existing card configs via\n"
Steven Tothd19770e2007-03-11 20:44:05 -0300979 "%s: card=<n> insmod option. Updating to the latest\n"
980 "%s: version might help as well.\n",
981 dev->name, dev->name, dev->name, dev->name);
982 }
Steven Toth9c8ced52008-10-16 20:18:44 -0300983 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
Steven Tothd19770e2007-03-11 20:44:05 -0300984 dev->name);
985 for (i = 0; i < cx23885_bcount; i++)
Steven Toth9c8ced52008-10-16 20:18:44 -0300986 printk(KERN_INFO "%s: card=%d -> %s\n",
Steven Tothd19770e2007-03-11 20:44:05 -0300987 dev->name, i, cx23885_boards[i].name);
988}
989
990static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
991{
992 struct tveeprom tv;
993
Steven Toth9c8ced52008-10-16 20:18:44 -0300994 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
995 eeprom_data);
Steven Tothd19770e2007-03-11 20:44:05 -0300996
Steven Tothd19770e2007-03-11 20:44:05 -0300997 /* Make sure we support the board model */
Steven Toth9c8ced52008-10-16 20:18:44 -0300998 switch (tv.model) {
Michael Krufky5308cf02009-05-12 18:37:35 -0300999 case 22001:
1000 /* WinTV-HVR1270 (PCIe, Retail, half height)
1001 * ATSC/QAM and basic analog, IR Blast */
1002 case 22009:
1003 /* WinTV-HVR1210 (PCIe, Retail, half height)
1004 * DVB-T and basic analog, IR Blast */
1005 case 22011:
1006 /* WinTV-HVR1270 (PCIe, Retail, half height)
1007 * ATSC/QAM and basic analog, IR Recv */
1008 case 22019:
1009 /* WinTV-HVR1210 (PCIe, Retail, half height)
1010 * DVB-T and basic analog, IR Recv */
1011 case 22021:
1012 /* WinTV-HVR1275 (PCIe, Retail, half height)
1013 * ATSC/QAM and basic analog, IR Recv */
1014 case 22029:
1015 /* WinTV-HVR1210 (PCIe, Retail, half height)
1016 * DVB-T and basic analog, IR Recv */
1017 case 22101:
1018 /* WinTV-HVR1270 (PCIe, Retail, full height)
1019 * ATSC/QAM and basic analog, IR Blast */
1020 case 22109:
1021 /* WinTV-HVR1210 (PCIe, Retail, full height)
1022 * DVB-T and basic analog, IR Blast */
1023 case 22111:
1024 /* WinTV-HVR1270 (PCIe, Retail, full height)
1025 * ATSC/QAM and basic analog, IR Recv */
1026 case 22119:
1027 /* WinTV-HVR1210 (PCIe, Retail, full height)
1028 * DVB-T and basic analog, IR Recv */
1029 case 22121:
1030 /* WinTV-HVR1275 (PCIe, Retail, full height)
1031 * ATSC/QAM and basic analog, IR Recv */
1032 case 22129:
1033 /* WinTV-HVR1210 (PCIe, Retail, full height)
1034 * DVB-T and basic analog, IR Recv */
Michael Krufky36396c82008-05-02 16:14:33 -03001035 case 71009:
1036 /* WinTV-HVR1200 (PCIe, Retail, full height)
1037 * DVB-T and basic analog */
Hans Verkuilcce11b02014-06-27 11:15:42 -03001038 case 71100:
1039 /* WinTV-ImpactVCB-e (PCIe, Retail, half height)
1040 * Basic analog */
Michael Krufky36396c82008-05-02 16:14:33 -03001041 case 71359:
1042 /* WinTV-HVR1200 (PCIe, OEM, half height)
1043 * DVB-T and basic analog */
1044 case 71439:
1045 /* WinTV-HVR1200 (PCIe, OEM, half height)
1046 * DVB-T and basic analog */
1047 case 71449:
1048 /* WinTV-HVR1200 (PCIe, OEM, full height)
1049 * DVB-T and basic analog */
1050 case 71939:
1051 /* WinTV-HVR1200 (PCIe, OEM, half height)
1052 * DVB-T and basic analog */
1053 case 71949:
1054 /* WinTV-HVR1200 (PCIe, OEM, full height)
1055 * DVB-T and basic analog */
1056 case 71959:
1057 /* WinTV-HVR1200 (PCIe, OEM, full height)
1058 * DVB-T and basic analog */
1059 case 71979:
1060 /* WinTV-HVR1200 (PCIe, OEM, half height)
1061 * DVB-T and basic analog */
1062 case 71999:
1063 /* WinTV-HVR1200 (PCIe, OEM, full height)
1064 * DVB-T and basic analog */
Steven Toth9c8ced52008-10-16 20:18:44 -03001065 case 76601:
1066 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
1067 channel ATSC and MPEG2 HW Encoder */
1068 case 77001:
1069 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
1070 and Basic analog */
1071 case 77011:
1072 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
1073 and Basic analog */
1074 case 77041:
1075 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
1076 and Basic analog */
1077 case 77051:
1078 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
1079 and Basic analog */
1080 case 78011:
1081 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
1082 Dual channel ATSC and MPEG2 HW Encoder */
1083 case 78501:
1084 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1085 Dual channel ATSC and MPEG2 HW Encoder */
1086 case 78521:
1087 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1088 Dual channel ATSC and MPEG2 HW Encoder */
1089 case 78531:
1090 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
1091 Dual channel ATSC and MPEG2 HW Encoder */
1092 case 78631:
1093 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
1094 Dual channel ATSC and MPEG2 HW Encoder */
1095 case 79001:
1096 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
1097 ATSC and Basic analog */
1098 case 79101:
1099 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
1100 ATSC and Basic analog */
Andy Wallsebbeb462010-07-18 17:35:00 -03001101 case 79501:
1102 /* WinTV-HVR1250 (PCIe, No IR, half height,
1103 ATSC [at least] and Basic analog) */
Steven Toth9c8ced52008-10-16 20:18:44 -03001104 case 79561:
1105 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1106 ATSC and Basic analog */
1107 case 79571:
1108 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
1109 ATSC and Basic analog */
1110 case 79671:
1111 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1112 ATSC and Basic analog */
Steven Toth66762372008-04-22 15:38:26 -03001113 case 80019:
1114 /* WinTV-HVR1400 (Express Card, Retail, IR,
1115 * DVB-T and Basic analog */
Michael Krufky36396c82008-05-02 16:14:33 -03001116 case 81509:
1117 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
1118 * DVB-T and MPEG2 HW Encoder */
Steven Totha780a312008-04-19 01:25:52 -03001119 case 81519:
Michael Krufky36396c82008-05-02 16:14:33 -03001120 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
Steven Totha780a312008-04-19 01:25:52 -03001121 * DVB-T and MPEG2 HW Encoder */
Steven Tothd19770e2007-03-11 20:44:05 -03001122 break;
Steven Toth136973802009-07-20 15:37:25 -03001123 case 85021:
Michael Krufky73a5f412009-11-11 10:46:40 -03001124 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
Steven Toth136973802009-07-20 15:37:25 -03001125 Dual channel ATSC and MPEG2 HW Encoder */
1126 break;
Michael Krufky73a5f412009-11-11 10:46:40 -03001127 case 85721:
1128 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
1129 Dual channel ATSC and Basic analog */
1130 break;
Steven Tothd19770e2007-03-11 20:44:05 -03001131 default:
Steven Toth136973802009-07-20 15:37:25 -03001132 printk(KERN_WARNING "%s: warning: "
1133 "unknown hauppauge model #%d\n",
Steven Toth9c8ced52008-10-16 20:18:44 -03001134 dev->name, tv.model);
Steven Tothd19770e2007-03-11 20:44:05 -03001135 break;
1136 }
1137
1138 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
1139 dev->name, tv.model);
1140}
1141
Luis Alvese6001482013-10-01 22:11:35 -03001142/* Some TBS cards require initing a chip using a bitbanged SPI attached
1143 to the cx23885 gpio's. If this chip doesn't get init'ed the demod
1144 doesn't respond to any command. */
1145static void tbs_card_init(struct cx23885_dev *dev)
1146{
1147 int i;
1148 const u8 buf[] = {
1149 0xe0, 0x06, 0x66, 0x33, 0x65,
1150 0x01, 0x17, 0x06, 0xde};
1151
1152 switch (dev->board) {
1153 case CX23885_BOARD_TBS_6980:
1154 case CX23885_BOARD_TBS_6981:
1155 cx_set(GP0_IO, 0x00070007);
1156 usleep_range(1000, 10000);
1157 cx_clear(GP0_IO, 2);
1158 usleep_range(1000, 10000);
1159 for (i = 0; i < 9 * 8; i++) {
1160 cx_clear(GP0_IO, 7);
1161 usleep_range(1000, 10000);
1162 cx_set(GP0_IO,
1163 ((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4);
1164 usleep_range(1000, 10000);
1165 }
1166 cx_set(GP0_IO, 7);
1167 break;
1168 }
1169}
1170
Michael Krufkyd7cba042008-09-12 13:31:45 -03001171int cx23885_tuner_callback(void *priv, int component, int command, int arg)
Steven Toth8c700172008-01-05 16:55:45 -03001172{
Steven Toth89ce2212008-08-04 22:18:19 -03001173 struct cx23885_tsport *port = priv;
1174 struct cx23885_dev *dev = port->dev;
Steven Toth6df51692008-06-30 22:17:05 -03001175 u32 bitmask = 0;
1176
Anton Blanchardc6cff162012-07-01 21:38:03 -03001177 if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH))
Steven Toth89ce2212008-08-04 22:18:19 -03001178 return 0;
1179
Steven Toth6df51692008-06-30 22:17:05 -03001180 if (command != 0) {
1181 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
1182 __func__, command);
1183 return -EINVAL;
1184 }
Steven Toth8c700172008-01-05 16:55:45 -03001185
Steven Toth9c8ced52008-10-16 20:18:44 -03001186 switch (dev->board) {
Steven Toth90a71b12008-08-04 21:38:46 -03001187 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1188 case CX23885_BOARD_HAUPPAUGE_HVR1500:
Steven Toth8c700172008-01-05 16:55:45 -03001189 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
Steven Toth4c56b042008-08-12 13:30:03 -03001190 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
Anca Emanuel642ca1a2013-09-13 11:28:12 -03001191 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
istvan_v@mailbox.hu0cf8af52011-07-11 10:58:35 -03001192 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
Igor M. Liplianin9bb1b7e2008-11-23 14:11:16 -03001193 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
Vladimir Geroy34e383d2009-09-18 18:55:47 -03001194 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
Kusanagi Kouichi0b32d652010-01-22 04:55:28 -03001195 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
Steven Toth90a71b12008-08-04 21:38:46 -03001196 /* Tuner Reset Command */
Steven Toth4c56b042008-08-12 13:30:03 -03001197 bitmask = 0x04;
Steven Toth6df51692008-06-30 22:17:05 -03001198 break;
1199 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
Steven Tothaef2d182008-08-04 21:39:53 -03001200 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
James Harper46b21bb2014-06-12 07:12:24 -03001201 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
Steven Toth4c56b042008-08-12 13:30:03 -03001202 /* Two identical tuners on two different i2c buses,
1203 * we need to reset the correct gpio. */
Christopher Pascoed4dc6732009-04-27 11:27:04 -03001204 if (port->nr == 1)
Steven Toth4c56b042008-08-12 13:30:03 -03001205 bitmask = 0x01;
Christopher Pascoed4dc6732009-04-27 11:27:04 -03001206 else if (port->nr == 2)
Steven Toth4c56b042008-08-12 13:30:03 -03001207 bitmask = 0x04;
Steven Toth8c700172008-01-05 16:55:45 -03001208 break;
Alexey Chernov9028f582010-12-06 17:09:53 -03001209 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1210 /* Tuner Reset Command */
1211 bitmask = 0x02;
1212 break;
Igor M. Liplianin78db8542011-01-25 17:04:00 -03001213 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1214 altera_ci_tuner_reset(dev, port->nr);
1215 break;
Oleh Kravchenkoe8d42372012-12-08 18:20:59 -03001216 case CX23885_BOARD_AVERMEDIA_HC81R:
1217 /* XC3028L Reset Command */
1218 bitmask = 1 << 2;
1219 break;
Steven Toth8c700172008-01-05 16:55:45 -03001220 }
1221
Steven Toth6df51692008-06-30 22:17:05 -03001222 if (bitmask) {
1223 /* Drive the tuner into reset and back out */
1224 cx_clear(GP0_IO, bitmask);
1225 mdelay(200);
1226 cx_set(GP0_IO, bitmask);
1227 }
1228
1229 return 0;
Steven Toth8c700172008-01-05 16:55:45 -03001230}
Steven Toth73c993a2008-01-05 17:08:05 -03001231
Steven Totha6a3f142007-09-08 21:31:56 -03001232void cx23885_gpio_setup(struct cx23885_dev *dev)
1233{
Steven Toth9c8ced52008-10-16 20:18:44 -03001234 switch (dev->board) {
Steven Totha6a3f142007-09-08 21:31:56 -03001235 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1236 /* GPIO-0 cx24227 demodulator reset */
1237 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1238 break;
Michael Krufky07b4a832007-12-18 01:09:11 -03001239 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1240 /* GPIO-0 cx24227 demodulator */
1241 /* GPIO-2 xc3028 tuner */
1242
1243 /* Put the parts into reset */
1244 cx_set(GP0_IO, 0x00050000);
1245 cx_clear(GP0_IO, 0x00000005);
1246 msleep(5);
1247
1248 /* Bring the parts out of reset */
1249 cx_set(GP0_IO, 0x00050005);
1250 break;
Steven Tothd1987d52007-12-18 01:57:06 -03001251 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1252 /* GPIO-0 cx24227 demodulator reset */
1253 /* GPIO-2 xc5000 tuner reset */
1254 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
1255 break;
Steven Totha6a3f142007-09-08 21:31:56 -03001256 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1257 /* GPIO-0 656_CLK */
1258 /* GPIO-1 656_D0 */
1259 /* GPIO-2 8295A Reset */
1260 /* GPIO-3-10 cx23417 data0-7 */
1261 /* GPIO-11-14 cx23417 addr0-3 */
1262 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1263 /* GPIO-19 IR_RX */
Michael Krufky3ba71d22007-12-07 01:40:36 -03001264
Steven Totha589b662008-01-13 23:44:47 -03001265 /* CX23417 GPIO's */
1266 /* EIO15 Zilog Reset */
1267 /* EIO14 S5H1409/CX24227 Reset */
Steven Tothf659c512009-06-25 23:43:31 -03001268 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
1269
1270 /* Put the demod into reset and protect the eeprom */
1271 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
1272 mdelay(100);
1273
1274 /* Bring the demod and blaster out of reset */
1275 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
1276 mdelay(100);
Steven Totha589b662008-01-13 23:44:47 -03001277
Steven Toth5206d6e2008-01-10 02:09:27 -03001278 /* Force the TDA8295A into reset and back */
Steven Toth21ff3e42009-06-25 23:50:39 -03001279 cx23885_gpio_enable(dev, GPIO_2, 1);
1280 cx23885_gpio_set(dev, GPIO_2);
Steven Toth5206d6e2008-01-10 02:09:27 -03001281 mdelay(20);
Steven Toth21ff3e42009-06-25 23:50:39 -03001282 cx23885_gpio_clear(dev, GPIO_2);
Steven Toth5206d6e2008-01-10 02:09:27 -03001283 mdelay(20);
Steven Toth21ff3e42009-06-25 23:50:39 -03001284 cx23885_gpio_set(dev, GPIO_2);
Steven Toth5206d6e2008-01-10 02:09:27 -03001285 mdelay(20);
Steven Totha6a3f142007-09-08 21:31:56 -03001286 break;
Steven Tothb3ea0162008-04-19 01:14:19 -03001287 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1288 /* GPIO-0 tda10048 demodulator reset */
1289 /* GPIO-2 tda18271 tuner reset */
1290
1291 /* Put the parts into reset and back */
1292 cx_set(GP0_IO, 0x00050000);
1293 mdelay(20);
1294 cx_clear(GP0_IO, 0x00000005);
1295 mdelay(20);
1296 cx_set(GP0_IO, 0x00050005);
1297 break;
Steven Totha780a312008-04-19 01:25:52 -03001298 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1299 /* GPIO-0 TDA10048 demodulator reset */
1300 /* GPIO-2 TDA8295A Reset */
1301 /* GPIO-3-10 cx23417 data0-7 */
1302 /* GPIO-11-14 cx23417 addr0-3 */
1303 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1304
1305 /* The following GPIO's are on the interna AVCore (cx25840) */
1306 /* GPIO-19 IR_RX */
1307 /* GPIO-20 IR_TX 416/DVBT Select */
1308 /* GPIO-21 IIS DAT */
1309 /* GPIO-22 IIS WCLK */
1310 /* GPIO-23 IIS BCLK */
1311
1312 /* Put the parts into reset and back */
1313 cx_set(GP0_IO, 0x00050000);
1314 mdelay(20);
1315 cx_clear(GP0_IO, 0x00000005);
1316 mdelay(20);
1317 cx_set(GP0_IO, 0x00050005);
1318 break;
Steven Toth66762372008-04-22 15:38:26 -03001319 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1320 /* GPIO-0 Dibcom7000p demodulator reset */
1321 /* GPIO-2 xc3028L tuner reset */
1322 /* GPIO-13 LED */
1323
1324 /* Put the parts into reset and back */
1325 cx_set(GP0_IO, 0x00050000);
1326 mdelay(20);
1327 cx_clear(GP0_IO, 0x00000005);
1328 mdelay(20);
1329 cx_set(GP0_IO, 0x00050005);
1330 break;
Steven Toth1ecc5ae2008-06-30 21:23:50 -03001331 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1332 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
1333 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
1334 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
1335 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
1336
1337 /* Put the parts into reset and back */
1338 cx_set(GP0_IO, 0x000f0000);
1339 mdelay(20);
1340 cx_clear(GP0_IO, 0x0000000f);
1341 mdelay(20);
1342 cx_set(GP0_IO, 0x000f000f);
1343 break;
Steven Tothaef2d182008-08-04 21:39:53 -03001344 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
James Harper46b21bb2014-06-12 07:12:24 -03001345 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
Steven Tothaef2d182008-08-04 21:39:53 -03001346 /* GPIO-0 portb xc3028 reset */
1347 /* GPIO-1 portb zl10353 reset */
1348 /* GPIO-2 portc xc3028 reset */
1349 /* GPIO-3 portc zl10353 reset */
1350
1351 /* Put the parts into reset and back */
1352 cx_set(GP0_IO, 0x000f0000);
1353 mdelay(20);
1354 cx_clear(GP0_IO, 0x0000000f);
1355 mdelay(20);
1356 cx_set(GP0_IO, 0x000f000f);
1357 break;
Steven Toth4c56b042008-08-12 13:30:03 -03001358 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
Anca Emanuel642ca1a2013-09-13 11:28:12 -03001359 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
istvan_v@mailbox.hu0cf8af52011-07-11 10:58:35 -03001360 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
Igor M. Liplianin9bb1b7e2008-11-23 14:11:16 -03001361 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
Vladimir Geroy34e383d2009-09-18 18:55:47 -03001362 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
Kusanagi Kouichi0b32d652010-01-22 04:55:28 -03001363 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
Steven Toth4c56b042008-08-12 13:30:03 -03001364 /* GPIO-2 xc3028 tuner reset */
1365
1366 /* The following GPIO's are on the internal AVCore (cx25840) */
1367 /* GPIO-? zl10353 demod reset */
1368
1369 /* Put the parts into reset and back */
1370 cx_set(GP0_IO, 0x00040000);
1371 mdelay(20);
1372 cx_clear(GP0_IO, 0x00000004);
1373 mdelay(20);
1374 cx_set(GP0_IO, 0x00040004);
1375 break;
Igor M. Liplianin96318d02009-01-17 12:11:20 -03001376 case CX23885_BOARD_TBS_6920:
Luis Alvese6001482013-10-01 22:11:35 -03001377 case CX23885_BOARD_TBS_6980:
1378 case CX23885_BOARD_TBS_6981:
Mariusz Bia?o?czykf6671902012-09-12 07:59:18 -03001379 case CX23885_BOARD_PROF_8000:
Igor M. Liplianin96318d02009-01-17 12:11:20 -03001380 cx_write(MC417_CTL, 0x00000036);
1381 cx_write(MC417_OEN, 0x00001000);
Igor M. Liplianin09ea33e2009-11-24 20:16:04 -03001382 cx_set(MC417_RWD, 0x00000002);
1383 mdelay(200);
1384 cx_clear(MC417_RWD, 0x00000800);
1385 mdelay(200);
1386 cx_set(MC417_RWD, 0x00000800);
1387 mdelay(200);
Igor M. Liplianin96318d02009-01-17 12:11:20 -03001388 break;
Igor M. Liplianin5a23b072009-03-03 12:06:09 -03001389 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1390 /* GPIO-0 INTA from CiMax1
1391 GPIO-1 INTB from CiMax2
1392 GPIO-2 reset chips
1393 GPIO-3 to GPIO-10 data/addr for CA
1394 GPIO-11 ~CS0 to CiMax1
1395 GPIO-12 ~CS1 to CiMax2
1396 GPIO-13 ADL0 load LSB addr
1397 GPIO-14 ADL1 load MSB addr
1398 GPIO-15 ~RDY from CiMax
1399 GPIO-17 ~RD to CiMax
1400 GPIO-18 ~WR to CiMax
1401 */
1402 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
1403 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
1404 cx_clear(GP0_IO, 0x00030004);
1405 mdelay(100);/* reset delay */
1406 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
1407 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
1408 /* GPIO-15 IN as ~ACK, rest as OUT */
1409 cx_write(MC417_OEN, 0x00001000);
1410 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1411 cx_write(MC417_RWD, 0x0000c300);
1412 /* enable irq */
1413 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1414 break;
Steven Toth2074dff2009-05-02 11:39:46 -03001415 case CX23885_BOARD_HAUPPAUGE_HVR1270:
Michael Krufkyd099bec2009-05-08 22:39:24 -03001416 case CX23885_BOARD_HAUPPAUGE_HVR1275:
Michael Krufky19bc5792009-05-08 16:05:29 -03001417 case CX23885_BOARD_HAUPPAUGE_HVR1255:
Devin Heitmueller0ac60ac2012-07-01 16:15:14 -03001418 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
Michael Krufky6b926ec2009-05-12 17:32:17 -03001419 case CX23885_BOARD_HAUPPAUGE_HVR1210:
Michael Krufkyd099bec2009-05-08 22:39:24 -03001420 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
Michael Krufky6b926ec2009-05-12 17:32:17 -03001421 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
1422 /* GPIO-9 Demod reset */
Steven Toth2074dff2009-05-02 11:39:46 -03001423
1424 /* Put the parts into reset and back */
Michael Krufkyd099bec2009-05-08 22:39:24 -03001425 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
1426 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
Steven Toth2074dff2009-05-02 11:39:46 -03001427 cx23885_gpio_clear(dev, GPIO_9);
1428 mdelay(20);
1429 cx23885_gpio_set(dev, GPIO_9);
1430 break;
David Wong493b7122009-05-18 05:25:49 -03001431 case CX23885_BOARD_MYGICA_X8506:
David Wong2365b2d2009-06-17 01:38:12 -03001432 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
Alfredo Jesús Delaiti87988752011-11-09 15:13:00 -03001433 case CX23885_BOARD_MYGICA_X8507:
David T.L. Wong8e069bb2009-10-21 12:29:11 -03001434 /* GPIO-0 (0)Analog / (1)Digital TV */
David Wong493b7122009-05-18 05:25:49 -03001435 /* GPIO-1 reset XC5000 */
Mauro Carvalho Chehab0d1b5262013-08-09 08:53:27 -03001436 /* GPIO-2 demod reset */
David T.L. Wong8e069bb2009-10-21 12:29:11 -03001437 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
1438 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
David Wong493b7122009-05-18 05:25:49 -03001439 mdelay(100);
David T.L. Wong8e069bb2009-10-21 12:29:11 -03001440 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
David Wong493b7122009-05-18 05:25:49 -03001441 mdelay(100);
1442 break;
David T. L. Wongea5697f2009-10-26 08:54:04 -03001443 case CX23885_BOARD_MYGICA_X8558PRO:
1444 /* GPIO-0 reset first ATBM8830 */
1445 /* GPIO-1 reset second ATBM8830 */
1446 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
1447 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
1448 mdelay(100);
1449 cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
1450 mdelay(100);
1451 break;
Steven Toth136973802009-07-20 15:37:25 -03001452 case CX23885_BOARD_HAUPPAUGE_HVR1850:
Michael Krufkyaee0b242009-11-11 01:52:45 -03001453 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Steven Toth136973802009-07-20 15:37:25 -03001454 /* GPIO-0 656_CLK */
1455 /* GPIO-1 656_D0 */
1456 /* GPIO-2 Wake# */
1457 /* GPIO-3-10 cx23417 data0-7 */
1458 /* GPIO-11-14 cx23417 addr0-3 */
1459 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1460 /* GPIO-19 IR_RX */
1461 /* GPIO-20 C_IR_TX */
1462 /* GPIO-21 I2S DAT */
1463 /* GPIO-22 I2S WCLK */
1464 /* GPIO-23 I2S BCLK */
1465 /* ALT GPIO: EXP GPIO LATCH */
1466
1467 /* CX23417 GPIO's */
1468 /* GPIO-14 S5H1411/CX24228 Reset */
1469 /* GPIO-13 EEPROM write protect */
1470 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1471
1472 /* Put the demod into reset and protect the eeprom */
1473 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
1474 mdelay(100);
1475
1476 /* Bring the demod out of reset */
1477 mc417_gpio_set(dev, GPIO_14);
1478 mdelay(100);
1479
1480 /* CX24228 GPIO */
1481 /* Connected to IF / Mux */
1482 break;
Alexey Chernov9028f582010-12-06 17:09:53 -03001483 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1484 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1485 break;
Igor M. Liplianin78db8542011-01-25 17:04:00 -03001486 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1487 /* GPIO-0 ~INT in
1488 GPIO-1 TMS out
1489 GPIO-2 ~reset chips out
1490 GPIO-3 to GPIO-10 data/addr for CA in/out
1491 GPIO-11 ~CS out
1492 GPIO-12 ADDR out
1493 GPIO-13 ~WR out
1494 GPIO-14 ~RD out
1495 GPIO-15 ~RDY in
1496 GPIO-16 TCK out
1497 GPIO-17 TDO in
1498 GPIO-18 TDI out
1499 */
1500 cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1501 /* GPIO-0 as INT, reset & TMS low */
1502 cx_clear(GP0_IO, 0x00010006);
1503 mdelay(100);/* reset delay */
1504 cx_set(GP0_IO, 0x00000004); /* reset high */
1505 cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1506 /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1507 cx_write(MC417_OEN, 0x00005000);
1508 /* ~RD, ~WR high; ADDR low; ~CS high */
1509 cx_write(MC417_RWD, 0x00000d00);
1510 /* enable irq */
1511 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1512 break;
Michael Krufky7c62f5a2012-12-15 23:34:09 -03001513 case CX23885_BOARD_HAUPPAUGE_HVR4400:
1514 /* GPIO-8 tda10071 demod reset */
Matthias Schwarzott36efec42014-07-22 17:12:13 -03001515 /* GPIO-9 si2165 demod reset */
Michael Krufky7c62f5a2012-12-15 23:34:09 -03001516
1517 /* Put the parts into reset and back */
Matthias Schwarzott36efec42014-07-22 17:12:13 -03001518 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
1519
1520 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
Michael Krufky7c62f5a2012-12-15 23:34:09 -03001521 mdelay(100);
Matthias Schwarzott36efec42014-07-22 17:12:13 -03001522 cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
Michael Krufky7c62f5a2012-12-15 23:34:09 -03001523 mdelay(100);
Matthias Schwarzott36efec42014-07-22 17:12:13 -03001524
Michael Krufky7c62f5a2012-12-15 23:34:09 -03001525 break;
Oleh Kravchenkoe8d42372012-12-08 18:20:59 -03001526 case CX23885_BOARD_AVERMEDIA_HC81R:
1527 cx_clear(MC417_CTL, 1);
1528 /* GPIO-0,1,2 setup direction as output */
1529 cx_set(GP0_IO, 0x00070000);
1530 mdelay(10);
1531 /* AF9013 demod reset */
1532 cx_set(GP0_IO, 0x00010001);
1533 mdelay(10);
1534 cx_clear(GP0_IO, 0x00010001);
1535 mdelay(10);
1536 cx_set(GP0_IO, 0x00010001);
1537 mdelay(10);
1538 /* demod tune? */
1539 cx_clear(GP0_IO, 0x00030003);
1540 mdelay(10);
1541 cx_set(GP0_IO, 0x00020002);
1542 mdelay(10);
1543 cx_set(GP0_IO, 0x00010001);
1544 mdelay(10);
1545 cx_clear(GP0_IO, 0x00020002);
1546 /* XC3028L tuner reset */
1547 cx_set(GP0_IO, 0x00040004);
1548 cx_clear(GP0_IO, 0x00040004);
1549 cx_set(GP0_IO, 0x00040004);
1550 mdelay(60);
1551 break;
Olli Salonen29442262014-08-11 16:58:15 -03001552 case CX23885_BOARD_DVBSKY_T9580:
1553 /* enable GPIO3-18 pins */
1554 cx_write(MC417_CTL, 0x00000037);
1555 cx23885_gpio_enable(dev, GPIO_2 | GPIO_11, 1);
1556 cx23885_gpio_clear(dev, GPIO_2 | GPIO_11);
1557 mdelay(100);
1558 cx23885_gpio_set(dev, GPIO_2 | GPIO_11);
1559 break;
Olli Salonen82c10272014-09-29 04:44:16 -03001560 case CX23885_BOARD_DVBSKY_T980C:
nibble.max0e6c7b02014-10-23 07:01:44 -03001561 case CX23885_BOARD_DVBSKY_S950C:
Olli Salonen82c10272014-09-29 04:44:16 -03001562 /*
1563 * GPIO-0 INTA from CiMax, input
1564 * GPIO-1 reset CiMax, output, high active
1565 * GPIO-2 reset demod, output, low active
1566 * GPIO-3 to GPIO-10 data/addr for CAM
1567 * GPIO-11 ~CS0 to CiMax1
1568 * GPIO-12 ~CS1 to CiMax2
1569 * GPIO-13 ADL0 load LSB addr
1570 * GPIO-14 ADL1 load MSB addr
1571 * GPIO-15 ~RDY from CiMax
1572 * GPIO-17 ~RD to CiMax
1573 * GPIO-18 ~WR to CiMax
1574 */
1575
1576 cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */
1577 cx_clear(GP0_IO, 0x00010004); /* GPIO 0 as input */
1578 mdelay(100); /* reset delay */
1579 cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */
1580 cx_clear(GP0_IO, 0x00010002);
1581 cx_write(MC417_CTL, 0x00000037); /* enable GPIO3-18 pins */
1582
1583 /* GPIO-15 IN as ~ACK, rest as OUT */
1584 cx_write(MC417_OEN, 0x00001000);
1585
1586 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1587 cx_write(MC417_RWD, 0x0000c300);
1588
1589 /* enable irq */
1590 cx_write(GPIO_ISM, 0x00000000); /* INTERRUPTS active low */
Steven Totha6a3f142007-09-08 21:31:56 -03001591 }
1592}
1593
1594int cx23885_ir_init(struct cx23885_dev *dev)
1595{
Andy Walls98d109f2010-07-19 00:41:41 -03001596 static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
Andy Walls81f287d2010-07-18 20:26:37 -03001597 {
1598 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
1599 .pin = CX23885_PIN_IR_RX_GPIO19,
1600 .function = CX23885_PAD_IR_RX,
1601 .value = 0,
1602 .strength = CX25840_PIN_DRIVE_MEDIUM,
1603 }, {
1604 .flags = V4L2_SUBDEV_IO_PIN_OUTPUT,
1605 .pin = CX23885_PIN_IR_TX_GPIO20,
1606 .function = CX23885_PAD_IR_TX,
1607 .value = 0,
1608 .strength = CX25840_PIN_DRIVE_MEDIUM,
1609 }
1610 };
Andy Walls98d109f2010-07-19 00:41:41 -03001611 const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1612
1613 static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1614 {
1615 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
1616 .pin = CX23885_PIN_IR_RX_GPIO19,
1617 .function = CX23885_PAD_IR_RX,
1618 .value = 0,
1619 .strength = CX25840_PIN_DRIVE_MEDIUM,
1620 }
1621 };
1622 const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
Andy Walls81f287d2010-07-18 20:26:37 -03001623
1624 struct v4l2_subdev_ir_parameters params;
Andy Walls29f8a0a2009-09-26 23:17:30 -03001625 int ret = 0;
Steven Totha6a3f142007-09-08 21:31:56 -03001626 switch (dev->board) {
Michael Krufky07b4a832007-12-18 01:09:11 -03001627 case CX23885_BOARD_HAUPPAUGE_HVR1500:
Steven Tothd1987d52007-12-18 01:57:06 -03001628 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
Steven Totha6a3f142007-09-08 21:31:56 -03001629 case CX23885_BOARD_HAUPPAUGE_HVR1800:
Steven Tothb3ea0162008-04-19 01:14:19 -03001630 case CX23885_BOARD_HAUPPAUGE_HVR1200:
Steven Toth66762372008-04-22 15:38:26 -03001631 case CX23885_BOARD_HAUPPAUGE_HVR1400:
Michael Krufkyd099bec2009-05-08 22:39:24 -03001632 case CX23885_BOARD_HAUPPAUGE_HVR1275:
Michael Krufky19bc5792009-05-08 16:05:29 -03001633 case CX23885_BOARD_HAUPPAUGE_HVR1255:
Devin Heitmueller0ac60ac2012-07-01 16:15:14 -03001634 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
Michael Krufky6b926ec2009-05-12 17:32:17 -03001635 case CX23885_BOARD_HAUPPAUGE_HVR1210:
Steven Totha6a3f142007-09-08 21:31:56 -03001636 /* FIXME: Implement me */
1637 break;
Andy Walls9b3d8ec2011-06-08 21:24:25 -03001638 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1639 ret = cx23888_ir_probe(dev);
1640 if (ret)
1641 break;
1642 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1643 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1644 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1645 break;
Andy Walls29f8a0a2009-09-26 23:17:30 -03001646 case CX23885_BOARD_HAUPPAUGE_HVR1850:
Michael Krufky7fec6fe2009-11-11 15:46:09 -03001647 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Andy Walls29f8a0a2009-09-26 23:17:30 -03001648 ret = cx23888_ir_probe(dev);
1649 if (ret)
1650 break;
1651 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
Andy Walls81f287d2010-07-18 20:26:37 -03001652 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
Andy Walls98d109f2010-07-19 00:41:41 -03001653 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
Andy Walls81f287d2010-07-18 20:26:37 -03001654 /*
1655 * For these boards we need to invert the Tx output via the
1656 * IR controller to have the LED off while idle
1657 */
1658 v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, &params);
1659 params.enable = false;
1660 params.shutdown = false;
1661 params.invert_level = true;
1662 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1663 params.shutdown = true;
1664 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
Andy Walls29f8a0a2009-09-26 23:17:30 -03001665 break;
Djuri Baars076f0e32012-07-28 09:01:38 -03001666 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
Andy Walls98d109f2010-07-19 00:41:41 -03001667 case CX23885_BOARD_TEVII_S470:
Alfredo Jesús Delaitie5f670b2012-11-08 15:50:25 -03001668 case CX23885_BOARD_MYGICA_X8507:
Luis Alvese6001482013-10-01 22:11:35 -03001669 case CX23885_BOARD_TBS_6980:
1670 case CX23885_BOARD_TBS_6981:
nibble.maxd11a3832014-09-29 11:17:36 -03001671 case CX23885_BOARD_DVBSKY_T9580:
Andy Wallsfa647f22010-07-19 21:22:05 -03001672 if (!enable_885_ir)
1673 break;
Andy Walls98d109f2010-07-19 00:41:41 -03001674 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1675 if (dev->sd_ir == NULL) {
1676 ret = -ENODEV;
1677 break;
1678 }
1679 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1680 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
Andy Walls98d109f2010-07-19 00:41:41 -03001681 break;
1682 case CX23885_BOARD_HAUPPAUGE_HVR1250:
Andy Wallsfa647f22010-07-19 21:22:05 -03001683 if (!enable_885_ir)
1684 break;
Andy Walls98d109f2010-07-19 00:41:41 -03001685 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1686 if (dev->sd_ir == NULL) {
1687 ret = -ENODEV;
1688 break;
1689 }
1690 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1691 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
Andy Walls98d109f2010-07-19 00:41:41 -03001692 break;
Steven Toth12886872008-08-04 21:41:06 -03001693 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
James Harper46b21bb2014-06-12 07:12:24 -03001694 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
Steven Toth12886872008-08-04 21:41:06 -03001695 request_module("ir-kbd-i2c");
1696 break;
Steven Totha6a3f142007-09-08 21:31:56 -03001697 }
1698
Andy Walls29f8a0a2009-09-26 23:17:30 -03001699 return ret;
Steven Totha6a3f142007-09-08 21:31:56 -03001700}
1701
Andy Wallsf59ad612009-09-27 19:51:50 -03001702void cx23885_ir_fini(struct cx23885_dev *dev)
1703{
1704 switch (dev->board) {
Andy Walls9b3d8ec2011-06-08 21:24:25 -03001705 case CX23885_BOARD_HAUPPAUGE_HVR1270:
Andy Wallsf59ad612009-09-27 19:51:50 -03001706 case CX23885_BOARD_HAUPPAUGE_HVR1850:
Michael Krufky7fec6fe2009-11-11 15:46:09 -03001707 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Andy Wallsdbe83a32010-07-19 01:19:43 -03001708 cx23885_irq_remove(dev, PCI_MSK_IR);
Andy Wallsf59ad612009-09-27 19:51:50 -03001709 cx23888_ir_remove(dev);
1710 dev->sd_ir = NULL;
1711 break;
Djuri Baars076f0e32012-07-28 09:01:38 -03001712 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
Andy Walls98d109f2010-07-19 00:41:41 -03001713 case CX23885_BOARD_TEVII_S470:
1714 case CX23885_BOARD_HAUPPAUGE_HVR1250:
Alfredo Jesús Delaitie5f670b2012-11-08 15:50:25 -03001715 case CX23885_BOARD_MYGICA_X8507:
Luis Alvese6001482013-10-01 22:11:35 -03001716 case CX23885_BOARD_TBS_6980:
1717 case CX23885_BOARD_TBS_6981:
nibble.maxd11a3832014-09-29 11:17:36 -03001718 case CX23885_BOARD_DVBSKY_T9580:
Andy Wallsdbe83a32010-07-19 01:19:43 -03001719 cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
Andy Walls98d109f2010-07-19 00:41:41 -03001720 /* sd_ir is a duplicate pointer to the AV Core, just clear it */
1721 dev->sd_ir = NULL;
1722 break;
Andy Wallsf59ad612009-09-27 19:51:50 -03001723 }
1724}
1725
Mauro Carvalho Chehabada73ee2012-10-27 11:29:23 -03001726static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
Igor M. Liplianin78db8542011-01-25 17:04:00 -03001727{
1728 int data;
1729 int tdo = 0;
1730 struct cx23885_dev *dev = (struct cx23885_dev *)device;
1731 /*TMS*/
1732 data = ((cx_read(GP0_IO)) & (~0x00000002));
1733 data |= (tms ? 0x00020002 : 0x00020000);
1734 cx_write(GP0_IO, data);
1735
1736 /*TDI*/
1737 data = ((cx_read(MC417_RWD)) & (~0x0000a000));
1738 data |= (tdi ? 0x00008000 : 0);
1739 cx_write(MC417_RWD, data);
1740 if (read_tdo)
1741 tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
1742
1743 cx_write(MC417_RWD, data | 0x00002000);
1744 udelay(1);
1745 /*TCK*/
1746 cx_write(MC417_RWD, data);
1747
1748 return tdo;
1749}
1750
Andy Wallsf59ad612009-09-27 19:51:50 -03001751void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
1752{
1753 switch (dev->board) {
Andy Walls9b3d8ec2011-06-08 21:24:25 -03001754 case CX23885_BOARD_HAUPPAUGE_HVR1270:
Andy Wallsf59ad612009-09-27 19:51:50 -03001755 case CX23885_BOARD_HAUPPAUGE_HVR1850:
Michael Krufky7fec6fe2009-11-11 15:46:09 -03001756 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Andy Wallsdbe83a32010-07-19 01:19:43 -03001757 if (dev->sd_ir)
1758 cx23885_irq_add_enable(dev, PCI_MSK_IR);
Andy Wallsf59ad612009-09-27 19:51:50 -03001759 break;
Djuri Baars076f0e32012-07-28 09:01:38 -03001760 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
Andy Walls98d109f2010-07-19 00:41:41 -03001761 case CX23885_BOARD_TEVII_S470:
1762 case CX23885_BOARD_HAUPPAUGE_HVR1250:
Alfredo Jesús Delaitie5f670b2012-11-08 15:50:25 -03001763 case CX23885_BOARD_MYGICA_X8507:
Luis Alvese6001482013-10-01 22:11:35 -03001764 case CX23885_BOARD_TBS_6980:
1765 case CX23885_BOARD_TBS_6981:
nibble.maxd11a3832014-09-29 11:17:36 -03001766 case CX23885_BOARD_DVBSKY_T9580:
Andy Wallsdbe83a32010-07-19 01:19:43 -03001767 if (dev->sd_ir)
1768 cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
Andy Walls98d109f2010-07-19 00:41:41 -03001769 break;
Andy Wallsf59ad612009-09-27 19:51:50 -03001770 }
1771}
1772
Steven Tothd19770e2007-03-11 20:44:05 -03001773void cx23885_card_setup(struct cx23885_dev *dev)
1774{
Steven Totha6a3f142007-09-08 21:31:56 -03001775 struct cx23885_tsport *ts1 = &dev->ts1;
1776 struct cx23885_tsport *ts2 = &dev->ts2;
1777
Steven Tothd19770e2007-03-11 20:44:05 -03001778 static u8 eeprom[256];
1779
1780 if (dev->i2c_bus[0].i2c_rc == 0) {
1781 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
Michael Krufky44a64812007-03-20 23:00:18 -03001782 tveeprom_read(&dev->i2c_bus[0].i2c_client,
1783 eeprom, sizeof(eeprom));
Steven Tothd19770e2007-03-11 20:44:05 -03001784 }
1785
1786 switch (dev->board) {
Steven Totha77743b2007-08-22 21:01:20 -03001787 case CX23885_BOARD_HAUPPAUGE_HVR1250:
Andy Wallsebbeb462010-07-18 17:35:00 -03001788 if (dev->i2c_bus[0].i2c_rc == 0) {
1789 if (eeprom[0x80] != 0x84)
1790 hauppauge_eeprom(dev, eeprom+0xc0);
1791 else
1792 hauppauge_eeprom(dev, eeprom+0x80);
1793 }
1794 break;
Michael Krufky07b4a832007-12-18 01:09:11 -03001795 case CX23885_BOARD_HAUPPAUGE_HVR1500:
Steven Tothd1987d52007-12-18 01:57:06 -03001796 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
Steven Toth66762372008-04-22 15:38:26 -03001797 case CX23885_BOARD_HAUPPAUGE_HVR1400:
Steven Tothc88133e2008-03-29 17:36:09 -03001798 if (dev->i2c_bus[0].i2c_rc == 0)
1799 hauppauge_eeprom(dev, eeprom+0x80);
1800 break;
Steven Tothd19770e2007-03-11 20:44:05 -03001801 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1802 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
Steven Tothb3ea0162008-04-19 01:14:19 -03001803 case CX23885_BOARD_HAUPPAUGE_HVR1200:
Steven Totha780a312008-04-19 01:25:52 -03001804 case CX23885_BOARD_HAUPPAUGE_HVR1700:
Steven Toth2074dff2009-05-02 11:39:46 -03001805 case CX23885_BOARD_HAUPPAUGE_HVR1270:
Michael Krufkyd099bec2009-05-08 22:39:24 -03001806 case CX23885_BOARD_HAUPPAUGE_HVR1275:
Michael Krufky19bc5792009-05-08 16:05:29 -03001807 case CX23885_BOARD_HAUPPAUGE_HVR1255:
Devin Heitmueller0ac60ac2012-07-01 16:15:14 -03001808 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
Michael Krufky6b926ec2009-05-12 17:32:17 -03001809 case CX23885_BOARD_HAUPPAUGE_HVR1210:
Steven Toth136973802009-07-20 15:37:25 -03001810 case CX23885_BOARD_HAUPPAUGE_HVR1850:
Michael Krufkyaee0b242009-11-11 01:52:45 -03001811 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Michael Krufky7c62f5a2012-12-15 23:34:09 -03001812 case CX23885_BOARD_HAUPPAUGE_HVR4400:
Hans Verkuilcce11b02014-06-27 11:15:42 -03001813 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
Steven Tothd19770e2007-03-11 20:44:05 -03001814 if (dev->i2c_bus[0].i2c_rc == 0)
Steven Tothc88133e2008-03-29 17:36:09 -03001815 hauppauge_eeprom(dev, eeprom+0xc0);
Steven Tothd19770e2007-03-11 20:44:05 -03001816 break;
1817 }
Steven Totha6a3f142007-09-08 21:31:56 -03001818
1819 switch (dev->board) {
Oleh Kravchenkoe8d42372012-12-08 18:20:59 -03001820 case CX23885_BOARD_AVERMEDIA_HC81R:
1821 /* Defaults for VID B */
1822 ts1->gen_ctrl_val = 0x4; /* Parallel */
1823 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1824 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1825 /* Defaults for VID C */
1826 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1827 ts2->gen_ctrl_val = 0x10e;
1828 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1829 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1830 break;
Michael Krufky335377b2008-05-07 01:43:10 -03001831 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
Steven Tothaef2d182008-08-04 21:39:53 -03001832 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
James Harper46b21bb2014-06-12 07:12:24 -03001833 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
Michael Krufky335377b2008-05-07 01:43:10 -03001834 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1835 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1836 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1837 /* break omitted intentionally */
Steven Totha6a3f142007-09-08 21:31:56 -03001838 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1839 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1840 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1841 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1842 break;
Steven Toth35045132012-01-04 21:08:35 -03001843 case CX23885_BOARD_HAUPPAUGE_HVR1850:
Steven Totha589b662008-01-13 23:44:47 -03001844 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1845 /* Defaults for VID B - Analog encoder */
1846 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1847 ts1->gen_ctrl_val = 0x10e;
1848 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1849 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1850
1851 /* APB_TSVALERR_POL (active low)*/
1852 ts1->vld_misc_val = 0x2000;
1853 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
Steven Toth35045132012-01-04 21:08:35 -03001854 cx_write(0x130184, 0xc);
Steven Totha589b662008-01-13 23:44:47 -03001855
1856 /* Defaults for VID C */
1857 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1858 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1859 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1860 break;
Igor M. Liplianin96318d02009-01-17 12:11:20 -03001861 case CX23885_BOARD_TBS_6920:
Igor M. Liplianin09ea33e2009-11-24 20:16:04 -03001862 ts1->gen_ctrl_val = 0x4; /* Parallel */
1863 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1864 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1865 break;
1866 case CX23885_BOARD_TEVII_S470:
Igor M. Liplianin7b134e82012-05-11 11:45:42 -03001867 case CX23885_BOARD_TEVII_S471:
Igor M. Liplianinc9b8b042009-01-17 12:23:31 -03001868 case CX23885_BOARD_DVBWORLD_2005:
Mariusz Bia?o?czykf6671902012-09-12 07:59:18 -03001869 case CX23885_BOARD_PROF_8000:
Olli Salonen82c10272014-09-29 04:44:16 -03001870 case CX23885_BOARD_DVBSKY_T980C:
nibble.max0e6c7b02014-10-23 07:01:44 -03001871 case CX23885_BOARD_DVBSKY_S950C:
Igor M. Liplianin96318d02009-01-17 12:11:20 -03001872 ts1->gen_ctrl_val = 0x5; /* Parallel */
1873 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1874 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1875 break;
Igor M. Liplianin5a23b072009-03-03 12:06:09 -03001876 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
Igor M. Liplianin78db8542011-01-25 17:04:00 -03001877 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
Stefan Ringel722c90e2012-01-07 09:20:48 -03001878 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
Igor M. Liplianin5a23b072009-03-03 12:06:09 -03001879 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1880 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1881 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1882 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1883 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1884 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1885 break;
Luis Alvese6001482013-10-01 22:11:35 -03001886 case CX23885_BOARD_TBS_6980:
1887 case CX23885_BOARD_TBS_6981:
1888 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1889 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1890 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1891 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1892 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1893 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1894 tbs_card_init(dev);
1895 break;
David Wong493b7122009-05-18 05:25:49 -03001896 case CX23885_BOARD_MYGICA_X8506:
David Wong2365b2d2009-06-17 01:38:12 -03001897 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
Mauro Carvalho Chehab0d1b5262013-08-09 08:53:27 -03001898 case CX23885_BOARD_MYGICA_X8507:
David Wong493b7122009-05-18 05:25:49 -03001899 ts1->gen_ctrl_val = 0x5; /* Parallel */
1900 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1901 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1902 break;
David T. L. Wongea5697f2009-10-26 08:54:04 -03001903 case CX23885_BOARD_MYGICA_X8558PRO:
1904 ts1->gen_ctrl_val = 0x5; /* Parallel */
1905 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1906 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1907 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1908 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1909 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1910 break;
Michael Krufky7c62f5a2012-12-15 23:34:09 -03001911 case CX23885_BOARD_HAUPPAUGE_HVR4400:
1912 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1913 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1914 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
Matthias Schwarzott36efec42014-07-22 17:12:13 -03001915 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1916 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1917 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
Michael Krufky7c62f5a2012-12-15 23:34:09 -03001918 break;
Olli Salonen29442262014-08-11 16:58:15 -03001919 case CX23885_BOARD_DVBSKY_T9580:
1920 ts1->gen_ctrl_val = 0x5; /* Parallel */
1921 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1922 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1923 ts2->gen_ctrl_val = 0x8; /* Serial bus */
1924 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1925 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1926 break;
Steven Totha6a3f142007-09-08 21:31:56 -03001927 case CX23885_BOARD_HAUPPAUGE_HVR1250:
Michael Krufky07b4a832007-12-18 01:09:11 -03001928 case CX23885_BOARD_HAUPPAUGE_HVR1500:
Steven Tothd1987d52007-12-18 01:57:06 -03001929 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
Steven Totha6a3f142007-09-08 21:31:56 -03001930 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
Steven Tothb3ea0162008-04-19 01:14:19 -03001931 case CX23885_BOARD_HAUPPAUGE_HVR1200:
Steven Totha780a312008-04-19 01:25:52 -03001932 case CX23885_BOARD_HAUPPAUGE_HVR1700:
Steven Toth66762372008-04-22 15:38:26 -03001933 case CX23885_BOARD_HAUPPAUGE_HVR1400:
Hans Verkuilcce11b02014-06-27 11:15:42 -03001934 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
Steven Toth4c56b042008-08-12 13:30:03 -03001935 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
Anca Emanuel642ca1a2013-09-13 11:28:12 -03001936 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
istvan_v@mailbox.hu0cf8af52011-07-11 10:58:35 -03001937 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
Igor M. Liplianin9bb1b7e2008-11-23 14:11:16 -03001938 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
Steven Toth2074dff2009-05-02 11:39:46 -03001939 case CX23885_BOARD_HAUPPAUGE_HVR1270:
Michael Krufkyd099bec2009-05-08 22:39:24 -03001940 case CX23885_BOARD_HAUPPAUGE_HVR1275:
Michael Krufky19bc5792009-05-08 16:05:29 -03001941 case CX23885_BOARD_HAUPPAUGE_HVR1255:
Devin Heitmueller0ac60ac2012-07-01 16:15:14 -03001942 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
Michael Krufky6b926ec2009-05-12 17:32:17 -03001943 case CX23885_BOARD_HAUPPAUGE_HVR1210:
Vladimir Geroy34e383d2009-09-18 18:55:47 -03001944 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
Michael Krufkyaee0b242009-11-11 01:52:45 -03001945 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Alexey Chernov9028f582010-12-06 17:09:53 -03001946 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
Steven Totha6a3f142007-09-08 21:31:56 -03001947 default:
1948 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1949 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1950 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1951 }
1952
Steven Tothce89cfb2008-04-19 01:36:06 -03001953 /* Certain boards support analog, or require the avcore to be
1954 * loaded, ensure this happens.
1955 */
1956 switch (dev->board) {
Andy Wallsfa647f22010-07-19 21:22:05 -03001957 case CX23885_BOARD_TEVII_S470:
Andy Wallsfa647f22010-07-19 21:22:05 -03001958 /* Currently only enabled for the integrated IR controller */
1959 if (!enable_885_ir)
1960 break;
Devin Heitmuellerd214ddc2012-07-01 16:15:13 -03001961 case CX23885_BOARD_HAUPPAUGE_HVR1250:
Steven Tothce89cfb2008-04-19 01:36:06 -03001962 case CX23885_BOARD_HAUPPAUGE_HVR1800:
Hans Verkuilcce11b02014-06-27 11:15:42 -03001963 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
Steven Tothce89cfb2008-04-19 01:36:06 -03001964 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1965 case CX23885_BOARD_HAUPPAUGE_HVR1700:
Steven Toth4c56b042008-08-12 13:30:03 -03001966 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
Anca Emanuel642ca1a2013-09-13 11:28:12 -03001967 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
istvan_v@mailbox.hu0cf8af52011-07-11 10:58:35 -03001968 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
Igor M. Liplianin9bb1b7e2008-11-23 14:11:16 -03001969 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
Igor M. Liplianin5a23b072009-03-03 12:06:09 -03001970 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
Igor M. Liplianin78db8542011-01-25 17:04:00 -03001971 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
Vladimir Geroy34e383d2009-09-18 18:55:47 -03001972 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
Devin Heitmueller0ac60ac2012-07-01 16:15:14 -03001973 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1974 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
Andy Walls9b3d8ec2011-06-08 21:24:25 -03001975 case CX23885_BOARD_HAUPPAUGE_HVR1270:
Andy Wallsc6b70532009-09-27 00:14:33 -03001976 case CX23885_BOARD_HAUPPAUGE_HVR1850:
David T.L. Wongbc1548a2009-10-21 11:09:28 -03001977 case CX23885_BOARD_MYGICA_X8506:
1978 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
Michael Krufkyaee0b242009-11-11 01:52:45 -03001979 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Kusanagi Kouichi0b32d652010-01-22 04:55:28 -03001980 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
Alexey Chernov9028f582010-12-06 17:09:53 -03001981 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
Mijhail Moreyra18d64472011-10-10 11:09:53 -03001982 case CX23885_BOARD_HAUPPAUGE_HVR1500:
Steven Toth2cb9ccd2011-10-10 11:09:55 -03001983 case CX23885_BOARD_MPX885:
Alfredo Jesús Delaiti87988752011-11-09 15:13:00 -03001984 case CX23885_BOARD_MYGICA_X8507:
Stefan Ringel722c90e2012-01-07 09:20:48 -03001985 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
Oleh Kravchenkoe8d42372012-12-08 18:20:59 -03001986 case CX23885_BOARD_AVERMEDIA_HC81R:
Luis Alvese6001482013-10-01 22:11:35 -03001987 case CX23885_BOARD_TBS_6980:
1988 case CX23885_BOARD_TBS_6981:
Olli Salonen29442262014-08-11 16:58:15 -03001989 case CX23885_BOARD_DVBSKY_T9580:
Olli Salonen82c10272014-09-29 04:44:16 -03001990 case CX23885_BOARD_DVBSKY_T980C:
nibble.max0e6c7b02014-10-23 07:01:44 -03001991 case CX23885_BOARD_DVBSKY_S950C:
Hans Verkuile6574f22009-04-01 03:57:53 -03001992 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1993 &dev->i2c_bus[2].i2c_adap,
Laurent Pinchart9a1f8b32010-09-24 10:16:44 -03001994 "cx25840", 0x88 >> 1, NULL);
Andy Wallsd6b18502010-07-18 23:26:29 -03001995 if (dev->sd_cx25840) {
1996 dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
1997 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
1998 }
Steven Tothce89cfb2008-04-19 01:36:06 -03001999 break;
2000 }
Igor M. Liplianin5a23b072009-03-03 12:06:09 -03002001
2002 /* AUX-PLL 27MHz CLK */
2003 switch (dev->board) {
2004 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2005 netup_initialize(dev);
2006 break;
Igor M. Liplianin78db8542011-01-25 17:04:00 -03002007 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
2008 int ret;
2009 const struct firmware *fw;
2010 const char *filename = "dvb-netup-altera-01.fw";
2011 char *action = "configure";
Abylay Ospanb8f0d302011-07-14 05:20:29 -03002012 static struct netup_card_info cinfo;
Igor M. Liplianin78db8542011-01-25 17:04:00 -03002013 struct altera_config netup_config = {
2014 .dev = dev,
2015 .action = action,
2016 .jtag_io = netup_jtag_io,
2017 };
2018
2019 netup_initialize(dev);
2020
Abylay Ospanb8f0d302011-07-14 05:20:29 -03002021 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
Abylay Ospan2d124212011-07-18 04:14:28 -03002022 if (netup_card_rev)
2023 cinfo.rev = netup_card_rev;
2024
Abylay Ospanb8f0d302011-07-14 05:20:29 -03002025 switch (cinfo.rev) {
2026 case 0x4:
2027 filename = "dvb-netup-altera-04.fw";
2028 break;
2029 default:
2030 filename = "dvb-netup-altera-01.fw";
2031 break;
2032 }
2033 printk(KERN_INFO "NetUP card rev=0x%x fw_filename=%s\n",
2034 cinfo.rev, filename);
2035
Igor M. Liplianin78db8542011-01-25 17:04:00 -03002036 ret = request_firmware(&fw, filename, &dev->pci->dev);
2037 if (ret != 0)
2038 printk(KERN_ERR "did not find the firmware file. (%s) "
2039 "Please see linux/Documentation/dvb/ for more details "
2040 "on firmware-problems.", filename);
2041 else
2042 altera_init(&netup_config, fw);
2043
Jesper Juhl3f84a4e2011-04-07 16:23:48 -03002044 release_firmware(fw);
Igor M. Liplianin78db8542011-01-25 17:04:00 -03002045 break;
2046 }
Igor M. Liplianin5a23b072009-03-03 12:06:09 -03002047 }
Steven Tothd19770e2007-03-11 20:44:05 -03002048}