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AnilKumar Ch571ccb22012-10-15 18:05:39 +05301/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/*
10 * AM335x Starter Kit
11 * http://www.ti.com/tool/tmdssk3358
12 */
13
14/dts-v1/;
15
Florian Vaussardeb33ef662013-06-03 16:12:22 +020016#include "am33xx.dtsi"
Laurent Pincharteb9bdef2013-07-18 00:54:24 +020017#include <dt-bindings/pwm/pwm.h>
AnilKumar Ch571ccb22012-10-15 18:05:39 +053018
19/ {
20 model = "TI AM335x EVM-SK";
21 compatible = "ti,am335x-evmsk", "ti,am33xx";
22
23 cpus {
24 cpu@0 {
25 cpu0-supply = <&vdd1_reg>;
26 };
27 };
28
29 memory {
30 device_type = "memory";
31 reg = <0x80000000 0x10000000>; /* 256 MB */
32 };
33
AnilKumar Ch571ccb22012-10-15 18:05:39 +053034 vbat: fixedregulator@0 {
35 compatible = "regulator-fixed";
36 regulator-name = "vbat";
37 regulator-min-microvolt = <5000000>;
38 regulator-max-microvolt = <5000000>;
39 regulator-boot-on;
40 };
41
42 lis3_reg: fixedregulator@1 {
43 compatible = "regulator-fixed";
44 regulator-name = "lis3_reg";
45 regulator-boot-on;
46 };
AnilKumar Ch29b0b8432012-11-06 19:18:36 +053047
Imre Kaloz90f4f012014-03-03 10:02:56 +010048 wl12xx_vmmc: fixedregulator@2 {
49 pinctrl-names = "default";
50 pinctrl-0 = <&wl12xx_gpio>;
51 compatible = "regulator-fixed";
52 regulator-name = "vwl1271";
53 regulator-min-microvolt = <1800000>;
54 regulator-max-microvolt = <1800000>;
55 gpio = <&gpio1 29 0>;
56 startup-delay-us = <70000>;
57 enable-active-high;
58 };
59
AnilKumar Ch29b0b8432012-11-06 19:18:36 +053060 leds {
Vaibhav Hiremathb8f70c32013-03-26 15:42:15 +053061 pinctrl-names = "default";
62 pinctrl-0 = <&user_leds_s0>;
63
AnilKumar Ch29b0b8432012-11-06 19:18:36 +053064 compatible = "gpio-leds";
65
66 led@1 {
67 label = "evmsk:green:usr0";
Florian Vaussarde94233c2013-06-03 16:12:23 +020068 gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
AnilKumar Ch29b0b8432012-11-06 19:18:36 +053069 default-state = "off";
70 };
71
72 led@2 {
73 label = "evmsk:green:usr1";
Florian Vaussarde94233c2013-06-03 16:12:23 +020074 gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
AnilKumar Ch29b0b8432012-11-06 19:18:36 +053075 default-state = "off";
76 };
77
78 led@3 {
79 label = "evmsk:green:mmc0";
Florian Vaussarde94233c2013-06-03 16:12:23 +020080 gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
AnilKumar Ch29b0b8432012-11-06 19:18:36 +053081 linux,default-trigger = "mmc0";
82 default-state = "off";
83 };
84
85 led@4 {
86 label = "evmsk:green:heartbeat";
Florian Vaussarde94233c2013-06-03 16:12:23 +020087 gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
AnilKumar Ch29b0b8432012-11-06 19:18:36 +053088 linux,default-trigger = "heartbeat";
89 default-state = "off";
90 };
91 };
AnilKumar Ch00834b72012-11-06 19:18:38 +053092
93 gpio_buttons: gpio_buttons@0 {
94 compatible = "gpio-keys";
95 #address-cells = <1>;
96 #size-cells = <0>;
97
98 switch@1 {
99 label = "button0";
100 linux,code = <0x100>;
Florian Vaussarde94233c2013-06-03 16:12:23 +0200101 gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
AnilKumar Ch00834b72012-11-06 19:18:38 +0530102 };
103
104 switch@2 {
105 label = "button1";
106 linux,code = <0x101>;
Florian Vaussarde94233c2013-06-03 16:12:23 +0200107 gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
AnilKumar Ch00834b72012-11-06 19:18:38 +0530108 };
109
110 switch@3 {
111 label = "button2";
112 linux,code = <0x102>;
Florian Vaussarde94233c2013-06-03 16:12:23 +0200113 gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
AnilKumar Ch00834b72012-11-06 19:18:38 +0530114 gpio-key,wakeup;
115 };
116
117 switch@4 {
118 label = "button3";
119 linux,code = <0x103>;
Florian Vaussarde94233c2013-06-03 16:12:23 +0200120 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
AnilKumar Ch00834b72012-11-06 19:18:38 +0530121 };
122 };
Philip Avinash1632fbd2013-06-06 15:52:39 +0200123
124 backlight {
125 compatible = "pwm-backlight";
Laurent Pincharteb9bdef2013-07-18 00:54:24 +0200126 pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>;
Philip Avinash1632fbd2013-06-06 15:52:39 +0200127 brightness-levels = <0 58 61 66 75 90 125 170 255>;
128 default-brightness-level = <8>;
129 };
Peter Ujfalusib4529852013-10-20 20:04:11 +0300130
131 sound {
132 compatible = "ti,da830-evm-audio";
133 ti,model = "AM335x-EVMSK";
134 ti,audio-codec = <&tlv320aic3106>;
135 ti,mcasp-controller = <&mcasp1>;
Peter Ujfalusid2c28922014-01-24 10:19:07 +0200136 ti,codec-clock-rate = <24000000>;
Peter Ujfalusib4529852013-10-20 20:04:11 +0300137 ti,audio-routing =
138 "Headphone Jack", "HPLOUT",
139 "Headphone Jack", "HPROUT";
140 };
AnilKumar Ch571ccb22012-10-15 18:05:39 +0530141};
142
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200143&am33xx_pinmux {
144 pinctrl-names = "default";
145 pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>;
146
147 user_leds_s0: user_leds_s0 {
148 pinctrl-single,pins = <
149 0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
150 0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
151 0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
152 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
153 >;
154 };
155
156 gpio_keys_s0: gpio_keys_s0 {
157 pinctrl-single,pins = <
158 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */
159 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */
160 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */
161 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
162 >;
163 };
164
165 i2c0_pins: pinmux_i2c0_pins {
166 pinctrl-single,pins = <
167 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
168 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
169 >;
170 };
171
172 uart0_pins: pinmux_uart0_pins {
173 pinctrl-single,pins = <
174 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
175 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
176 >;
177 };
178
179 clkout2_pin: pinmux_clkout2_pin {
180 pinctrl-single,pins = <
181 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
182 >;
183 };
184
185 ecap2_pins: backlight_pins {
186 pinctrl-single,pins = <
187 0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */
188 >;
189 };
190
191 cpsw_default: cpsw_default {
192 pinctrl-single,pins = <
193 /* Slave 1 */
194 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
195 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
196 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
197 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
198 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
199 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
200 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
201 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
202 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
203 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
204 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
205 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
206
207 /* Slave 2 */
208 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
209 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
210 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
211 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
212 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
213 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
214 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
215 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
216 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
217 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
218 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
219 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
220 >;
221 };
222
223 cpsw_sleep: cpsw_sleep {
224 pinctrl-single,pins = <
225 /* Slave 1 reset value */
226 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
227 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
228 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
229 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
230 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
231 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
232 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
233 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
234 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
235 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
236 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
237 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
238
239 /* Slave 2 reset value*/
240 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
241 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
242 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
243 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
244 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
245 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
246 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
247 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
248 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
249 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
250 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
251 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
252 >;
253 };
254
255 davinci_mdio_default: davinci_mdio_default {
256 pinctrl-single,pins = <
257 /* MDIO */
258 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
259 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
260 >;
261 };
262
263 davinci_mdio_sleep: davinci_mdio_sleep {
264 pinctrl-single,pins = <
265 /* MDIO reset value */
266 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
267 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
268 >;
269 };
Peter Ujfalusib4529852013-10-20 20:04:11 +0300270
Peter Ujfalusi29ea5ef2013-12-23 11:28:35 +0200271 mmc1_pins: pinmux_mmc1_pins {
272 pinctrl-single,pins = <
273 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
274 >;
275 };
276
Peter Ujfalusib4529852013-10-20 20:04:11 +0300277 mcasp1_pins: mcasp1_pins {
278 pinctrl-single,pins = <
279 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
280 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
281 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
282 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
283 >;
284 };
Imre Kaloz90f4f012014-03-03 10:02:56 +0100285
286 mmc2_pins: pinmux_mmc2_pins {
287 pinctrl-single,pins = <
288 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
289 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
290 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
291 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
292 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
293 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
294 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
295 >;
296 };
297
298 wl12xx_gpio: pinmux_wl12xx_gpio {
299 pinctrl-single,pins = <
300 0x7c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */
301 >;
302 };
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200303};
304
Javier Martinez Canillase0efaaf2013-09-20 17:42:19 +0200305&uart0 {
306 pinctrl-names = "default";
307 pinctrl-0 = <&uart0_pins>;
308
309 status = "okay";
310};
311
312&i2c0 {
313 pinctrl-names = "default";
314 pinctrl-0 = <&i2c0_pins>;
315
316 status = "okay";
317 clock-frequency = <400000>;
318
319 tps: tps@2d {
320 reg = <0x2d>;
321 };
322
323 lis331dlh: lis331dlh@18 {
324 compatible = "st,lis331dlh", "st,lis3lv02d";
325 reg = <0x18>;
326 Vdd-supply = <&lis3_reg>;
327 Vdd_IO-supply = <&lis3_reg>;
328
329 st,click-single-x;
330 st,click-single-y;
331 st,click-single-z;
332 st,click-thresh-x = <10>;
333 st,click-thresh-y = <10>;
334 st,click-thresh-z = <10>;
335 st,irq1-click;
336 st,irq2-click;
337 st,wakeup-x-lo;
338 st,wakeup-x-hi;
339 st,wakeup-y-lo;
340 st,wakeup-y-hi;
341 st,wakeup-z-lo;
342 st,wakeup-z-hi;
343 st,min-limit-x = <120>;
344 st,min-limit-y = <120>;
345 st,min-limit-z = <140>;
346 st,max-limit-x = <550>;
347 st,max-limit-y = <550>;
348 st,max-limit-z = <750>;
349 };
Peter Ujfalusib4529852013-10-20 20:04:11 +0300350
351 tlv320aic3106: tlv320aic3106@1b {
352 compatible = "ti,tlv320aic3106";
353 reg = <0x1b>;
354 status = "okay";
355
356 /* Regulators */
357 AVDD-supply = <&vaux2_reg>;
358 IOVDD-supply = <&vaux2_reg>;
359 DRVDD-supply = <&vaux2_reg>;
360 DVDD-supply = <&vbat>;
361 };
Javier Martinez Canillase0efaaf2013-09-20 17:42:19 +0200362};
363
364&usb {
365 status = "okay";
Guido Martínez0f686d22014-04-28 17:54:34 -0300366};
Javier Martinez Canillase0efaaf2013-09-20 17:42:19 +0200367
Guido Martínez0f686d22014-04-28 17:54:34 -0300368&usb_ctrl_mod {
369 status = "okay";
370};
Javier Martinez Canillase0efaaf2013-09-20 17:42:19 +0200371
Guido Martínez0f686d22014-04-28 17:54:34 -0300372&usb0_phy {
373 status = "okay";
374};
Javier Martinez Canillase0efaaf2013-09-20 17:42:19 +0200375
Guido Martínez0f686d22014-04-28 17:54:34 -0300376&usb1_phy {
377 status = "okay";
378};
Yegor Yefremoveda1a4b2014-02-28 08:19:04 +0100379
Guido Martínez0f686d22014-04-28 17:54:34 -0300380&usb0 {
381 status = "okay";
382};
Yegor Yefremoveda1a4b2014-02-28 08:19:04 +0100383
Guido Martínez0f686d22014-04-28 17:54:34 -0300384&usb1 {
385 status = "okay";
386 dr_mode = "host";
387};
Yegor Yefremovcae2a9e2014-03-10 16:26:57 +0100388
Guido Martínez0f686d22014-04-28 17:54:34 -0300389&cppi41dma {
390 status = "okay";
Javier Martinez Canillase0efaaf2013-09-20 17:42:19 +0200391};
392
393&epwmss2 {
394 status = "okay";
395
396 ecap2: ecap@48304100 {
397 status = "okay";
398 pinctrl-names = "default";
399 pinctrl-0 = <&ecap2_pins>;
400 };
401};
402
Florian Vaussardeb33ef662013-06-03 16:12:22 +0200403#include "tps65910.dtsi"
AnilKumar Ch571ccb22012-10-15 18:05:39 +0530404
405&tps {
406 vcc1-supply = <&vbat>;
407 vcc2-supply = <&vbat>;
408 vcc3-supply = <&vbat>;
409 vcc4-supply = <&vbat>;
410 vcc5-supply = <&vbat>;
411 vcc6-supply = <&vbat>;
412 vcc7-supply = <&vbat>;
413 vccio-supply = <&vbat>;
414
415 regulators {
416 vrtc_reg: regulator@0 {
417 regulator-always-on;
418 };
419
420 vio_reg: regulator@1 {
421 regulator-always-on;
422 };
423
424 vdd1_reg: regulator@2 {
425 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
426 regulator-name = "vdd_mpu";
427 regulator-min-microvolt = <912500>;
428 regulator-max-microvolt = <1312500>;
429 regulator-boot-on;
430 regulator-always-on;
431 };
432
433 vdd2_reg: regulator@3 {
434 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
435 regulator-name = "vdd_core";
436 regulator-min-microvolt = <912500>;
437 regulator-max-microvolt = <1150000>;
438 regulator-boot-on;
439 regulator-always-on;
440 };
441
442 vdd3_reg: regulator@4 {
443 regulator-always-on;
444 };
445
446 vdig1_reg: regulator@5 {
447 regulator-always-on;
448 };
449
450 vdig2_reg: regulator@6 {
451 regulator-always-on;
452 };
453
454 vpll_reg: regulator@7 {
455 regulator-always-on;
456 };
457
458 vdac_reg: regulator@8 {
459 regulator-always-on;
460 };
461
462 vaux1_reg: regulator@9 {
463 regulator-always-on;
464 };
465
466 vaux2_reg: regulator@10 {
467 regulator-always-on;
468 };
469
470 vaux33_reg: regulator@11 {
471 regulator-always-on;
472 };
473
474 vmmc_reg: regulator@12 {
Matt Porter55b44522013-09-10 14:24:39 -0500475 regulator-min-microvolt = <1800000>;
476 regulator-max-microvolt = <3300000>;
AnilKumar Ch571ccb22012-10-15 18:05:39 +0530477 regulator-always-on;
478 };
479 };
480};
Mugunthan V N94a924c2013-06-07 17:02:53 +0530481
482&mac {
483 pinctrl-names = "default", "sleep";
484 pinctrl-0 = <&cpsw_default>;
485 pinctrl-1 = <&cpsw_sleep>;
Yegor Yefremov18c49af2014-03-05 08:29:19 +0100486 dual_emac = <1>;
Mugunthan V N94a924c2013-06-07 17:02:53 +0530487};
488
489&davinci_mdio {
490 pinctrl-names = "default", "sleep";
491 pinctrl-0 = <&davinci_mdio_default>;
492 pinctrl-1 = <&davinci_mdio_sleep>;
493};
Linus Torvalds496322b2013-07-09 18:24:39 -0700494
Mugunthan V Nf6655d62013-06-03 20:10:09 +0000495&cpsw_emac0 {
496 phy_id = <&davinci_mdio>, <0>;
Mugunthan V N6d75afe2013-06-03 20:10:11 +0000497 phy-mode = "rgmii-txid";
Yegor Yefremov18c49af2014-03-05 08:29:19 +0100498 dual_emac_res_vlan = <1>;
Mugunthan V Nf6655d62013-06-03 20:10:09 +0000499};
500
501&cpsw_emac1 {
502 phy_id = <&davinci_mdio>, <1>;
Mugunthan V N6d75afe2013-06-03 20:10:11 +0000503 phy-mode = "rgmii-txid";
Yegor Yefremov18c49af2014-03-05 08:29:19 +0100504 dual_emac_res_vlan = <2>;
Mugunthan V Nf6655d62013-06-03 20:10:09 +0000505};
Matt Porter55b44522013-09-10 14:24:39 -0500506
507&mmc1 {
508 status = "okay";
509 vmmc-supply = <&vmmc_reg>;
Balaji T K0d8d40f2013-09-27 17:05:10 +0530510 bus-width = <4>;
Peter Ujfalusi29ea5ef2013-12-23 11:28:35 +0200511 pinctrl-names = "default";
512 pinctrl-0 = <&mmc1_pins>;
513 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
Matt Porter55b44522013-09-10 14:24:39 -0500514};
Mark A. Greerf8302e12013-08-23 14:12:35 -0700515
516&sham {
517 status = "okay";
518};
Mark A. Greer99919e5e2013-08-23 14:12:36 -0700519
520&aes {
521 status = "okay";
522};
Rajendra Nayak6046adb2013-10-09 15:42:01 +0530523
524&gpio0 {
525 ti,no-reset-on-init;
526};
Peter Ujfalusib4529852013-10-20 20:04:11 +0300527
Imre Kaloz90f4f012014-03-03 10:02:56 +0100528&mmc2 {
529 status = "okay";
530 vmmc-supply = <&wl12xx_vmmc>;
531 ti,non-removable;
532 bus-width = <4>;
533 cap-power-off-card;
534 pinctrl-names = "default";
535 pinctrl-0 = <&mmc2_pins>;
536};
537
Peter Ujfalusib4529852013-10-20 20:04:11 +0300538&mcasp1 {
539 pinctrl-names = "default";
540 pinctrl-0 = <&mcasp1_pins>;
541
542 status = "okay";
543
544 op-mode = <0>; /* MCASP_IIS_MODE */
545 tdm-slots = <2>;
546 /* 4 serializers */
547 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
548 0 0 1 2
549 >;
550 tx-num-evt = <1>;
551 rx-num-evt = <1>;
552};
Linus Torvalds4937e2a2013-11-15 16:43:53 -0800553
Felipe Balbi2c027b72013-11-10 23:58:31 -0800554&tscadc {
555 status = "okay";
556 tsc {
557 ti,wires = <4>;
558 ti,x-plate-resistance = <200>;
559 ti,coordinate-readouts = <5>;
560 ti,wire-config = <0x00 0x11 0x22 0x33>;
561 };
562};