Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1 | /****************************************************************************** |
| 2 | * |
| 3 | * This file is provided under a dual BSD/GPLv2 license. When using or |
| 4 | * redistributing this file, you may do so under either license. |
| 5 | * |
| 6 | * GPL LICENSE SUMMARY |
| 7 | * |
Reinette Chatre | eb7ae89 | 2008-03-11 16:17:17 -0700 | [diff] [blame] | 8 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
Ian Schram | 01ebd06 | 2007-10-25 17:15:22 +0800 | [diff] [blame] | 11 | * it under the terms of version 2 of the GNU General Public License as |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 12 | * published by the Free Software Foundation. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, but |
| 15 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 17 | * General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, |
| 22 | * USA |
| 23 | * |
| 24 | * The full GNU General Public License is included in this distribution |
| 25 | * in the file called LICENSE.GPL. |
| 26 | * |
| 27 | * Contact Information: |
Winkler, Tomas | 759ef89 | 2008-12-09 11:28:58 -0800 | [diff] [blame] | 28 | * Intel Linux Wireless <ilw@linux.intel.com> |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 29 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
| 30 | * |
| 31 | * BSD LICENSE |
| 32 | * |
Reinette Chatre | eb7ae89 | 2008-03-11 16:17:17 -0700 | [diff] [blame] | 33 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 34 | * All rights reserved. |
| 35 | * |
| 36 | * Redistribution and use in source and binary forms, with or without |
| 37 | * modification, are permitted provided that the following conditions |
| 38 | * are met: |
| 39 | * |
| 40 | * * Redistributions of source code must retain the above copyright |
| 41 | * notice, this list of conditions and the following disclaimer. |
| 42 | * * Redistributions in binary form must reproduce the above copyright |
| 43 | * notice, this list of conditions and the following disclaimer in |
| 44 | * the documentation and/or other materials provided with the |
| 45 | * distribution. |
| 46 | * * Neither the name Intel Corporation nor the names of its |
| 47 | * contributors may be used to endorse or promote products derived |
| 48 | * from this software without specific prior written permission. |
| 49 | * |
| 50 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 51 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 52 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 53 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| 54 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 55 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 56 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 57 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 58 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 59 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 60 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 61 | * |
| 62 | *****************************************************************************/ |
Ben Cahill | fcd427b | 2007-11-29 11:10:00 +0800 | [diff] [blame] | 63 | /* |
| 64 | * Please use this file (iwl-4965-hw.h) only for hardware-related definitions. |
Tomas Winkler | 5a36ba0 | 2008-04-24 11:55:37 -0700 | [diff] [blame] | 65 | * Use iwl-commands.h for uCode API definitions. |
Tomas Winkler | 3e0d4cb | 2008-04-24 11:55:38 -0700 | [diff] [blame] | 66 | * Use iwl-dev.h for driver implementation definitions. |
Ben Cahill | fcd427b | 2007-11-29 11:10:00 +0800 | [diff] [blame] | 67 | */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 68 | |
| 69 | #ifndef __iwl_4965_hw_h__ |
| 70 | #define __iwl_4965_hw_h__ |
| 71 | |
Emmanuel Grumbach | 4b52c39 | 2008-04-23 17:15:07 -0700 | [diff] [blame] | 72 | #include "iwl-fh.h" |
| 73 | |
Tomas Winkler | a96a27f | 2008-10-23 23:48:56 -0700 | [diff] [blame] | 74 | /* EEPROM */ |
Tomas Winkler | 073d3f5 | 2008-04-21 15:41:52 -0700 | [diff] [blame] | 75 | #define IWL4965_EEPROM_IMG_SIZE 1024 |
| 76 | |
Ben Cahill | 1fea8e8 | 2007-11-29 11:09:52 +0800 | [diff] [blame] | 77 | /* |
| 78 | * uCode queue management definitions ... |
| 79 | * Queue #4 is the command queue for 3945 and 4965; map it to Tx FIFO chnl 4. |
| 80 | * The first queue used for block-ack aggregation is #7 (4965 only). |
| 81 | * All block-ack aggregation queues should map to Tx DMA/FIFO channel 7. |
| 82 | */ |
Christoph Hellwig | 5d08cd1 | 2007-10-25 17:15:50 +0800 | [diff] [blame] | 83 | #define IWL_CMD_QUEUE_NUM 4 |
| 84 | #define IWL_CMD_FIFO_NUM 4 |
Ron Rindjunsky | 7f3e4bb | 2008-06-12 09:46:55 +0800 | [diff] [blame] | 85 | #define IWL49_FIRST_AMPDU_QUEUE 7 |
Christoph Hellwig | 5d08cd1 | 2007-10-25 17:15:50 +0800 | [diff] [blame] | 86 | |
Christoph Hellwig | 5d08cd1 | 2007-10-25 17:15:50 +0800 | [diff] [blame] | 87 | /* Time constants */ |
| 88 | #define SHORT_SLOT_TIME 9 |
| 89 | #define LONG_SLOT_TIME 20 |
| 90 | |
| 91 | /* RSSI to dBm */ |
| 92 | #define IWL_RSSI_OFFSET 44 |
| 93 | |
Christoph Hellwig | 5d08cd1 | 2007-10-25 17:15:50 +0800 | [diff] [blame] | 94 | |
Christoph Hellwig | 5d08cd1 | 2007-10-25 17:15:50 +0800 | [diff] [blame] | 95 | |
Tomas Winkler | 8f06189 | 2008-05-29 16:34:56 +0800 | [diff] [blame] | 96 | /* PCI registers */ |
Tomas Winkler | e7b6358 | 2008-09-03 11:26:49 +0800 | [diff] [blame] | 97 | #define PCI_CFG_RETRY_TIMEOUT 0x041 |
| 98 | #define PCI_CFG_POWER_SOURCE 0x0C8 |
| 99 | #define PCI_REG_WUM8 0x0E8 |
| 100 | #define PCI_CFG_LINK_CTRL 0x0F0 |
Tomas Winkler | 8f06189 | 2008-05-29 16:34:56 +0800 | [diff] [blame] | 101 | |
| 102 | /* PCI register values */ |
Tomas Winkler | e7b6358 | 2008-09-03 11:26:49 +0800 | [diff] [blame] | 103 | #define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01 |
| 104 | #define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02 |
| 105 | #define PCI_CFG_CMD_REG_INT_DIS_MSK 0x04 |
Christoph Hellwig | 5d08cd1 | 2007-10-25 17:15:50 +0800 | [diff] [blame] | 106 | #define PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT (0x80000000) |
| 107 | |
Christoph Hellwig | 5d08cd1 | 2007-10-25 17:15:50 +0800 | [diff] [blame] | 108 | |
Christoph Hellwig | 5d08cd1 | 2007-10-25 17:15:50 +0800 | [diff] [blame] | 109 | #define IWL_NUM_SCAN_RATES (2) |
| 110 | |
Christoph Hellwig | 5d08cd1 | 2007-10-25 17:15:50 +0800 | [diff] [blame] | 111 | #define IWL_DEFAULT_TX_RETRY 15 |
Christoph Hellwig | 5d08cd1 | 2007-10-25 17:15:50 +0800 | [diff] [blame] | 112 | |
| 113 | #define RX_QUEUE_SIZE 256 |
| 114 | #define RX_QUEUE_MASK 255 |
| 115 | #define RX_QUEUE_SIZE_LOG 8 |
| 116 | |
Christoph Hellwig | 5d08cd1 | 2007-10-25 17:15:50 +0800 | [diff] [blame] | 117 | #define TFD_TX_CMD_SLOTS 256 |
| 118 | #define TFD_CMD_SLOTS 32 |
| 119 | |
Christoph Hellwig | 5d08cd1 | 2007-10-25 17:15:50 +0800 | [diff] [blame] | 120 | /* |
| 121 | * RX related structures and functions |
| 122 | */ |
| 123 | #define RX_FREE_BUFFERS 64 |
| 124 | #define RX_LOW_WATERMARK 8 |
| 125 | |
Ben Cahill | fcd427b | 2007-11-29 11:10:00 +0800 | [diff] [blame] | 126 | /* Size of one Rx buffer in host DRAM */ |
Ron Rindjunsky | 9ee1ba4 | 2007-11-26 16:14:42 +0200 | [diff] [blame] | 127 | #define IWL_RX_BUF_SIZE_4K (4 * 1024) |
| 128 | #define IWL_RX_BUF_SIZE_8K (8 * 1024) |
Ben Cahill | fcd427b | 2007-11-29 11:10:00 +0800 | [diff] [blame] | 129 | |
| 130 | /* Sizes and addresses for instruction and data memory (SRAM) in |
| 131 | * 4965's embedded processor. Driver access is via HBUS_TARG_MEM_* regs. */ |
| 132 | #define RTC_INST_LOWER_BOUND (0x000000) |
Tomas Winkler | 12a81f6 | 2008-04-03 16:05:20 -0700 | [diff] [blame] | 133 | #define IWL49_RTC_INST_UPPER_BOUND (0x018000) |
Ben Cahill | fcd427b | 2007-11-29 11:10:00 +0800 | [diff] [blame] | 134 | |
| 135 | #define RTC_DATA_LOWER_BOUND (0x800000) |
Tomas Winkler | 12a81f6 | 2008-04-03 16:05:20 -0700 | [diff] [blame] | 136 | #define IWL49_RTC_DATA_UPPER_BOUND (0x80A000) |
Ben Cahill | fcd427b | 2007-11-29 11:10:00 +0800 | [diff] [blame] | 137 | |
Ron Rindjunsky | 099b40b | 2008-04-21 15:41:53 -0700 | [diff] [blame] | 138 | #define IWL49_RTC_INST_SIZE (IWL49_RTC_INST_UPPER_BOUND - RTC_INST_LOWER_BOUND) |
| 139 | #define IWL49_RTC_DATA_SIZE (IWL49_RTC_DATA_UPPER_BOUND - RTC_DATA_LOWER_BOUND) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 140 | |
Tomas Winkler | 12a81f6 | 2008-04-03 16:05:20 -0700 | [diff] [blame] | 141 | #define IWL_MAX_INST_SIZE IWL49_RTC_INST_SIZE |
| 142 | #define IWL_MAX_DATA_SIZE IWL49_RTC_DATA_SIZE |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 143 | |
Ben Cahill | fcd427b | 2007-11-29 11:10:00 +0800 | [diff] [blame] | 144 | /* Size of uCode instruction memory in bootstrap state machine */ |
| 145 | #define IWL_MAX_BSM_SIZE BSM_SRAM_SIZE |
| 146 | |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 147 | static inline int iwl4965_hw_valid_rtc_data_addr(u32 addr) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 148 | { |
| 149 | return (addr >= RTC_DATA_LOWER_BOUND) && |
Tomas Winkler | 12a81f6 | 2008-04-03 16:05:20 -0700 | [diff] [blame] | 150 | (addr < IWL49_RTC_DATA_UPPER_BOUND); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 151 | } |
| 152 | |
Ben Cahill | 5991b41 | 2007-11-29 11:10:01 +0800 | [diff] [blame] | 153 | /********************* START TEMPERATURE *************************************/ |
| 154 | |
Ben Cahill | 0c434c5 | 2007-11-29 11:10:02 +0800 | [diff] [blame] | 155 | /** |
Ben Cahill | 5991b41 | 2007-11-29 11:10:01 +0800 | [diff] [blame] | 156 | * 4965 temperature calculation. |
| 157 | * |
| 158 | * The driver must calculate the device temperature before calculating |
| 159 | * a txpower setting (amplifier gain is temperature dependent). The |
| 160 | * calculation uses 4 measurements, 3 of which (R1, R2, R3) are calibration |
| 161 | * values used for the life of the driver, and one of which (R4) is the |
| 162 | * real-time temperature indicator. |
| 163 | * |
| 164 | * uCode provides all 4 values to the driver via the "initialize alive" |
| 165 | * notification (see struct iwl4965_init_alive_resp). After the runtime uCode |
| 166 | * image loads, uCode updates the R4 value via statistics notifications |
| 167 | * (see STATISTICS_NOTIFICATION), which occur after each received beacon |
| 168 | * when associated, or can be requested via REPLY_STATISTICS_CMD. |
| 169 | * |
| 170 | * NOTE: uCode provides the R4 value as a 23-bit signed value. Driver |
| 171 | * must sign-extend to 32 bits before applying formula below. |
| 172 | * |
| 173 | * Formula: |
| 174 | * |
| 175 | * degrees Kelvin = ((97 * 259 * (R4 - R2) / (R3 - R1)) / 100) + 8 |
| 176 | * |
| 177 | * NOTE: The basic formula is 259 * (R4-R2) / (R3-R1). The 97/100 is |
| 178 | * an additional correction, which should be centered around 0 degrees |
| 179 | * Celsius (273 degrees Kelvin). The 8 (3 percent of 273) compensates for |
| 180 | * centering the 97/100 correction around 0 degrees K. |
| 181 | * |
| 182 | * Add 273 to Kelvin value to find degrees Celsius, for comparing current |
| 183 | * temperature with factory-measured temperatures when calculating txpower |
| 184 | * settings. |
| 185 | */ |
| 186 | #define TEMPERATURE_CALIB_KELVIN_OFFSET 8 |
| 187 | #define TEMPERATURE_CALIB_A_VAL 259 |
| 188 | |
| 189 | /* Limit range of calculated temperature to be between these Kelvin values */ |
| 190 | #define IWL_TX_POWER_TEMPERATURE_MIN (263) |
| 191 | #define IWL_TX_POWER_TEMPERATURE_MAX (410) |
| 192 | |
| 193 | #define IWL_TX_POWER_TEMPERATURE_OUT_OF_RANGE(t) \ |
| 194 | (((t) < IWL_TX_POWER_TEMPERATURE_MIN) || \ |
| 195 | ((t) > IWL_TX_POWER_TEMPERATURE_MAX)) |
| 196 | |
| 197 | /********************* END TEMPERATURE ***************************************/ |
| 198 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 199 | /********************* START TXPOWER *****************************************/ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 200 | |
Ben Cahill | 0c434c5 | 2007-11-29 11:10:02 +0800 | [diff] [blame] | 201 | /** |
| 202 | * 4965 txpower calculations rely on information from three sources: |
| 203 | * |
| 204 | * 1) EEPROM |
| 205 | * 2) "initialize" alive notification |
| 206 | * 3) statistics notifications |
| 207 | * |
| 208 | * EEPROM data consists of: |
| 209 | * |
| 210 | * 1) Regulatory information (max txpower and channel usage flags) is provided |
| 211 | * separately for each channel that can possibly supported by 4965. |
| 212 | * 40 MHz wide (.11n fat) channels are listed separately from 20 MHz |
| 213 | * (legacy) channels. |
| 214 | * |
| 215 | * See struct iwl4965_eeprom_channel for format, and struct iwl4965_eeprom |
| 216 | * for locations in EEPROM. |
| 217 | * |
| 218 | * 2) Factory txpower calibration information is provided separately for |
| 219 | * sub-bands of contiguous channels. 2.4GHz has just one sub-band, |
| 220 | * but 5 GHz has several sub-bands. |
| 221 | * |
| 222 | * In addition, per-band (2.4 and 5 Ghz) saturation txpowers are provided. |
| 223 | * |
| 224 | * See struct iwl4965_eeprom_calib_info (and the tree of structures |
| 225 | * contained within it) for format, and struct iwl4965_eeprom for |
| 226 | * locations in EEPROM. |
| 227 | * |
| 228 | * "Initialization alive" notification (see struct iwl4965_init_alive_resp) |
| 229 | * consists of: |
| 230 | * |
| 231 | * 1) Temperature calculation parameters. |
| 232 | * |
| 233 | * 2) Power supply voltage measurement. |
| 234 | * |
| 235 | * 3) Tx gain compensation to balance 2 transmitters for MIMO use. |
| 236 | * |
| 237 | * Statistics notifications deliver: |
| 238 | * |
| 239 | * 1) Current values for temperature param R4. |
| 240 | */ |
| 241 | |
| 242 | /** |
| 243 | * To calculate a txpower setting for a given desired target txpower, channel, |
| 244 | * modulation bit rate, and transmitter chain (4965 has 2 transmitters to |
| 245 | * support MIMO and transmit diversity), driver must do the following: |
| 246 | * |
| 247 | * 1) Compare desired txpower vs. (EEPROM) regulatory limit for this channel. |
| 248 | * Do not exceed regulatory limit; reduce target txpower if necessary. |
| 249 | * |
| 250 | * If setting up txpowers for MIMO rates (rate indexes 8-15, 24-31), |
| 251 | * 2 transmitters will be used simultaneously; driver must reduce the |
| 252 | * regulatory limit by 3 dB (half-power) for each transmitter, so the |
| 253 | * combined total output of the 2 transmitters is within regulatory limits. |
| 254 | * |
| 255 | * |
| 256 | * 2) Compare target txpower vs. (EEPROM) saturation txpower *reduced by |
| 257 | * backoff for this bit rate*. Do not exceed (saturation - backoff[rate]); |
| 258 | * reduce target txpower if necessary. |
| 259 | * |
| 260 | * Backoff values below are in 1/2 dB units (equivalent to steps in |
| 261 | * txpower gain tables): |
| 262 | * |
| 263 | * OFDM 6 - 36 MBit: 10 steps (5 dB) |
| 264 | * OFDM 48 MBit: 15 steps (7.5 dB) |
| 265 | * OFDM 54 MBit: 17 steps (8.5 dB) |
| 266 | * OFDM 60 MBit: 20 steps (10 dB) |
| 267 | * CCK all rates: 10 steps (5 dB) |
| 268 | * |
| 269 | * Backoff values apply to saturation txpower on a per-transmitter basis; |
| 270 | * when using MIMO (2 transmitters), each transmitter uses the same |
| 271 | * saturation level provided in EEPROM, and the same backoff values; |
| 272 | * no reduction (such as with regulatory txpower limits) is required. |
| 273 | * |
| 274 | * Saturation and Backoff values apply equally to 20 Mhz (legacy) channel |
| 275 | * widths and 40 Mhz (.11n fat) channel widths; there is no separate |
| 276 | * factory measurement for fat channels. |
| 277 | * |
| 278 | * The result of this step is the final target txpower. The rest of |
| 279 | * the steps figure out the proper settings for the device to achieve |
| 280 | * that target txpower. |
| 281 | * |
| 282 | * |
Tomas Winkler | a96a27f | 2008-10-23 23:48:56 -0700 | [diff] [blame] | 283 | * 3) Determine (EEPROM) calibration sub band for the target channel, by |
| 284 | * comparing against first and last channels in each sub band |
Ben Cahill | 0c434c5 | 2007-11-29 11:10:02 +0800 | [diff] [blame] | 285 | * (see struct iwl4965_eeprom_calib_subband_info). |
| 286 | * |
| 287 | * |
| 288 | * 4) Linearly interpolate (EEPROM) factory calibration measurement sets, |
Tomas Winkler | a96a27f | 2008-10-23 23:48:56 -0700 | [diff] [blame] | 289 | * referencing the 2 factory-measured (sample) channels within the sub band. |
Ben Cahill | 0c434c5 | 2007-11-29 11:10:02 +0800 | [diff] [blame] | 290 | * |
| 291 | * Interpolation is based on difference between target channel's frequency |
| 292 | * and the sample channels' frequencies. Since channel numbers are based |
| 293 | * on frequency (5 MHz between each channel number), this is equivalent |
| 294 | * to interpolating based on channel number differences. |
| 295 | * |
| 296 | * Note that the sample channels may or may not be the channels at the |
Tomas Winkler | a96a27f | 2008-10-23 23:48:56 -0700 | [diff] [blame] | 297 | * edges of the sub band. The target channel may be "outside" of the |
Ben Cahill | 0c434c5 | 2007-11-29 11:10:02 +0800 | [diff] [blame] | 298 | * span of the sampled channels. |
| 299 | * |
| 300 | * Driver may choose the pair (for 2 Tx chains) of measurements (see |
| 301 | * struct iwl4965_eeprom_calib_ch_info) for which the actual measured |
| 302 | * txpower comes closest to the desired txpower. Usually, though, |
| 303 | * the middle set of measurements is closest to the regulatory limits, |
| 304 | * and is therefore a good choice for all txpower calculations (this |
| 305 | * assumes that high accuracy is needed for maximizing legal txpower, |
| 306 | * while lower txpower configurations do not need as much accuracy). |
| 307 | * |
| 308 | * Driver should interpolate both members of the chosen measurement pair, |
| 309 | * i.e. for both Tx chains (radio transmitters), unless the driver knows |
| 310 | * that only one of the chains will be used (e.g. only one tx antenna |
| 311 | * connected, but this should be unusual). The rate scaling algorithm |
| 312 | * switches antennas to find best performance, so both Tx chains will |
| 313 | * be used (although only one at a time) even for non-MIMO transmissions. |
| 314 | * |
| 315 | * Driver should interpolate factory values for temperature, gain table |
| 316 | * index, and actual power. The power amplifier detector values are |
| 317 | * not used by the driver. |
| 318 | * |
| 319 | * Sanity check: If the target channel happens to be one of the sample |
| 320 | * channels, the results should agree with the sample channel's |
| 321 | * measurements! |
| 322 | * |
| 323 | * |
| 324 | * 5) Find difference between desired txpower and (interpolated) |
| 325 | * factory-measured txpower. Using (interpolated) factory gain table index |
| 326 | * (shown elsewhere) as a starting point, adjust this index lower to |
| 327 | * increase txpower, or higher to decrease txpower, until the target |
| 328 | * txpower is reached. Each step in the gain table is 1/2 dB. |
| 329 | * |
| 330 | * For example, if factory measured txpower is 16 dBm, and target txpower |
| 331 | * is 13 dBm, add 6 steps to the factory gain index to reduce txpower |
| 332 | * by 3 dB. |
| 333 | * |
| 334 | * |
| 335 | * 6) Find difference between current device temperature and (interpolated) |
| 336 | * factory-measured temperature for sub-band. Factory values are in |
| 337 | * degrees Celsius. To calculate current temperature, see comments for |
| 338 | * "4965 temperature calculation". |
| 339 | * |
| 340 | * If current temperature is higher than factory temperature, driver must |
Tomas Winkler | a96a27f | 2008-10-23 23:48:56 -0700 | [diff] [blame] | 341 | * increase gain (lower gain table index), and vice verse. |
Ben Cahill | 0c434c5 | 2007-11-29 11:10:02 +0800 | [diff] [blame] | 342 | * |
| 343 | * Temperature affects gain differently for different channels: |
| 344 | * |
| 345 | * 2.4 GHz all channels: 3.5 degrees per half-dB step |
| 346 | * 5 GHz channels 34-43: 4.5 degrees per half-dB step |
| 347 | * 5 GHz channels >= 44: 4.0 degrees per half-dB step |
| 348 | * |
| 349 | * NOTE: Temperature can increase rapidly when transmitting, especially |
| 350 | * with heavy traffic at high txpowers. Driver should update |
| 351 | * temperature calculations often under these conditions to |
| 352 | * maintain strong txpower in the face of rising temperature. |
| 353 | * |
| 354 | * |
| 355 | * 7) Find difference between current power supply voltage indicator |
| 356 | * (from "initialize alive") and factory-measured power supply voltage |
| 357 | * indicator (EEPROM). |
| 358 | * |
| 359 | * If the current voltage is higher (indicator is lower) than factory |
| 360 | * voltage, gain should be reduced (gain table index increased) by: |
| 361 | * |
| 362 | * (eeprom - current) / 7 |
| 363 | * |
| 364 | * If the current voltage is lower (indicator is higher) than factory |
| 365 | * voltage, gain should be increased (gain table index decreased) by: |
| 366 | * |
| 367 | * 2 * (current - eeprom) / 7 |
| 368 | * |
| 369 | * If number of index steps in either direction turns out to be > 2, |
| 370 | * something is wrong ... just use 0. |
| 371 | * |
| 372 | * NOTE: Voltage compensation is independent of band/channel. |
| 373 | * |
| 374 | * NOTE: "Initialize" uCode measures current voltage, which is assumed |
| 375 | * to be constant after this initial measurement. Voltage |
| 376 | * compensation for txpower (number of steps in gain table) |
| 377 | * may be calculated once and used until the next uCode bootload. |
| 378 | * |
| 379 | * |
| 380 | * 8) If setting up txpowers for MIMO rates (rate indexes 8-15, 24-31), |
| 381 | * adjust txpower for each transmitter chain, so txpower is balanced |
| 382 | * between the two chains. There are 5 pairs of tx_atten[group][chain] |
| 383 | * values in "initialize alive", one pair for each of 5 channel ranges: |
| 384 | * |
| 385 | * Group 0: 5 GHz channel 34-43 |
| 386 | * Group 1: 5 GHz channel 44-70 |
| 387 | * Group 2: 5 GHz channel 71-124 |
| 388 | * Group 3: 5 GHz channel 125-200 |
| 389 | * Group 4: 2.4 GHz all channels |
| 390 | * |
| 391 | * Add the tx_atten[group][chain] value to the index for the target chain. |
| 392 | * The values are signed, but are in pairs of 0 and a non-negative number, |
| 393 | * so as to reduce gain (if necessary) of the "hotter" channel. This |
| 394 | * avoids any need to double-check for regulatory compliance after |
| 395 | * this step. |
| 396 | * |
| 397 | * |
| 398 | * 9) If setting up for a CCK rate, lower the gain by adding a CCK compensation |
| 399 | * value to the index: |
| 400 | * |
| 401 | * Hardware rev B: 9 steps (4.5 dB) |
| 402 | * Hardware rev C: 5 steps (2.5 dB) |
| 403 | * |
| 404 | * Hardware rev for 4965 can be determined by reading CSR_HW_REV_WA_REG, |
| 405 | * bits [3:2], 1 = B, 2 = C. |
| 406 | * |
| 407 | * NOTE: This compensation is in addition to any saturation backoff that |
| 408 | * might have been applied in an earlier step. |
| 409 | * |
| 410 | * |
| 411 | * 10) Select the gain table, based on band (2.4 vs 5 GHz). |
| 412 | * |
| 413 | * Limit the adjusted index to stay within the table! |
| 414 | * |
| 415 | * |
| 416 | * 11) Read gain table entries for DSP and radio gain, place into appropriate |
| 417 | * location(s) in command (struct iwl4965_txpowertable_cmd). |
| 418 | */ |
| 419 | |
| 420 | /* Limit range of txpower output target to be between these values */ |
| 421 | #define IWL_TX_POWER_TARGET_POWER_MIN (0) /* 0 dBm = 1 milliwatt */ |
| 422 | #define IWL_TX_POWER_TARGET_POWER_MAX (16) /* 16 dBm */ |
| 423 | |
| 424 | /** |
| 425 | * When MIMO is used (2 transmitters operating simultaneously), driver should |
| 426 | * limit each transmitter to deliver a max of 3 dB below the regulatory limit |
| 427 | * for the device. That is, use half power for each transmitter, so total |
| 428 | * txpower is within regulatory limits. |
| 429 | * |
| 430 | * The value "6" represents number of steps in gain table to reduce power 3 dB. |
| 431 | * Each step is 1/2 dB. |
| 432 | */ |
| 433 | #define IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION (6) |
| 434 | |
| 435 | /** |
| 436 | * CCK gain compensation. |
| 437 | * |
| 438 | * When calculating txpowers for CCK, after making sure that the target power |
| 439 | * is within regulatory and saturation limits, driver must additionally |
| 440 | * back off gain by adding these values to the gain table index. |
| 441 | * |
| 442 | * Hardware rev for 4965 can be determined by reading CSR_HW_REV_WA_REG, |
| 443 | * bits [3:2], 1 = B, 2 = C. |
| 444 | */ |
| 445 | #define IWL_TX_POWER_CCK_COMPENSATION_B_STEP (9) |
| 446 | #define IWL_TX_POWER_CCK_COMPENSATION_C_STEP (5) |
| 447 | |
| 448 | /* |
| 449 | * 4965 power supply voltage compensation for txpower |
| 450 | */ |
| 451 | #define TX_POWER_IWL_VOLTAGE_CODES_PER_03V (7) |
| 452 | |
| 453 | /** |
| 454 | * Gain tables. |
| 455 | * |
| 456 | * The following tables contain pair of values for setting txpower, i.e. |
| 457 | * gain settings for the output of the device's digital signal processor (DSP), |
| 458 | * and for the analog gain structure of the transmitter. |
| 459 | * |
| 460 | * Each entry in the gain tables represents a step of 1/2 dB. Note that these |
| 461 | * are *relative* steps, not indications of absolute output power. Output |
| 462 | * power varies with temperature, voltage, and channel frequency, and also |
| 463 | * requires consideration of average power (to satisfy regulatory constraints), |
| 464 | * and peak power (to avoid distortion of the output signal). |
| 465 | * |
| 466 | * Each entry contains two values: |
| 467 | * 1) DSP gain (or sometimes called DSP attenuation). This is a fine-grained |
| 468 | * linear value that multiplies the output of the digital signal processor, |
| 469 | * before being sent to the analog radio. |
| 470 | * 2) Radio gain. This sets the analog gain of the radio Tx path. |
| 471 | * It is a coarser setting, and behaves in a logarithmic (dB) fashion. |
| 472 | * |
| 473 | * EEPROM contains factory calibration data for txpower. This maps actual |
| 474 | * measured txpower levels to gain settings in the "well known" tables |
| 475 | * below ("well-known" means here that both factory calibration *and* the |
| 476 | * driver work with the same table). |
| 477 | * |
| 478 | * There are separate tables for 2.4 GHz and 5 GHz bands. The 5 GHz table |
| 479 | * has an extension (into negative indexes), in case the driver needs to |
| 480 | * boost power setting for high device temperatures (higher than would be |
| 481 | * present during factory calibration). A 5 Ghz EEPROM index of "40" |
| 482 | * corresponds to the 49th entry in the table used by the driver. |
| 483 | */ |
| 484 | #define MIN_TX_GAIN_INDEX (0) /* highest gain, lowest idx, 2.4 */ |
| 485 | #define MIN_TX_GAIN_INDEX_52GHZ_EXT (-9) /* highest gain, lowest idx, 5 */ |
| 486 | |
| 487 | /** |
| 488 | * 2.4 GHz gain table |
| 489 | * |
| 490 | * Index Dsp gain Radio gain |
| 491 | * 0 110 0x3f (highest gain) |
| 492 | * 1 104 0x3f |
| 493 | * 2 98 0x3f |
| 494 | * 3 110 0x3e |
| 495 | * 4 104 0x3e |
| 496 | * 5 98 0x3e |
| 497 | * 6 110 0x3d |
| 498 | * 7 104 0x3d |
| 499 | * 8 98 0x3d |
| 500 | * 9 110 0x3c |
| 501 | * 10 104 0x3c |
| 502 | * 11 98 0x3c |
| 503 | * 12 110 0x3b |
| 504 | * 13 104 0x3b |
| 505 | * 14 98 0x3b |
| 506 | * 15 110 0x3a |
| 507 | * 16 104 0x3a |
| 508 | * 17 98 0x3a |
| 509 | * 18 110 0x39 |
| 510 | * 19 104 0x39 |
| 511 | * 20 98 0x39 |
| 512 | * 21 110 0x38 |
| 513 | * 22 104 0x38 |
| 514 | * 23 98 0x38 |
| 515 | * 24 110 0x37 |
| 516 | * 25 104 0x37 |
| 517 | * 26 98 0x37 |
| 518 | * 27 110 0x36 |
| 519 | * 28 104 0x36 |
| 520 | * 29 98 0x36 |
| 521 | * 30 110 0x35 |
| 522 | * 31 104 0x35 |
| 523 | * 32 98 0x35 |
| 524 | * 33 110 0x34 |
| 525 | * 34 104 0x34 |
| 526 | * 35 98 0x34 |
| 527 | * 36 110 0x33 |
| 528 | * 37 104 0x33 |
| 529 | * 38 98 0x33 |
| 530 | * 39 110 0x32 |
| 531 | * 40 104 0x32 |
| 532 | * 41 98 0x32 |
| 533 | * 42 110 0x31 |
| 534 | * 43 104 0x31 |
| 535 | * 44 98 0x31 |
| 536 | * 45 110 0x30 |
| 537 | * 46 104 0x30 |
| 538 | * 47 98 0x30 |
| 539 | * 48 110 0x6 |
| 540 | * 49 104 0x6 |
| 541 | * 50 98 0x6 |
| 542 | * 51 110 0x5 |
| 543 | * 52 104 0x5 |
| 544 | * 53 98 0x5 |
| 545 | * 54 110 0x4 |
| 546 | * 55 104 0x4 |
| 547 | * 56 98 0x4 |
| 548 | * 57 110 0x3 |
| 549 | * 58 104 0x3 |
| 550 | * 59 98 0x3 |
| 551 | * 60 110 0x2 |
| 552 | * 61 104 0x2 |
| 553 | * 62 98 0x2 |
| 554 | * 63 110 0x1 |
| 555 | * 64 104 0x1 |
| 556 | * 65 98 0x1 |
| 557 | * 66 110 0x0 |
| 558 | * 67 104 0x0 |
| 559 | * 68 98 0x0 |
| 560 | * 69 97 0 |
| 561 | * 70 96 0 |
| 562 | * 71 95 0 |
| 563 | * 72 94 0 |
| 564 | * 73 93 0 |
| 565 | * 74 92 0 |
| 566 | * 75 91 0 |
| 567 | * 76 90 0 |
| 568 | * 77 89 0 |
| 569 | * 78 88 0 |
| 570 | * 79 87 0 |
| 571 | * 80 86 0 |
| 572 | * 81 85 0 |
| 573 | * 82 84 0 |
| 574 | * 83 83 0 |
| 575 | * 84 82 0 |
| 576 | * 85 81 0 |
| 577 | * 86 80 0 |
| 578 | * 87 79 0 |
| 579 | * 88 78 0 |
| 580 | * 89 77 0 |
| 581 | * 90 76 0 |
| 582 | * 91 75 0 |
| 583 | * 92 74 0 |
| 584 | * 93 73 0 |
| 585 | * 94 72 0 |
| 586 | * 95 71 0 |
| 587 | * 96 70 0 |
| 588 | * 97 69 0 |
| 589 | * 98 68 0 |
| 590 | */ |
| 591 | |
| 592 | /** |
| 593 | * 5 GHz gain table |
| 594 | * |
| 595 | * Index Dsp gain Radio gain |
| 596 | * -9 123 0x3F (highest gain) |
| 597 | * -8 117 0x3F |
| 598 | * -7 110 0x3F |
| 599 | * -6 104 0x3F |
| 600 | * -5 98 0x3F |
| 601 | * -4 110 0x3E |
| 602 | * -3 104 0x3E |
| 603 | * -2 98 0x3E |
| 604 | * -1 110 0x3D |
| 605 | * 0 104 0x3D |
| 606 | * 1 98 0x3D |
| 607 | * 2 110 0x3C |
| 608 | * 3 104 0x3C |
| 609 | * 4 98 0x3C |
| 610 | * 5 110 0x3B |
| 611 | * 6 104 0x3B |
| 612 | * 7 98 0x3B |
| 613 | * 8 110 0x3A |
| 614 | * 9 104 0x3A |
| 615 | * 10 98 0x3A |
| 616 | * 11 110 0x39 |
| 617 | * 12 104 0x39 |
| 618 | * 13 98 0x39 |
| 619 | * 14 110 0x38 |
| 620 | * 15 104 0x38 |
| 621 | * 16 98 0x38 |
| 622 | * 17 110 0x37 |
| 623 | * 18 104 0x37 |
| 624 | * 19 98 0x37 |
| 625 | * 20 110 0x36 |
| 626 | * 21 104 0x36 |
| 627 | * 22 98 0x36 |
| 628 | * 23 110 0x35 |
| 629 | * 24 104 0x35 |
| 630 | * 25 98 0x35 |
| 631 | * 26 110 0x34 |
| 632 | * 27 104 0x34 |
| 633 | * 28 98 0x34 |
| 634 | * 29 110 0x33 |
| 635 | * 30 104 0x33 |
| 636 | * 31 98 0x33 |
| 637 | * 32 110 0x32 |
| 638 | * 33 104 0x32 |
| 639 | * 34 98 0x32 |
| 640 | * 35 110 0x31 |
| 641 | * 36 104 0x31 |
| 642 | * 37 98 0x31 |
| 643 | * 38 110 0x30 |
| 644 | * 39 104 0x30 |
| 645 | * 40 98 0x30 |
| 646 | * 41 110 0x25 |
| 647 | * 42 104 0x25 |
| 648 | * 43 98 0x25 |
| 649 | * 44 110 0x24 |
| 650 | * 45 104 0x24 |
| 651 | * 46 98 0x24 |
| 652 | * 47 110 0x23 |
| 653 | * 48 104 0x23 |
| 654 | * 49 98 0x23 |
| 655 | * 50 110 0x22 |
| 656 | * 51 104 0x18 |
| 657 | * 52 98 0x18 |
| 658 | * 53 110 0x17 |
| 659 | * 54 104 0x17 |
| 660 | * 55 98 0x17 |
| 661 | * 56 110 0x16 |
| 662 | * 57 104 0x16 |
| 663 | * 58 98 0x16 |
| 664 | * 59 110 0x15 |
| 665 | * 60 104 0x15 |
| 666 | * 61 98 0x15 |
| 667 | * 62 110 0x14 |
| 668 | * 63 104 0x14 |
| 669 | * 64 98 0x14 |
| 670 | * 65 110 0x13 |
| 671 | * 66 104 0x13 |
| 672 | * 67 98 0x13 |
| 673 | * 68 110 0x12 |
| 674 | * 69 104 0x08 |
| 675 | * 70 98 0x08 |
| 676 | * 71 110 0x07 |
| 677 | * 72 104 0x07 |
| 678 | * 73 98 0x07 |
| 679 | * 74 110 0x06 |
| 680 | * 75 104 0x06 |
| 681 | * 76 98 0x06 |
| 682 | * 77 110 0x05 |
| 683 | * 78 104 0x05 |
| 684 | * 79 98 0x05 |
| 685 | * 80 110 0x04 |
| 686 | * 81 104 0x04 |
| 687 | * 82 98 0x04 |
| 688 | * 83 110 0x03 |
| 689 | * 84 104 0x03 |
| 690 | * 85 98 0x03 |
| 691 | * 86 110 0x02 |
| 692 | * 87 104 0x02 |
| 693 | * 88 98 0x02 |
| 694 | * 89 110 0x01 |
| 695 | * 90 104 0x01 |
| 696 | * 91 98 0x01 |
| 697 | * 92 110 0x00 |
| 698 | * 93 104 0x00 |
| 699 | * 94 98 0x00 |
| 700 | * 95 93 0x00 |
| 701 | * 96 88 0x00 |
| 702 | * 97 83 0x00 |
| 703 | * 98 78 0x00 |
| 704 | */ |
| 705 | |
| 706 | |
| 707 | /** |
| 708 | * Sanity checks and default values for EEPROM regulatory levels. |
| 709 | * If EEPROM values fall outside MIN/MAX range, use default values. |
| 710 | * |
| 711 | * Regulatory limits refer to the maximum average txpower allowed by |
| 712 | * regulatory agencies in the geographies in which the device is meant |
| 713 | * to be operated. These limits are SKU-specific (i.e. geography-specific), |
| 714 | * and channel-specific; each channel has an individual regulatory limit |
| 715 | * listed in the EEPROM. |
| 716 | * |
| 717 | * Units are in half-dBm (i.e. "34" means 17 dBm). |
| 718 | */ |
| 719 | #define IWL_TX_POWER_DEFAULT_REGULATORY_24 (34) |
| 720 | #define IWL_TX_POWER_DEFAULT_REGULATORY_52 (34) |
| 721 | #define IWL_TX_POWER_REGULATORY_MIN (0) |
| 722 | #define IWL_TX_POWER_REGULATORY_MAX (34) |
| 723 | |
| 724 | /** |
| 725 | * Sanity checks and default values for EEPROM saturation levels. |
| 726 | * If EEPROM values fall outside MIN/MAX range, use default values. |
| 727 | * |
| 728 | * Saturation is the highest level that the output power amplifier can produce |
| 729 | * without significant clipping distortion. This is a "peak" power level. |
| 730 | * Different types of modulation (i.e. various "rates", and OFDM vs. CCK) |
| 731 | * require differing amounts of backoff, relative to their average power output, |
| 732 | * in order to avoid clipping distortion. |
| 733 | * |
| 734 | * Driver must make sure that it is violating neither the saturation limit, |
| 735 | * nor the regulatory limit, when calculating Tx power settings for various |
| 736 | * rates. |
| 737 | * |
| 738 | * Units are in half-dBm (i.e. "38" means 19 dBm). |
| 739 | */ |
| 740 | #define IWL_TX_POWER_DEFAULT_SATURATION_24 (38) |
| 741 | #define IWL_TX_POWER_DEFAULT_SATURATION_52 (38) |
| 742 | #define IWL_TX_POWER_SATURATION_MIN (20) |
| 743 | #define IWL_TX_POWER_SATURATION_MAX (50) |
| 744 | |
| 745 | /** |
| 746 | * Channel groups used for Tx Attenuation calibration (MIMO tx channel balance) |
| 747 | * and thermal Txpower calibration. |
| 748 | * |
| 749 | * When calculating txpower, driver must compensate for current device |
| 750 | * temperature; higher temperature requires higher gain. Driver must calculate |
| 751 | * current temperature (see "4965 temperature calculation"), then compare vs. |
| 752 | * factory calibration temperature in EEPROM; if current temperature is higher |
| 753 | * than factory temperature, driver must *increase* gain by proportions shown |
| 754 | * in table below. If current temperature is lower than factory, driver must |
| 755 | * *decrease* gain. |
| 756 | * |
| 757 | * Different frequency ranges require different compensation, as shown below. |
| 758 | */ |
| 759 | /* Group 0, 5.2 GHz ch 34-43: 4.5 degrees per 1/2 dB. */ |
| 760 | #define CALIB_IWL_TX_ATTEN_GR1_FCH 34 |
| 761 | #define CALIB_IWL_TX_ATTEN_GR1_LCH 43 |
| 762 | |
| 763 | /* Group 1, 5.3 GHz ch 44-70: 4.0 degrees per 1/2 dB. */ |
| 764 | #define CALIB_IWL_TX_ATTEN_GR2_FCH 44 |
| 765 | #define CALIB_IWL_TX_ATTEN_GR2_LCH 70 |
| 766 | |
| 767 | /* Group 2, 5.5 GHz ch 71-124: 4.0 degrees per 1/2 dB. */ |
| 768 | #define CALIB_IWL_TX_ATTEN_GR3_FCH 71 |
| 769 | #define CALIB_IWL_TX_ATTEN_GR3_LCH 124 |
| 770 | |
| 771 | /* Group 3, 5.7 GHz ch 125-200: 4.0 degrees per 1/2 dB. */ |
| 772 | #define CALIB_IWL_TX_ATTEN_GR4_FCH 125 |
| 773 | #define CALIB_IWL_TX_ATTEN_GR4_LCH 200 |
| 774 | |
| 775 | /* Group 4, 2.4 GHz all channels: 3.5 degrees per 1/2 dB. */ |
| 776 | #define CALIB_IWL_TX_ATTEN_GR5_FCH 1 |
| 777 | #define CALIB_IWL_TX_ATTEN_GR5_LCH 20 |
| 778 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 779 | enum { |
| 780 | CALIB_CH_GROUP_1 = 0, |
| 781 | CALIB_CH_GROUP_2 = 1, |
| 782 | CALIB_CH_GROUP_3 = 2, |
| 783 | CALIB_CH_GROUP_4 = 3, |
| 784 | CALIB_CH_GROUP_5 = 4, |
| 785 | CALIB_CH_GROUP_MAX |
| 786 | }; |
| 787 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 788 | /********************* END TXPOWER *****************************************/ |
| 789 | |
Ben Cahill | 5d5456f | 2007-11-29 11:10:06 +0800 | [diff] [blame] | 790 | |
| 791 | /** |
| 792 | * Tx/Rx Queues |
| 793 | * |
| 794 | * Most communication between driver and 4965 is via queues of data buffers. |
| 795 | * For example, all commands that the driver issues to device's embedded |
| 796 | * controller (uCode) are via the command queue (one of the Tx queues). All |
| 797 | * uCode command responses/replies/notifications, including Rx frames, are |
| 798 | * conveyed from uCode to driver via the Rx queue. |
| 799 | * |
| 800 | * Most support for these queues, including handshake support, resides in |
| 801 | * structures in host DRAM, shared between the driver and the device. When |
| 802 | * allocating this memory, the driver must make sure that data written by |
| 803 | * the host CPU updates DRAM immediately (and does not get "stuck" in CPU's |
| 804 | * cache memory), so DRAM and cache are consistent, and the device can |
| 805 | * immediately see changes made by the driver. |
| 806 | * |
| 807 | * 4965 supports up to 16 DRAM-based Tx queues, and services these queues via |
| 808 | * up to 7 DMA channels (FIFOs). Each Tx queue is supported by a circular array |
| 809 | * in DRAM containing 256 Transmit Frame Descriptors (TFDs). |
| 810 | */ |
Emmanuel Grumbach | 038669e | 2008-04-23 17:15:04 -0700 | [diff] [blame] | 811 | #define IWL49_NUM_FIFOS 7 |
| 812 | #define IWL49_CMD_FIFO_NUM 4 |
| 813 | #define IWL49_NUM_QUEUES 16 |
Tomas Winkler | 9f17b31 | 2008-07-11 11:53:35 +0800 | [diff] [blame] | 814 | #define IWL49_NUM_AMPDU_QUEUES 8 |
Ben Cahill | 5d5456f | 2007-11-29 11:10:06 +0800 | [diff] [blame] | 815 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 816 | |
Ben Cahill | 5d5456f | 2007-11-29 11:10:06 +0800 | [diff] [blame] | 817 | /** |
Tomas Winkler | 127901a | 2008-10-23 23:48:55 -0700 | [diff] [blame] | 818 | * struct iwl4965_schedq_bc_tbl |
Ben Cahill | 5d5456f | 2007-11-29 11:10:06 +0800 | [diff] [blame] | 819 | * |
| 820 | * Byte Count table |
| 821 | * |
| 822 | * Each Tx queue uses a byte-count table containing 320 entries: |
| 823 | * one 16-bit entry for each of 256 TFDs, plus an additional 64 entries that |
| 824 | * duplicate the first 64 entries (to avoid wrap-around within a Tx window; |
| 825 | * max Tx window is 64 TFDs). |
| 826 | * |
| 827 | * When driver sets up a new TFD, it must also enter the total byte count |
| 828 | * of the frame to be transmitted into the corresponding entry in the byte |
| 829 | * count table for the chosen Tx queue. If the TFD index is 0-63, the driver |
| 830 | * must duplicate the byte count entry in corresponding index 256-319. |
| 831 | * |
Tomas Winkler | 127901a | 2008-10-23 23:48:55 -0700 | [diff] [blame] | 832 | * padding puts each byte count table on a 1024-byte boundary; |
Ben Cahill | 5d5456f | 2007-11-29 11:10:06 +0800 | [diff] [blame] | 833 | * 4965 assumes tables are separated by 1024 bytes. |
| 834 | */ |
Tomas Winkler | 4ddbb7d | 2008-11-07 09:58:40 -0800 | [diff] [blame] | 835 | struct iwl4965_scd_bc_tbl { |
Tomas Winkler | 127901a | 2008-10-23 23:48:55 -0700 | [diff] [blame] | 836 | __le16 tfd_offset[TFD_QUEUE_BC_SIZE]; |
| 837 | u8 pad[1024 - (TFD_QUEUE_BC_SIZE) * sizeof(__le16)]; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 838 | } __attribute__ ((packed)); |
| 839 | |
Tomas Winkler | 4ddbb7d | 2008-11-07 09:58:40 -0800 | [diff] [blame] | 840 | #endif /* !__iwl_4965_hw_h__ */ |