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Catalin Marinas8ad68bb2005-10-31 14:25:02 +00001/*
2 * linux/arch/arm/mach-realview/realview_eb.c
3 *
4 * Copyright (C) 2004 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000022#include <linux/init.h>
Russell King1be72282005-10-31 16:57:06 +000023#include <linux/platform_device.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000024#include <linux/sysdev.h>
Russell Kinga62c80e2006-01-07 13:52:45 +000025#include <linux/amba/bus.h>
Russell Kingeb7fffa2009-07-05 22:41:31 +010026#include <linux/amba/pl061.h>
Linus Walleij6ef297f2009-09-22 14:29:36 +010027#include <linux/amba/mmci.h>
Linus Walleijd6ada862010-07-14 23:58:38 +010028#include <linux/amba/pl022.h>
Russell Kingfced80c2008-09-06 12:10:45 +010029#include <linux/io.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000030
Russell Kinga09e64f2008-08-05 16:14:15 +010031#include <mach/hardware.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000032#include <asm/irq.h>
33#include <asm/leds.h>
34#include <asm/mach-types.h>
Will Deaconf417cba2010-04-15 10:16:26 +010035#include <asm/pmu.h>
Catalin Marinascc9897d2010-06-21 15:12:40 +010036#include <asm/pgtable.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000037#include <asm/hardware/gic.h>
Catalin Marinas7770bdd2007-02-05 14:48:24 +010038#include <asm/hardware/cache-l2x0.h>
Russell Kingf32f4ce2009-05-16 12:14:21 +010039#include <asm/localtimer.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000040
41#include <asm/mach/arch.h>
42#include <asm/mach/map.h>
Catalin Marinas8cc4c542008-02-04 17:43:02 +010043#include <asm/mach/time.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000044
Russell Kinga09e64f2008-08-05 16:14:15 +010045#include <mach/board-eb.h>
46#include <mach/irqs.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000047
48#include "core.h"
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000049
50static struct map_desc realview_eb_io_desc[] __initdata = {
Russell King1ffedce2005-11-02 14:14:37 +000051 {
52 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
53 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
54 .length = SZ_4K,
55 .type = MT_DEVICE,
56 }, {
Catalin Marinas073b6ff2008-04-18 22:43:09 +010057 .virtual = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE),
58 .pfn = __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE),
Russell King1ffedce2005-11-02 14:14:37 +000059 .length = SZ_4K,
60 .type = MT_DEVICE,
61 }, {
Catalin Marinas073b6ff2008-04-18 22:43:09 +010062 .virtual = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE),
63 .pfn = __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE),
Russell King1ffedce2005-11-02 14:14:37 +000064 .length = SZ_4K,
65 .type = MT_DEVICE,
66 }, {
67 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
68 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
69 .length = SZ_4K,
70 .type = MT_DEVICE,
71 }, {
Catalin Marinas80192732008-04-18 22:43:11 +010072 .virtual = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE),
73 .pfn = __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE),
Russell King1ffedce2005-11-02 14:14:37 +000074 .length = SZ_4K,
75 .type = MT_DEVICE,
76 }, {
Catalin Marinas80192732008-04-18 22:43:11 +010077 .virtual = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE),
78 .pfn = __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE),
Russell King1ffedce2005-11-02 14:14:37 +000079 .length = SZ_4K,
80 .type = MT_DEVICE,
81 },
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000082#ifdef CONFIG_DEBUG_LL
Russell King1ffedce2005-11-02 14:14:37 +000083 {
Catalin Marinas9a386f02008-04-18 22:43:11 +010084 .virtual = IO_ADDRESS(REALVIEW_EB_UART0_BASE),
85 .pfn = __phys_to_pfn(REALVIEW_EB_UART0_BASE),
Russell King1ffedce2005-11-02 14:14:37 +000086 .length = SZ_4K,
87 .type = MT_DEVICE,
88 }
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000089#endif
90};
91
Catalin Marinas7dd19e72008-02-04 17:39:00 +010092static struct map_desc realview_eb11mp_io_desc[] __initdata = {
93 {
94 .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE),
95 .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE),
96 .length = SZ_4K,
97 .type = MT_DEVICE,
98 }, {
99 .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_DIST_BASE),
100 .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_DIST_BASE),
101 .length = SZ_4K,
102 .type = MT_DEVICE,
103 }, {
104 .virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
105 .pfn = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
106 .length = SZ_8K,
107 .type = MT_DEVICE,
108 }
109};
110
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000111static void __init realview_eb_map_io(void)
112{
113 iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
Jon Callan4c3ea372008-12-01 14:54:56 +0000114 if (core_tile_eb11mp() || core_tile_a9mp())
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100115 iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000116}
117
Russell Kingeb7fffa2009-07-05 22:41:31 +0100118static struct pl061_platform_data gpio0_plat_data = {
119 .gpio_base = 0,
120 .irq_base = -1,
121};
122
123static struct pl061_platform_data gpio1_plat_data = {
124 .gpio_base = 8,
125 .irq_base = -1,
126};
127
128static struct pl061_platform_data gpio2_plat_data = {
129 .gpio_base = 16,
130 .irq_base = -1,
131};
132
Linus Walleijd6ada862010-07-14 23:58:38 +0100133static struct pl022_ssp_controller ssp0_plat_data = {
134 .bus_id = 0,
135 .enable_dma = 0,
136 .num_chipselect = 1,
137};
138
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100139/*
140 * RealView EB AMBA devices
141 */
142
143/*
144 * These devices are connected via the core APB bridge
145 */
146#define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ }
147#define GPIO2_DMA { 0, 0 }
148#define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ }
149#define GPIO3_DMA { 0, 0 }
150
151#define AACI_IRQ { IRQ_EB_AACI, NO_IRQ }
152#define AACI_DMA { 0x80, 0x81 }
153#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
154#define MMCI0_DMA { 0x84, 0 }
155#define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ }
156#define KMI0_DMA { 0, 0 }
157#define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ }
158#define KMI1_DMA { 0, 0 }
159
160/*
161 * These devices are connected directly to the multi-layer AHB switch
162 */
Catalin Marinas393538e2008-04-18 22:43:11 +0100163#define EB_SMC_IRQ { NO_IRQ, NO_IRQ }
164#define EB_SMC_DMA { 0, 0 }
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100165#define MPMC_IRQ { NO_IRQ, NO_IRQ }
166#define MPMC_DMA { 0, 0 }
Catalin Marinas393538e2008-04-18 22:43:11 +0100167#define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ }
168#define EB_CLCD_DMA { 0, 0 }
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100169#define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ }
170#define DMAC_DMA { 0, 0 }
171
172/*
173 * These devices are connected via the core APB bridge
174 */
175#define SCTL_IRQ { NO_IRQ, NO_IRQ }
176#define SCTL_DMA { 0, 0 }
Catalin Marinas393538e2008-04-18 22:43:11 +0100177#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ }
178#define EB_WATCHDOG_DMA { 0, 0 }
179#define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ }
180#define EB_GPIO0_DMA { 0, 0 }
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100181#define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ }
182#define GPIO1_DMA { 0, 0 }
Catalin Marinas393538e2008-04-18 22:43:11 +0100183#define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ }
184#define EB_RTC_DMA { 0, 0 }
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100185
186/*
187 * These devices are connected via the DMA APB bridge
188 */
189#define SCI_IRQ { IRQ_EB_SCI, NO_IRQ }
190#define SCI_DMA { 7, 6 }
Catalin Marinas9a386f02008-04-18 22:43:11 +0100191#define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ }
192#define EB_UART0_DMA { 15, 14 }
193#define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ }
194#define EB_UART1_DMA { 13, 12 }
195#define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ }
196#define EB_UART2_DMA { 11, 10 }
197#define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ }
198#define EB_UART3_DMA { 0x86, 0x87 }
Catalin Marinas393538e2008-04-18 22:43:11 +0100199#define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ }
200#define EB_SSP_DMA { 9, 8 }
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100201
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000202/* FPGA Primecells */
Linus Walleij43215322009-09-21 12:30:32 +0100203AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
204AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
205AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
206AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
207AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000208
209/* DevChip Primecells */
Linus Walleij43215322009-09-21 12:30:32 +0100210AMBA_DEVICE(smc, "dev:smc", EB_SMC, NULL);
211AMBA_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data);
212AMBA_DEVICE(dmac, "dev:dmac", DMAC, NULL);
213AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL);
214AMBA_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL);
215AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
216AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
217AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
218AMBA_DEVICE(rtc, "dev:rtc", EB_RTC, NULL);
219AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL);
220AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
221AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
222AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
Linus Walleijd6ada862010-07-14 23:58:38 +0100223AMBA_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data);
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000224
225static struct amba_device *amba_devs[] __initdata = {
226 &dmac_device,
227 &uart0_device,
228 &uart1_device,
229 &uart2_device,
230 &uart3_device,
231 &smc_device,
232 &clcd_device,
233 &sctl_device,
234 &wdog_device,
235 &gpio0_device,
236 &gpio1_device,
237 &gpio2_device,
238 &rtc_device,
239 &sci0_device,
240 &ssp0_device,
241 &aaci_device,
242 &mmc0_device,
243 &kmi0_device,
244 &kmi1_device,
245};
246
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100247/*
248 * RealView EB platform devices
249 */
Catalin Marinasa44ddfd2008-04-18 22:43:10 +0100250static struct resource realview_eb_flash_resource = {
251 .start = REALVIEW_EB_FLASH_BASE,
252 .end = REALVIEW_EB_FLASH_BASE + REALVIEW_EB_FLASH_SIZE - 1,
253 .flags = IORESOURCE_MEM,
254};
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100255
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100256static struct resource realview_eb_eth_resources[] = {
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100257 [0] = {
Catalin Marinas393538e2008-04-18 22:43:11 +0100258 .start = REALVIEW_EB_ETH_BASE,
259 .end = REALVIEW_EB_ETH_BASE + SZ_64K - 1,
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100260 .flags = IORESOURCE_MEM,
261 },
262 [1] = {
263 .start = IRQ_EB_ETH,
264 .end = IRQ_EB_ETH,
265 .flags = IORESOURCE_IRQ,
266 },
267};
268
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100269/*
270 * Detect and register the correct Ethernet device. RealView/EB rev D
271 * platforms use the newer SMSC LAN9118 Ethernet chip
272 */
273static int eth_device_register(void)
274{
Catalin Marinas393538e2008-04-18 22:43:11 +0100275 void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K);
Catalin Marinas0a381332008-12-01 14:54:58 +0000276 const char *name = NULL;
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100277 u32 idrev;
278
279 if (!eth_addr)
280 return -ENOMEM;
281
282 idrev = readl(eth_addr + 0x50);
Catalin Marinas0a381332008-12-01 14:54:58 +0000283 if ((idrev & 0xFFFF0000) != 0x01180000)
284 /* SMSC LAN9118 not present, use LAN91C111 instead */
285 name = "smc91x";
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100286
287 iounmap(eth_addr);
Catalin Marinas0a381332008-12-01 14:54:58 +0000288 return realview_eth_register(name, realview_eb_eth_resources);
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100289}
290
Catalin Marinas7db21712009-02-12 16:00:21 +0100291static struct resource realview_eb_isp1761_resources[] = {
292 [0] = {
293 .start = REALVIEW_EB_USB_BASE,
294 .end = REALVIEW_EB_USB_BASE + SZ_128K - 1,
295 .flags = IORESOURCE_MEM,
296 },
297 [1] = {
298 .start = IRQ_EB_USB,
299 .end = IRQ_EB_USB,
300 .flags = IORESOURCE_IRQ,
301 },
302};
303
Will Deaconf417cba2010-04-15 10:16:26 +0100304static struct resource pmu_resources[] = {
305 [0] = {
306 .start = IRQ_EB11MP_PMU_CPU0,
307 .end = IRQ_EB11MP_PMU_CPU0,
308 .flags = IORESOURCE_IRQ,
309 },
310 [1] = {
311 .start = IRQ_EB11MP_PMU_CPU1,
312 .end = IRQ_EB11MP_PMU_CPU1,
313 .flags = IORESOURCE_IRQ,
314 },
315 [2] = {
316 .start = IRQ_EB11MP_PMU_CPU2,
317 .end = IRQ_EB11MP_PMU_CPU2,
318 .flags = IORESOURCE_IRQ,
319 },
320 [3] = {
321 .start = IRQ_EB11MP_PMU_CPU3,
322 .end = IRQ_EB11MP_PMU_CPU3,
323 .flags = IORESOURCE_IRQ,
324 },
325};
326
327static struct platform_device pmu_device = {
328 .name = "arm-pmu",
329 .id = ARM_PMU_DEVICE_CPU,
330 .num_resources = ARRAY_SIZE(pmu_resources),
331 .resource = pmu_resources,
332};
333
Linus Walleijd161edf2010-07-17 12:34:25 +0100334static struct resource char_lcd_resources[] = {
335 {
336 .start = REALVIEW_CHAR_LCD_BASE,
337 .end = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1),
338 .flags = IORESOURCE_MEM,
339 },
340 {
341 .start = IRQ_EB_CHARLCD,
342 .end = IRQ_EB_CHARLCD,
343 .flags = IORESOURCE_IRQ,
344 },
345};
346
347static struct platform_device char_lcd_device = {
348 .name = "arm-charlcd",
349 .id = -1,
350 .num_resources = ARRAY_SIZE(char_lcd_resources),
351 .resource = char_lcd_resources,
352};
353
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000354static void __init gic_init_irq(void)
355{
Jon Callan4c3ea372008-12-01 14:54:56 +0000356 if (core_tile_eb11mp() || core_tile_a9mp()) {
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100357 unsigned int pldctrl;
358
359 /* new irq mode */
360 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
361 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
362 pldctrl |= 0x00800000;
363 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
364 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
365
366 /* core tile GIC, primary */
Catalin Marinasc4057f52008-02-04 17:41:01 +0100367 gic_cpu_base_addr = __io_address(REALVIEW_EB11MP_GIC_CPU_BASE);
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100368 gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29);
Catalin Marinasc4057f52008-02-04 17:41:01 +0100369 gic_cpu_init(0, gic_cpu_base_addr);
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100370
Catalin Marinas41579f42008-02-04 17:47:04 +0100371#ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100372 /* board GIC, secondary */
Catalin Marinas073b6ff2008-04-18 22:43:09 +0100373 gic_dist_init(1, __io_address(REALVIEW_EB_GIC_DIST_BASE), 64);
374 gic_cpu_init(1, __io_address(REALVIEW_EB_GIC_CPU_BASE));
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100375 gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
Russell King9b1283b2005-11-07 21:01:06 +0000376#endif
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100377 } else {
378 /* board GIC, primary */
Catalin Marinas073b6ff2008-04-18 22:43:09 +0100379 gic_cpu_base_addr = __io_address(REALVIEW_EB_GIC_CPU_BASE);
380 gic_dist_init(0, __io_address(REALVIEW_EB_GIC_DIST_BASE), 29);
Catalin Marinasc4057f52008-02-04 17:41:01 +0100381 gic_cpu_init(0, gic_cpu_base_addr);
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100382 }
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000383}
384
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100385/*
386 * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
387 */
388static void realview_eb11mp_fixup(void)
389{
390 /* AMBA devices */
391 dmac_device.irq[0] = IRQ_EB11MP_DMA;
392 uart0_device.irq[0] = IRQ_EB11MP_UART0;
393 uart1_device.irq[0] = IRQ_EB11MP_UART1;
394 uart2_device.irq[0] = IRQ_EB11MP_UART2;
395 uart3_device.irq[0] = IRQ_EB11MP_UART3;
396 clcd_device.irq[0] = IRQ_EB11MP_CLCD;
397 wdog_device.irq[0] = IRQ_EB11MP_WDOG;
398 gpio0_device.irq[0] = IRQ_EB11MP_GPIO0;
399 gpio1_device.irq[0] = IRQ_EB11MP_GPIO1;
400 gpio2_device.irq[0] = IRQ_EB11MP_GPIO2;
401 rtc_device.irq[0] = IRQ_EB11MP_RTC;
402 sci0_device.irq[0] = IRQ_EB11MP_SCI;
403 ssp0_device.irq[0] = IRQ_EB11MP_SSP;
404 aaci_device.irq[0] = IRQ_EB11MP_AACI;
405 mmc0_device.irq[0] = IRQ_EB11MP_MMCI0A;
406 mmc0_device.irq[1] = IRQ_EB11MP_MMCI0B;
407 kmi0_device.irq[0] = IRQ_EB11MP_KMI0;
408 kmi1_device.irq[0] = IRQ_EB11MP_KMI1;
409
410 /* platform devices */
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100411 realview_eb_eth_resources[1].start = IRQ_EB11MP_ETH;
412 realview_eb_eth_resources[1].end = IRQ_EB11MP_ETH;
Catalin Marinas7db21712009-02-12 16:00:21 +0100413 realview_eb_isp1761_resources[1].start = IRQ_EB11MP_USB;
414 realview_eb_isp1761_resources[1].end = IRQ_EB11MP_USB;
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100415}
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100416
Catalin Marinas8cc4c542008-02-04 17:43:02 +0100417static void __init realview_eb_timer_init(void)
418{
419 unsigned int timer_irq;
420
Catalin Marinas80192732008-04-18 22:43:11 +0100421 timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE);
422 timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20;
423 timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
424 timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
425
Jon Callan4c3ea372008-12-01 14:54:56 +0000426 if (core_tile_eb11mp() || core_tile_a9mp()) {
Catalin Marinas39e823e2008-02-04 17:45:03 +0100427#ifdef CONFIG_LOCAL_TIMERS
Catalin Marinasebac6542008-12-01 14:54:57 +0000428 twd_base = __io_address(REALVIEW_EB11MP_TWD_BASE);
Catalin Marinas39e823e2008-02-04 17:45:03 +0100429#endif
Catalin Marinas8cc4c542008-02-04 17:43:02 +0100430 timer_irq = IRQ_EB11MP_TIMER0_1;
Catalin Marinas39e823e2008-02-04 17:45:03 +0100431 } else
Catalin Marinas8cc4c542008-02-04 17:43:02 +0100432 timer_irq = IRQ_EB_TIMER0_1;
433
434 realview_timer_init(timer_irq);
435}
436
437static struct sys_timer realview_eb_timer = {
438 .init = realview_eb_timer_init,
439};
440
Colin Tuckley4c9f8be2010-01-11 11:09:15 +0100441static void realview_eb_reset(char mode)
442{
443 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
444 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
445
446 /*
447 * To reset, we hit the on-board reset register
448 * in the system FPGA
449 */
450 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
451 if (core_tile_eb11mp())
452 __raw_writel(0x0008, reset_ctrl);
453}
454
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000455static void __init realview_eb_init(void)
456{
457 int i;
458
Jon Callan4c3ea372008-12-01 14:54:56 +0000459 if (core_tile_eb11mp() || core_tile_a9mp()) {
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100460 realview_eb11mp_fixup();
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100461
Catalin Marinasba927952008-04-18 22:43:17 +0100462#ifdef CONFIG_CACHE_L2X0
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100463 /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
464 * Bits: .... ...0 0111 1001 0000 .... .... .... */
465 l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
Catalin Marinasba927952008-04-18 22:43:17 +0100466#endif
Will Deaconf417cba2010-04-15 10:16:26 +0100467 platform_device_register(&pmu_device);
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100468 }
469
Catalin Marinasa44ddfd2008-04-18 22:43:10 +0100470 realview_flash_register(&realview_eb_flash_resource, 1);
Russell King6b65cd72006-12-10 21:21:32 +0100471 platform_device_register(&realview_i2c_device);
Linus Walleijd161edf2010-07-17 12:34:25 +0100472 platform_device_register(&char_lcd_device);
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100473 eth_device_register();
Catalin Marinas7db21712009-02-12 16:00:21 +0100474 realview_usb_register(realview_eb_isp1761_resources);
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000475
476 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
477 struct amba_device *d = amba_devs[i];
478 amba_device_register(d, &iomem_resource);
479 }
480
481#ifdef CONFIG_LEDS
482 leds_event = realview_leds_event;
483#endif
Colin Tuckley4c9f8be2010-01-11 11:09:15 +0100484 realview_reset = realview_eb_reset;
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000485}
486
487MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
488 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
Catalin Marinascc9897d2010-06-21 15:12:40 +0100489 .phys_io = REALVIEW_EB_UART0_BASE & SECTION_MASK,
Catalin Marinas9a386f02008-04-18 22:43:11 +0100490 .io_pg_offst = (IO_ADDRESS(REALVIEW_EB_UART0_BASE) >> 18) & 0xfffc,
Catalin Marinas70bb62f2008-12-01 14:54:55 +0000491 .boot_params = PHYS_OFFSET + 0x00000100,
Catalin Marinas5b39d152009-11-04 12:19:04 +0000492 .fixup = realview_fixup,
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000493 .map_io = realview_eb_map_io,
494 .init_irq = gic_init_irq,
Catalin Marinas8cc4c542008-02-04 17:43:02 +0100495 .timer = &realview_eb_timer,
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000496 .init_machine = realview_eb_init,
497MACHINE_END