Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * Copyright (C) 1995 Linus Torvalds |
| 3 | * Adapted from 'alpha' version by Gary Thomas |
| 4 | * Modified by Cort Dougan (cort@cs.nmt.edu) |
| 5 | * Modified for MBX using prep/chrp/pmac functions by Dan (dmalek@jlc.net) |
| 6 | * Further modified for generic 8xx and 8260 by Dan. |
| 7 | */ |
| 8 | |
| 9 | #include <linux/config.h> |
| 10 | #include <linux/sched.h> |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/mm.h> |
| 13 | #include <linux/stddef.h> |
| 14 | #include <linux/slab.h> |
| 15 | #include <linux/init.h> |
| 16 | #include <linux/initrd.h> |
| 17 | #include <linux/root_dev.h> |
| 18 | #include <linux/seq_file.h> |
| 19 | #include <linux/irq.h> |
| 20 | |
| 21 | #include <asm/mmu.h> |
| 22 | #include <asm/io.h> |
| 23 | #include <asm/pgtable.h> |
| 24 | #include <asm/mpc8260.h> |
Kumar Gala | d054b5a | 2005-07-27 11:44:06 -0700 | [diff] [blame] | 25 | #include <asm/cpm2.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | #include <asm/machdep.h> |
| 27 | #include <asm/bootinfo.h> |
| 28 | #include <asm/time.h> |
| 29 | |
| 30 | #include "cpm2_pic.h" |
| 31 | |
| 32 | unsigned char __res[sizeof(bd_t)]; |
| 33 | |
Vitaly Bordug | a6dbba7 | 2005-05-28 15:52:09 -0700 | [diff] [blame] | 34 | extern void pq2_find_bridges(void); |
| 35 | extern void pq2pci_init_irq(void); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | extern void idma_pci9_init(void); |
| 37 | |
| 38 | /* Place-holder for board-specific init */ |
| 39 | void __attribute__ ((weak)) __init |
| 40 | m82xx_board_setup(void) |
| 41 | { |
| 42 | } |
| 43 | |
| 44 | static void __init |
| 45 | m8260_setup_arch(void) |
| 46 | { |
| 47 | /* Print out Vendor and Machine info. */ |
| 48 | printk(KERN_INFO "%s %s port\n", CPUINFO_VENDOR, CPUINFO_MACHINE); |
| 49 | |
| 50 | /* Reset the Communication Processor Module. */ |
| 51 | cpm2_reset(); |
| 52 | #ifdef CONFIG_8260_PCI9 |
| 53 | /* Initialise IDMA for PCI erratum workaround */ |
| 54 | idma_pci9_init(); |
| 55 | #endif |
| 56 | #ifdef CONFIG_PCI_8260 |
Vitaly Bordug | a6dbba7 | 2005-05-28 15:52:09 -0700 | [diff] [blame] | 57 | pq2_find_bridges(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 58 | #endif |
| 59 | #ifdef CONFIG_BLK_DEV_INITRD |
| 60 | if (initrd_start) |
| 61 | ROOT_DEV = Root_RAM0; |
| 62 | #endif |
Vitaly Bordug | 1461b4e | 2005-10-28 17:46:28 -0700 | [diff] [blame] | 63 | |
| 64 | identify_ppc_sys_by_name_and_id(BOARD_CHIP_NAME, |
| 65 | in_be32(CPM_MAP_ADDR + CPM_IMMR_OFFSET)); |
| 66 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 67 | m82xx_board_setup(); |
| 68 | } |
| 69 | |
| 70 | /* The decrementer counts at the system (internal) clock frequency |
| 71 | * divided by four. |
| 72 | */ |
| 73 | static void __init |
| 74 | m8260_calibrate_decr(void) |
| 75 | { |
| 76 | bd_t *binfo = (bd_t *)__res; |
| 77 | int freq, divisor; |
| 78 | |
| 79 | freq = binfo->bi_busfreq; |
| 80 | divisor = 4; |
| 81 | tb_ticks_per_jiffy = freq / HZ / divisor; |
| 82 | tb_to_us = mulhwu_scale_factor(freq / divisor, 1000000); |
| 83 | } |
| 84 | |
| 85 | /* The 8260 has an internal 1-second timer update register that |
| 86 | * we should use for this purpose. |
| 87 | */ |
| 88 | static uint rtc_time; |
| 89 | |
| 90 | static int |
| 91 | m8260_set_rtc_time(unsigned long time) |
| 92 | { |
| 93 | rtc_time = time; |
| 94 | |
| 95 | return(0); |
| 96 | } |
| 97 | |
| 98 | static unsigned long |
| 99 | m8260_get_rtc_time(void) |
| 100 | { |
| 101 | /* Get time from the RTC. |
| 102 | */ |
| 103 | return((unsigned long)rtc_time); |
| 104 | } |
| 105 | |
| 106 | #ifndef BOOTROM_RESTART_ADDR |
| 107 | #warning "Using default BOOTROM_RESTART_ADDR!" |
| 108 | #define BOOTROM_RESTART_ADDR 0xff000104 |
| 109 | #endif |
| 110 | |
| 111 | static void |
| 112 | m8260_restart(char *cmd) |
| 113 | { |
| 114 | extern void m8260_gorom(bd_t *bi, uint addr); |
| 115 | uint startaddr; |
| 116 | |
| 117 | /* Most boot roms have a warmstart as the second instruction |
| 118 | * of the reset vector. If that doesn't work for you, change this |
| 119 | * or the reboot program to send a proper address. |
| 120 | */ |
| 121 | startaddr = BOOTROM_RESTART_ADDR; |
| 122 | if (cmd != NULL) { |
| 123 | if (!strncmp(cmd, "startaddr=", 10)) |
| 124 | startaddr = simple_strtoul(&cmd[10], NULL, 0); |
| 125 | } |
| 126 | |
| 127 | m8260_gorom((void*)__pa(__res), startaddr); |
| 128 | } |
| 129 | |
| 130 | static void |
| 131 | m8260_halt(void) |
| 132 | { |
| 133 | local_irq_disable(); |
| 134 | while (1); |
| 135 | } |
| 136 | |
| 137 | static void |
| 138 | m8260_power_off(void) |
| 139 | { |
| 140 | m8260_halt(); |
| 141 | } |
| 142 | |
| 143 | static int |
| 144 | m8260_show_cpuinfo(struct seq_file *m) |
| 145 | { |
| 146 | bd_t *bp = (bd_t *)__res; |
| 147 | |
| 148 | seq_printf(m, "vendor\t\t: %s\n" |
| 149 | "machine\t\t: %s\n" |
| 150 | "\n" |
| 151 | "mem size\t\t: 0x%08x\n" |
| 152 | "console baud\t\t: %d\n" |
| 153 | "\n" |
| 154 | "core clock\t: %u MHz\n" |
| 155 | "CPM clock\t: %u MHz\n" |
| 156 | "bus clock\t: %u MHz\n", |
| 157 | CPUINFO_VENDOR, CPUINFO_MACHINE, bp->bi_memsize, |
| 158 | bp->bi_baudrate, bp->bi_intfreq / 1000000, |
| 159 | bp->bi_cpmfreq / 1000000, bp->bi_busfreq / 1000000); |
| 160 | return 0; |
| 161 | } |
| 162 | |
| 163 | /* Initialize the internal interrupt controller. The number of |
| 164 | * interrupts supported can vary with the processor type, and the |
| 165 | * 8260 family can have up to 64. |
| 166 | * External interrupts can be either edge or level triggered, and |
| 167 | * need to be initialized by the appropriate driver. |
| 168 | */ |
| 169 | static void __init |
| 170 | m8260_init_IRQ(void) |
| 171 | { |
| 172 | cpm2_init_IRQ(); |
| 173 | |
| 174 | /* Initialize the default interrupt mapping priorities, |
| 175 | * in case the boot rom changed something on us. |
| 176 | */ |
| 177 | cpm2_immr->im_intctl.ic_siprr = 0x05309770; |
Vitaly Bordug | a6dbba7 | 2005-05-28 15:52:09 -0700 | [diff] [blame] | 178 | |
| 179 | #if defined(CONFIG_PCI) && (defined(CONFIG_ADS8272) || defined(CONFIG_PQ2FADS)) |
| 180 | /* Initialize stuff for the 82xx CPLD IC and install demux */ |
| 181 | pq2pci_init_irq(); |
| 182 | #endif |
| 183 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 184 | } |
| 185 | |
| 186 | /* |
| 187 | * Same hack as 8xx |
| 188 | */ |
| 189 | static unsigned long __init |
| 190 | m8260_find_end_of_memory(void) |
| 191 | { |
| 192 | bd_t *binfo = (bd_t *)__res; |
| 193 | |
| 194 | return binfo->bi_memsize; |
| 195 | } |
| 196 | |
| 197 | /* Map the IMMR, plus anything else we can cover |
| 198 | * in that upper space according to the memory controller |
| 199 | * chip select mapping. Grab another bunch of space |
| 200 | * below that for stuff we can't cover in the upper. |
| 201 | */ |
| 202 | static void __init |
| 203 | m8260_map_io(void) |
| 204 | { |
| 205 | uint addr; |
| 206 | |
| 207 | /* Map IMMR region to a 256MB BAT */ |
| 208 | addr = (cpm2_immr != NULL) ? (uint)cpm2_immr : CPM_MAP_ADDR; |
| 209 | io_block_mapping(addr, addr, 0x10000000, _PAGE_IO); |
| 210 | |
| 211 | /* Map I/O region to a 256MB BAT */ |
| 212 | io_block_mapping(IO_VIRT_ADDR, IO_PHYS_ADDR, 0x10000000, _PAGE_IO); |
| 213 | } |
| 214 | |
| 215 | /* Place-holder for board-specific ppc_md hooking */ |
| 216 | void __attribute__ ((weak)) __init |
| 217 | m82xx_board_init(void) |
| 218 | { |
| 219 | } |
| 220 | |
| 221 | /* Inputs: |
| 222 | * r3 - Optional pointer to a board information structure. |
| 223 | * r4 - Optional pointer to the physical starting address of the init RAM |
| 224 | * disk. |
| 225 | * r5 - Optional pointer to the physical ending address of the init RAM |
| 226 | * disk. |
| 227 | * r6 - Optional pointer to the physical starting address of any kernel |
| 228 | * command-line parameters. |
| 229 | * r7 - Optional pointer to the physical ending address of any kernel |
| 230 | * command-line parameters. |
| 231 | */ |
| 232 | void __init |
| 233 | platform_init(unsigned long r3, unsigned long r4, unsigned long r5, |
| 234 | unsigned long r6, unsigned long r7) |
| 235 | { |
| 236 | parse_bootinfo(find_bootinfo()); |
| 237 | |
| 238 | if ( r3 ) |
| 239 | memcpy( (void *)__res,(void *)(r3+KERNELBASE), sizeof(bd_t) ); |
| 240 | |
| 241 | #ifdef CONFIG_BLK_DEV_INITRD |
| 242 | /* take care of initrd if we have one */ |
| 243 | if ( r4 ) { |
| 244 | initrd_start = r4 + KERNELBASE; |
| 245 | initrd_end = r5 + KERNELBASE; |
| 246 | } |
| 247 | #endif /* CONFIG_BLK_DEV_INITRD */ |
| 248 | /* take care of cmd line */ |
| 249 | if ( r6 ) { |
| 250 | *(char *)(r7+KERNELBASE) = 0; |
| 251 | strcpy(cmd_line, (char *)(r6+KERNELBASE)); |
| 252 | } |
| 253 | |
| 254 | ppc_md.setup_arch = m8260_setup_arch; |
| 255 | ppc_md.show_cpuinfo = m8260_show_cpuinfo; |
| 256 | ppc_md.init_IRQ = m8260_init_IRQ; |
| 257 | ppc_md.get_irq = cpm2_get_irq; |
| 258 | |
| 259 | ppc_md.restart = m8260_restart; |
| 260 | ppc_md.power_off = m8260_power_off; |
| 261 | ppc_md.halt = m8260_halt; |
| 262 | |
| 263 | ppc_md.set_rtc_time = m8260_set_rtc_time; |
| 264 | ppc_md.get_rtc_time = m8260_get_rtc_time; |
| 265 | ppc_md.calibrate_decr = m8260_calibrate_decr; |
| 266 | |
| 267 | ppc_md.find_end_of_memory = m8260_find_end_of_memory; |
| 268 | ppc_md.setup_io_mappings = m8260_map_io; |
| 269 | |
| 270 | /* Call back for board-specific settings and overrides. */ |
| 271 | m82xx_board_init(); |
| 272 | } |