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Steffen Trumtrara4f3ac42013-12-18 15:10:26 +01001/*
2 * Copyright 2012 Steffen Trumtrar, Pengutronix
3 *
4 * based on imx27.dtsi
5 *
6 * This program is free software; you can redistribute it and/or modify it under
7 * the terms of the GNU General Public License version 2 as published by the
8 * Free Software Foundation.
9 */
10
11#include "skeleton.dtsi"
12#include "imx35-pinfunc.h"
13
14/ {
15 aliases {
Marek Vasut22970072014-02-28 12:58:41 +010016 ethernet0 = &fec;
Steffen Trumtrara4f3ac42013-12-18 15:10:26 +010017 gpio0 = &gpio1;
18 gpio1 = &gpio2;
19 gpio2 = &gpio3;
20 serial0 = &uart1;
21 serial1 = &uart2;
22 serial2 = &uart3;
23 spi0 = &spi1;
24 spi1 = &spi2;
25 };
26
27 cpus {
28 #address-cells = <0>;
29 #size-cells = <0>;
30
31 cpu {
32 compatible = "arm,arm1136";
33 device_type = "cpu";
34 };
35 };
36
37 avic: avic-interrupt-controller@68000000 {
38 compatible = "fsl,imx35-avic", "fsl,avic";
39 interrupt-controller;
40 #interrupt-cells = <1>;
41 reg = <0x68000000 0x10000000>;
42 };
43
44 soc {
45 #address-cells = <1>;
46 #size-cells = <1>;
47 compatible = "simple-bus";
48 interrupt-parent = <&avic>;
49 ranges;
50
51 L2: l2-cache@30000000 {
52 compatible = "arm,l210-cache";
53 reg = <0x30000000 0x1000>;
54 cache-unified;
55 cache-level = <2>;
56 };
57
58 aips1: aips@43f00000 {
59 compatible = "fsl,aips", "simple-bus";
60 #address-cells = <1>;
61 #size-cells = <1>;
62 reg = <0x43f00000 0x100000>;
63 ranges;
64
65 i2c1: i2c@43f80000 {
66 #address-cells = <1>;
67 #size-cells = <0>;
68 compatible = "fsl,imx35-i2c", "fsl,imx1-i2c";
69 reg = <0x43f80000 0x4000>;
70 clocks = <&clks 51>;
71 clock-names = "ipg_per";
72 interrupts = <10>;
73 status = "disabled";
74 };
75
76 i2c3: i2c@43f84000 {
77 #address-cells = <1>;
78 #size-cells = <0>;
79 compatible = "fsl,imx35-i2c", "fsl,imx1-i2c";
80 reg = <0x43f84000 0x4000>;
81 clocks = <&clks 53>;
82 clock-names = "ipg_per";
83 interrupts = <3>;
84 status = "disabled";
85 };
86
87 uart1: serial@43f90000 {
88 compatible = "fsl,imx35-uart", "fsl,imx21-uart";
89 reg = <0x43f90000 0x4000>;
90 clocks = <&clks 9>, <&clks 70>;
91 clock-names = "ipg", "per";
92 interrupts = <45>;
93 status = "disabled";
94 };
95
96 uart2: serial@43f94000 {
97 compatible = "fsl,imx35-uart", "fsl,imx21-uart";
98 reg = <0x43f94000 0x4000>;
99 clocks = <&clks 9>, <&clks 71>;
100 clock-names = "ipg", "per";
101 interrupts = <32>;
102 status = "disabled";
103 };
104
105 i2c2: i2c@43f98000 {
106 #address-cells = <1>;
107 #size-cells = <0>;
108 compatible = "fsl,imx35-i2c", "fsl,imx1-i2c";
109 reg = <0x43f98000 0x4000>;
110 clocks = <&clks 52>;
111 clock-names = "ipg_per";
112 interrupts = <4>;
113 status = "disabled";
114 };
115
116 ssi1: ssi@43fa0000 {
117 compatible = "fsl,imx35-ssi", "fsl,imx21-ssi";
118 reg = <0x43fa0000 0x4000>;
119 interrupts = <11>;
120 clocks = <&clks 68>;
121 dmas = <&sdma 28 0 0>,
122 <&sdma 29 0 0>;
123 dma-names = "rx", "tx";
124 fsl,fifo-depth = <15>;
125 status = "disabled";
126 };
127
128 spi1: cspi@43fa4000 {
129 #address-cells = <1>;
130 #size-cells = <0>;
131 compatible = "fsl,imx35-cspi";
132 reg = <0x43fa4000 0x4000>;
133 clocks = <&clks 35 &clks 35>;
134 clock-names = "ipg", "per";
135 interrupts = <14>;
136 status = "disabled";
137 };
138
139 iomuxc: iomuxc@43fac000 {
140 compatible = "fsl,imx35-iomuxc";
141 reg = <0x43fac000 0x4000>;
142 };
143 };
144
145 spba: spba-bus@50000000 {
146 compatible = "fsl,spba-bus", "simple-bus";
147 #address-cells = <1>;
148 #size-cells = <1>;
149 reg = <0x50000000 0x100000>;
150 ranges;
151
152 uart3: serial@5000c000 {
153 compatible = "fsl,imx35-uart", "fsl,imx21-uart";
154 reg = <0x5000c000 0x4000>;
155 clocks = <&clks 9>, <&clks 72>;
156 clock-names = "ipg", "per";
157 interrupts = <18>;
158 status = "disabled";
159 };
160
161 spi2: cspi@50010000 {
162 #address-cells = <1>;
163 #size-cells = <0>;
164 compatible = "fsl,imx35-cspi";
165 reg = <0x50010000 0x4000>;
166 interrupts = <13>;
167 clocks = <&clks 36 &clks 36>;
168 clock-names = "ipg", "per";
169 status = "disabled";
170 };
171
172 fec: fec@50038000 {
173 compatible = "fsl,imx35-fec", "fsl,imx27-fec";
174 reg = <0x50038000 0x4000>;
175 clocks = <&clks 46>, <&clks 8>;
176 clock-names = "ipg", "ahb";
177 interrupts = <57>;
178 status = "disabled";
179 };
180 };
181
182 aips2: aips@53f00000 {
183 compatible = "fsl,aips", "simple-bus";
184 #address-cells = <1>;
185 #size-cells = <1>;
186 reg = <0x53f00000 0x100000>;
187 ranges;
188
189 clks: ccm@53f80000 {
190 compatible = "fsl,imx35-ccm";
191 reg = <0x53f80000 0x4000>;
192 interrupts = <31>;
193 #clock-cells = <1>;
194 };
195
196 gpio3: gpio@53fa4000 {
197 compatible = "fsl,imx35-gpio", "fsl,imx31-gpio";
198 reg = <0x53fa4000 0x4000>;
199 interrupts = <56>;
200 gpio-controller;
201 #gpio-cells = <2>;
202 interrupt-controller;
203 #interrupt-cells = <2>;
204 };
205
206 esdhc1: esdhc@53fb4000 {
207 compatible = "fsl,imx35-esdhc";
208 reg = <0x53fb4000 0x4000>;
209 interrupts = <7>;
210 clocks = <&clks 9>, <&clks 8>, <&clks 43>;
211 clock-names = "ipg", "ahb", "per";
212 status = "disabled";
213 };
214
215 esdhc2: esdhc@53fb8000 {
216 compatible = "fsl,imx35-esdhc";
217 reg = <0x53fb8000 0x4000>;
218 interrupts = <8>;
219 clocks = <&clks 9>, <&clks 8>, <&clks 44>;
220 clock-names = "ipg", "ahb", "per";
221 status = "disabled";
222 };
223
224 esdhc3: esdhc@53fbc000 {
225 compatible = "fsl,imx35-esdhc";
226 reg = <0x53fbc000 0x4000>;
227 interrupts = <9>;
228 clocks = <&clks 9>, <&clks 8>, <&clks 45>;
229 clock-names = "ipg", "ahb", "per";
230 status = "disabled";
231 };
232
233 audmux: audmux@53fc4000 {
234 compatible = "fsl,imx35-audmux", "fsl,imx31-audmux";
235 reg = <0x53fc4000 0x4000>;
236 status = "disabled";
237 };
238
239 gpio1: gpio@53fcc000 {
240 compatible = "fsl,imx35-gpio", "fsl,imx31-gpio";
241 reg = <0x53fcc000 0x4000>;
242 interrupts = <52>;
243 gpio-controller;
244 #gpio-cells = <2>;
245 interrupt-controller;
246 #interrupt-cells = <2>;
247 };
248
249 gpio2: gpio@53fd0000 {
250 compatible = "fsl,imx35-gpio", "fsl,imx31-gpio";
251 reg = <0x53fd0000 0x4000>;
252 interrupts = <51>;
253 gpio-controller;
254 #gpio-cells = <2>;
255 interrupt-controller;
256 #interrupt-cells = <2>;
257 };
258
259 sdma: sdma@53fd4000 {
260 compatible = "fsl,imx35-sdma";
261 reg = <0x53fd4000 0x4000>;
262 clocks = <&clks 9>, <&clks 65>;
263 clock-names = "ipg", "ahb";
264 #dma-cells = <3>;
265 interrupts = <34>;
266 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx35.bin";
267 };
268
269 wdog: wdog@53fdc000 {
270 compatible = "fsl,imx35-wdt", "fsl,imx21-wdt";
271 reg = <0x53fdc000 0x4000>;
272 clocks = <&clks 74>;
273 clock-names = "";
274 interrupts = <55>;
275 };
276
277 can1: can@53fe4000 {
278 compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
279 reg = <0x53fe4000 0x1000>;
280 clocks = <&clks 33>;
281 clock-names = "ipg";
282 interrupts = <43>;
283 status = "disabled";
284 };
285
286 can2: can@53fe8000 {
287 compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
288 reg = <0x53fe8000 0x1000>;
289 clocks = <&clks 34>;
290 clock-names = "ipg";
291 interrupts = <44>;
292 status = "disabled";
293 };
294
295 usbotg: usb@53ff4000 {
296 compatible = "fsl,imx35-usb", "fsl,imx27-usb";
297 reg = <0x53ff4000 0x0200>;
298 interrupts = <37>;
299 clocks = <&clks 9>, <&clks 73>, <&clks 28>;
300 clock-names = "ipg", "ahb", "per";
301 fsl,usbmisc = <&usbmisc 0>;
302 status = "disabled";
303 };
304
305 usbhost1: usb@53ff4400 {
306 compatible = "fsl,imx35-usb", "fsl,imx27-usb";
307 reg = <0x53ff4400 0x0200>;
308 interrupts = <35>;
309 clocks = <&clks 9>, <&clks 73>, <&clks 28>;
310 clock-names = "ipg", "ahb", "per";
311 fsl,usbmisc = <&usbmisc 1>;
312 status = "disabled";
313 };
314
315 usbmisc: usbmisc@53ff4600 {
316 #index-cells = <1>;
317 compatible = "fsl,imx35-usbmisc";
318 clocks = <&clks 9>, <&clks 73>, <&clks 28>;
319 clock-names = "ipg", "ahb", "per";
320 reg = <0x53ff4600 0x00f>;
321 };
322 };
323
324 emi@80000000 { /* External Memory Interface */
325 compatible = "fsl,emi", "simple-bus";
326 #address-cells = <1>;
327 #size-cells = <1>;
328 reg = <0x80000000 0x40000000>;
329 ranges;
330
331 nfc: nand@bb000000 {
332 #address-cells = <1>;
333 #size-cells = <1>;
334 compatible = "fsl,imx35-nand", "fsl,imx25-nand";
335 reg = <0xbb000000 0x2000>;
336 clocks = <&clks 29>;
337 clock-names = "";
338 interrupts = <33>;
339 status = "disabled";
340 };
341
342 weim: weim@b8002000 {
343 #address-cells = <2>;
344 #size-cells = <1>;
345 clocks = <&clks 0>;
346 compatible = "fsl,imx35-weim", "fsl,imx27-weim";
347 reg = <0xb8002000 0x1000>;
348 ranges = <
349 0 0 0xa0000000 0x8000000
350 1 0 0xa8000000 0x8000000
351 2 0 0xb0000000 0x2000000
352 3 0 0xb2000000 0x2000000
353 4 0 0xb4000000 0x2000000
354 5 0 0xb6000000 0x2000000
355 >;
356 status = "disabled";
357 };
358 };
359 };
360};