Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | * |
| 6 | * Synthesize TLB refill handlers at runtime. |
| 7 | * |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 8 | * Copyright (C) 2004, 2005, 2006, 2008 Thiemo Seufer |
Maciej W. Rozycki | 619b6e1 | 2007-10-23 12:43:25 +0100 | [diff] [blame] | 9 | * Copyright (C) 2005, 2007 Maciej W. Rozycki |
Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 10 | * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org) |
| 11 | * |
| 12 | * ... and the days got worse and worse and now you see |
| 13 | * I've gone completly out of my mind. |
| 14 | * |
| 15 | * They're coming to take me a away haha |
| 16 | * they're coming to take me a away hoho hihi haha |
| 17 | * to the funny farm where code is beautiful all the time ... |
| 18 | * |
| 19 | * (Condolences to Napoleon XIV) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | */ |
| 21 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | #include <linux/kernel.h> |
| 23 | #include <linux/types.h> |
| 24 | #include <linux/string.h> |
| 25 | #include <linux/init.h> |
| 26 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | #include <asm/mmu_context.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | #include <asm/war.h> |
| 29 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 30 | #include "uasm.h" |
| 31 | |
Ralf Baechle | aeffdbb | 2007-10-11 23:46:14 +0100 | [diff] [blame] | 32 | static inline int r45k_bvahwbug(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | { |
| 34 | /* XXX: We should probe for the presence of this bug, but we don't. */ |
| 35 | return 0; |
| 36 | } |
| 37 | |
Ralf Baechle | aeffdbb | 2007-10-11 23:46:14 +0100 | [diff] [blame] | 38 | static inline int r4k_250MHZhwbug(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 39 | { |
| 40 | /* XXX: We should probe for the presence of this bug, but we don't. */ |
| 41 | return 0; |
| 42 | } |
| 43 | |
Ralf Baechle | aeffdbb | 2007-10-11 23:46:14 +0100 | [diff] [blame] | 44 | static inline int __maybe_unused bcm1250_m3_war(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | { |
| 46 | return BCM1250_M3_WAR; |
| 47 | } |
| 48 | |
Ralf Baechle | aeffdbb | 2007-10-11 23:46:14 +0100 | [diff] [blame] | 49 | static inline int __maybe_unused r10000_llsc_war(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 50 | { |
| 51 | return R10000_LLSC_WAR; |
| 52 | } |
| 53 | |
| 54 | /* |
Maciej W. Rozycki | 8df5bea | 2006-08-23 14:26:50 +0100 | [diff] [blame] | 55 | * Found by experiment: At least some revisions of the 4kc throw under |
| 56 | * some circumstances a machine check exception, triggered by invalid |
| 57 | * values in the index register. Delaying the tlbp instruction until |
| 58 | * after the next branch, plus adding an additional nop in front of |
| 59 | * tlbwi/tlbwr avoids the invalid index register values. Nobody knows |
| 60 | * why; it's not an issue caused by the core RTL. |
| 61 | * |
| 62 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 63 | static int __cpuinit m4kc_tlbp_war(void) |
Maciej W. Rozycki | 8df5bea | 2006-08-23 14:26:50 +0100 | [diff] [blame] | 64 | { |
| 65 | return (current_cpu_data.processor_id & 0xffff00) == |
| 66 | (PRID_COMP_MIPS | PRID_IMP_4KC); |
| 67 | } |
| 68 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 69 | /* Handle labels (which must be positive integers). */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 70 | enum label_id { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 71 | label_second_part = 1, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 72 | label_leave, |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 73 | #ifdef MODULE_START |
| 74 | label_module_alloc, |
| 75 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 76 | label_vmalloc, |
| 77 | label_vmalloc_done, |
| 78 | label_tlbw_hazard, |
| 79 | label_split, |
| 80 | label_nopage_tlbl, |
| 81 | label_nopage_tlbs, |
| 82 | label_nopage_tlbm, |
| 83 | label_smp_pgtable_change, |
| 84 | label_r3000_write_probe_fail, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 85 | }; |
| 86 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 87 | UASM_L_LA(_second_part) |
| 88 | UASM_L_LA(_leave) |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 89 | #ifdef MODULE_START |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 90 | UASM_L_LA(_module_alloc) |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 91 | #endif |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 92 | UASM_L_LA(_vmalloc) |
| 93 | UASM_L_LA(_vmalloc_done) |
| 94 | UASM_L_LA(_tlbw_hazard) |
| 95 | UASM_L_LA(_split) |
| 96 | UASM_L_LA(_nopage_tlbl) |
| 97 | UASM_L_LA(_nopage_tlbs) |
| 98 | UASM_L_LA(_nopage_tlbm) |
| 99 | UASM_L_LA(_smp_pgtable_change) |
| 100 | UASM_L_LA(_r3000_write_probe_fail) |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 101 | |
Franck Bui-Huu | 92b1e6a | 2007-10-18 09:11:17 +0200 | [diff] [blame] | 102 | /* |
| 103 | * For debug purposes. |
| 104 | */ |
| 105 | static inline void dump_handler(const u32 *handler, int count) |
| 106 | { |
| 107 | int i; |
| 108 | |
| 109 | pr_debug("\t.set push\n"); |
| 110 | pr_debug("\t.set noreorder\n"); |
| 111 | |
| 112 | for (i = 0; i < count; i++) |
| 113 | pr_debug("\t%p\t.word 0x%08x\n", &handler[i], handler[i]); |
| 114 | |
| 115 | pr_debug("\t.set pop\n"); |
| 116 | } |
| 117 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 118 | /* The only general purpose registers allowed in TLB handlers. */ |
| 119 | #define K0 26 |
| 120 | #define K1 27 |
| 121 | |
| 122 | /* Some CP0 registers */ |
Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 123 | #define C0_INDEX 0, 0 |
| 124 | #define C0_ENTRYLO0 2, 0 |
| 125 | #define C0_TCBIND 2, 2 |
| 126 | #define C0_ENTRYLO1 3, 0 |
| 127 | #define C0_CONTEXT 4, 0 |
| 128 | #define C0_BADVADDR 8, 0 |
| 129 | #define C0_ENTRYHI 10, 0 |
| 130 | #define C0_EPC 14, 0 |
| 131 | #define C0_XCONTEXT 20, 0 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 132 | |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 133 | #ifdef CONFIG_64BIT |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 134 | # define GET_CONTEXT(buf, reg) UASM_i_MFC0(buf, reg, C0_XCONTEXT) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 135 | #else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 136 | # define GET_CONTEXT(buf, reg) UASM_i_MFC0(buf, reg, C0_CONTEXT) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 137 | #endif |
| 138 | |
| 139 | /* The worst case length of the handler is around 18 instructions for |
| 140 | * R3000-style TLBs and up to 63 instructions for R4000-style TLBs. |
| 141 | * Maximum space available is 32 instructions for R3000 and 64 |
| 142 | * instructions for R4000. |
| 143 | * |
| 144 | * We deliberately chose a buffer size of 128, so we won't scribble |
| 145 | * over anything important on overflow before we panic. |
| 146 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 147 | static u32 tlb_handler[128] __cpuinitdata; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 148 | |
| 149 | /* simply assume worst case size for labels and relocs */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 150 | static struct uasm_label labels[128] __cpuinitdata; |
| 151 | static struct uasm_reloc relocs[128] __cpuinitdata; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 152 | |
| 153 | /* |
| 154 | * The R3000 TLB handler is simple. |
| 155 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 156 | static void __cpuinit build_r3000_tlb_refill_handler(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 157 | { |
| 158 | long pgdc = (long)pgd_current; |
| 159 | u32 *p; |
| 160 | |
| 161 | memset(tlb_handler, 0, sizeof(tlb_handler)); |
| 162 | p = tlb_handler; |
| 163 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 164 | uasm_i_mfc0(&p, K0, C0_BADVADDR); |
| 165 | uasm_i_lui(&p, K1, uasm_rel_hi(pgdc)); /* cp0 delay */ |
| 166 | uasm_i_lw(&p, K1, uasm_rel_lo(pgdc), K1); |
| 167 | uasm_i_srl(&p, K0, K0, 22); /* load delay */ |
| 168 | uasm_i_sll(&p, K0, K0, 2); |
| 169 | uasm_i_addu(&p, K1, K1, K0); |
| 170 | uasm_i_mfc0(&p, K0, C0_CONTEXT); |
| 171 | uasm_i_lw(&p, K1, 0, K1); /* cp0 delay */ |
| 172 | uasm_i_andi(&p, K0, K0, 0xffc); /* load delay */ |
| 173 | uasm_i_addu(&p, K1, K1, K0); |
| 174 | uasm_i_lw(&p, K0, 0, K1); |
| 175 | uasm_i_nop(&p); /* load delay */ |
| 176 | uasm_i_mtc0(&p, K0, C0_ENTRYLO0); |
| 177 | uasm_i_mfc0(&p, K1, C0_EPC); /* cp0 delay */ |
| 178 | uasm_i_tlbwr(&p); /* cp0 delay */ |
| 179 | uasm_i_jr(&p, K1); |
| 180 | uasm_i_rfe(&p); /* branch delay */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 181 | |
| 182 | if (p > tlb_handler + 32) |
| 183 | panic("TLB refill handler space exceeded"); |
| 184 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 185 | pr_debug("Wrote TLB refill handler (%u instructions).\n", |
| 186 | (unsigned int)(p - tlb_handler)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 187 | |
Ralf Baechle | 91b05e6 | 2006-03-29 18:53:00 +0100 | [diff] [blame] | 188 | memcpy((void *)ebase, tlb_handler, 0x80); |
Franck Bui-Huu | 92b1e6a | 2007-10-18 09:11:17 +0200 | [diff] [blame] | 189 | |
| 190 | dump_handler((u32 *)ebase, 32); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 191 | } |
| 192 | |
| 193 | /* |
| 194 | * The R4000 TLB handler is much more complicated. We have two |
| 195 | * consecutive handler areas with 32 instructions space each. |
| 196 | * Since they aren't used at the same time, we can overflow in the |
| 197 | * other one.To keep things simple, we first assume linear space, |
| 198 | * then we relocate it to the final handler layout as needed. |
| 199 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 200 | static u32 final_handler[64] __cpuinitdata; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 201 | |
| 202 | /* |
| 203 | * Hazards |
| 204 | * |
| 205 | * From the IDT errata for the QED RM5230 (Nevada), processor revision 1.0: |
| 206 | * 2. A timing hazard exists for the TLBP instruction. |
| 207 | * |
| 208 | * stalling_instruction |
| 209 | * TLBP |
| 210 | * |
| 211 | * The JTLB is being read for the TLBP throughout the stall generated by the |
| 212 | * previous instruction. This is not really correct as the stalling instruction |
| 213 | * can modify the address used to access the JTLB. The failure symptom is that |
| 214 | * the TLBP instruction will use an address created for the stalling instruction |
| 215 | * and not the address held in C0_ENHI and thus report the wrong results. |
| 216 | * |
| 217 | * The software work-around is to not allow the instruction preceding the TLBP |
| 218 | * to stall - make it an NOP or some other instruction guaranteed not to stall. |
| 219 | * |
| 220 | * Errata 2 will not be fixed. This errata is also on the R5000. |
| 221 | * |
| 222 | * As if we MIPS hackers wouldn't know how to nop pipelines happy ... |
| 223 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 224 | static void __cpuinit __maybe_unused build_tlb_probe_entry(u32 **p) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 225 | { |
Ralf Baechle | 10cc352 | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 226 | switch (current_cpu_type()) { |
Thiemo Seufer | f5b4d95 | 2005-09-09 17:11:50 +0000 | [diff] [blame] | 227 | /* Found by experiment: R4600 v2.0 needs this, too. */ |
| 228 | case CPU_R4600: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 229 | case CPU_R5000: |
| 230 | case CPU_R5000A: |
| 231 | case CPU_NEVADA: |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 232 | uasm_i_nop(p); |
| 233 | uasm_i_tlbp(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 234 | break; |
| 235 | |
| 236 | default: |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 237 | uasm_i_tlbp(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 238 | break; |
| 239 | } |
| 240 | } |
| 241 | |
| 242 | /* |
| 243 | * Write random or indexed TLB entry, and care about the hazards from |
| 244 | * the preceeding mtc0 and for the following eret. |
| 245 | */ |
| 246 | enum tlb_write_entry { tlb_random, tlb_indexed }; |
| 247 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 248 | static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l, |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 249 | struct uasm_reloc **r, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 250 | enum tlb_write_entry wmode) |
| 251 | { |
| 252 | void(*tlbw)(u32 **) = NULL; |
| 253 | |
| 254 | switch (wmode) { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 255 | case tlb_random: tlbw = uasm_i_tlbwr; break; |
| 256 | case tlb_indexed: tlbw = uasm_i_tlbwi; break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 257 | } |
| 258 | |
Ralf Baechle | 161548b | 2008-01-29 10:14:54 +0000 | [diff] [blame] | 259 | if (cpu_has_mips_r2) { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 260 | uasm_i_ehb(p); |
Ralf Baechle | 161548b | 2008-01-29 10:14:54 +0000 | [diff] [blame] | 261 | tlbw(p); |
| 262 | return; |
| 263 | } |
| 264 | |
Ralf Baechle | 10cc352 | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 265 | switch (current_cpu_type()) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 266 | case CPU_R4000PC: |
| 267 | case CPU_R4000SC: |
| 268 | case CPU_R4000MC: |
| 269 | case CPU_R4400PC: |
| 270 | case CPU_R4400SC: |
| 271 | case CPU_R4400MC: |
| 272 | /* |
| 273 | * This branch uses up a mtc0 hazard nop slot and saves |
| 274 | * two nops after the tlbw instruction. |
| 275 | */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 276 | uasm_il_bgezl(p, r, 0, label_tlbw_hazard); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 277 | tlbw(p); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 278 | uasm_l_tlbw_hazard(l, *p); |
| 279 | uasm_i_nop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 280 | break; |
| 281 | |
| 282 | case CPU_R4600: |
| 283 | case CPU_R4700: |
| 284 | case CPU_R5000: |
| 285 | case CPU_R5000A: |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 286 | uasm_i_nop(p); |
Maciej W. Rozycki | 2c93e12 | 2005-06-30 10:51:01 +0000 | [diff] [blame] | 287 | tlbw(p); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 288 | uasm_i_nop(p); |
Maciej W. Rozycki | 2c93e12 | 2005-06-30 10:51:01 +0000 | [diff] [blame] | 289 | break; |
| 290 | |
| 291 | case CPU_R4300: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 292 | case CPU_5KC: |
| 293 | case CPU_TX49XX: |
| 294 | case CPU_AU1000: |
| 295 | case CPU_AU1100: |
| 296 | case CPU_AU1500: |
| 297 | case CPU_AU1550: |
Pete Popov | e3ad1c2 | 2005-03-01 06:33:16 +0000 | [diff] [blame] | 298 | case CPU_AU1200: |
Manuel Lauss | 237cfee | 2007-12-06 09:07:55 +0100 | [diff] [blame] | 299 | case CPU_AU1210: |
| 300 | case CPU_AU1250: |
Pete Popov | bdf21b1 | 2005-07-14 17:47:57 +0000 | [diff] [blame] | 301 | case CPU_PR4450: |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 302 | uasm_i_nop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 303 | tlbw(p); |
| 304 | break; |
| 305 | |
| 306 | case CPU_R10000: |
| 307 | case CPU_R12000: |
Kumba | 44d921b | 2006-05-16 22:23:59 -0400 | [diff] [blame] | 308 | case CPU_R14000: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 309 | case CPU_4KC: |
| 310 | case CPU_SB1: |
Andrew Isaacson | 93ce2f52 | 2005-10-19 23:56:20 -0700 | [diff] [blame] | 311 | case CPU_SB1A: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 312 | case CPU_4KSC: |
| 313 | case CPU_20KC: |
| 314 | case CPU_25KF: |
Aurelien Jarno | 1c0c13e | 2007-09-25 15:40:12 +0200 | [diff] [blame] | 315 | case CPU_BCM3302: |
| 316 | case CPU_BCM4710: |
Fuxin Zhang | 2a21c73 | 2007-06-06 14:52:43 +0800 | [diff] [blame] | 317 | case CPU_LOONGSON2: |
Maciej W. Rozycki | 8df5bea | 2006-08-23 14:26:50 +0100 | [diff] [blame] | 318 | if (m4kc_tlbp_war()) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 319 | uasm_i_nop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 320 | tlbw(p); |
| 321 | break; |
| 322 | |
| 323 | case CPU_NEVADA: |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 324 | uasm_i_nop(p); /* QED specifies 2 nops hazard */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 325 | /* |
| 326 | * This branch uses up a mtc0 hazard nop slot and saves |
| 327 | * a nop after the tlbw instruction. |
| 328 | */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 329 | uasm_il_bgezl(p, r, 0, label_tlbw_hazard); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 330 | tlbw(p); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 331 | uasm_l_tlbw_hazard(l, *p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 332 | break; |
| 333 | |
| 334 | case CPU_RM7000: |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 335 | uasm_i_nop(p); |
| 336 | uasm_i_nop(p); |
| 337 | uasm_i_nop(p); |
| 338 | uasm_i_nop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 339 | tlbw(p); |
| 340 | break; |
| 341 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 342 | case CPU_RM9000: |
| 343 | /* |
| 344 | * When the JTLB is updated by tlbwi or tlbwr, a subsequent |
| 345 | * use of the JTLB for instructions should not occur for 4 |
| 346 | * cpu cycles and use for data translations should not occur |
| 347 | * for 3 cpu cycles. |
| 348 | */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 349 | uasm_i_ssnop(p); |
| 350 | uasm_i_ssnop(p); |
| 351 | uasm_i_ssnop(p); |
| 352 | uasm_i_ssnop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 353 | tlbw(p); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 354 | uasm_i_ssnop(p); |
| 355 | uasm_i_ssnop(p); |
| 356 | uasm_i_ssnop(p); |
| 357 | uasm_i_ssnop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 358 | break; |
| 359 | |
| 360 | case CPU_VR4111: |
| 361 | case CPU_VR4121: |
| 362 | case CPU_VR4122: |
| 363 | case CPU_VR4181: |
| 364 | case CPU_VR4181A: |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 365 | uasm_i_nop(p); |
| 366 | uasm_i_nop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 367 | tlbw(p); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 368 | uasm_i_nop(p); |
| 369 | uasm_i_nop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 370 | break; |
| 371 | |
| 372 | case CPU_VR4131: |
| 373 | case CPU_VR4133: |
Ralf Baechle | 7623deb | 2005-08-29 16:49:55 +0000 | [diff] [blame] | 374 | case CPU_R5432: |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 375 | uasm_i_nop(p); |
| 376 | uasm_i_nop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 377 | tlbw(p); |
| 378 | break; |
| 379 | |
| 380 | default: |
| 381 | panic("No TLB refill handler yet (CPU type: %d)", |
| 382 | current_cpu_data.cputype); |
| 383 | break; |
| 384 | } |
| 385 | } |
| 386 | |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 387 | #ifdef CONFIG_64BIT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 388 | /* |
| 389 | * TMP and PTR are scratch. |
| 390 | * TMP will be clobbered, PTR will hold the pmd entry. |
| 391 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 392 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 393 | build_get_pmde64(u32 **p, struct uasm_label **l, struct uasm_reloc **r, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 394 | unsigned int tmp, unsigned int ptr) |
| 395 | { |
| 396 | long pgdc = (long)pgd_current; |
| 397 | |
| 398 | /* |
| 399 | * The vmalloc handling is not in the hotpath. |
| 400 | */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 401 | uasm_i_dmfc0(p, tmp, C0_BADVADDR); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 402 | #ifdef MODULE_START |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 403 | uasm_il_bltz(p, r, tmp, label_module_alloc); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 404 | #else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 405 | uasm_il_bltz(p, r, tmp, label_vmalloc); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 406 | #endif |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 407 | /* No uasm_i_nop needed here, since the next insn doesn't touch TMP. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 408 | |
| 409 | #ifdef CONFIG_SMP |
Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 410 | # ifdef CONFIG_MIPS_MT_SMTC |
| 411 | /* |
| 412 | * SMTC uses TCBind value as "CPU" index |
| 413 | */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 414 | uasm_i_mfc0(p, ptr, C0_TCBIND); |
| 415 | uasm_i_dsrl(p, ptr, ptr, 19); |
Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 416 | # else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 417 | /* |
Thiemo Seufer | 1b3a6e9 | 2005-04-01 14:07:13 +0000 | [diff] [blame] | 418 | * 64 bit SMP running in XKPHYS has smp_processor_id() << 3 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 419 | * stored in CONTEXT. |
| 420 | */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 421 | uasm_i_dmfc0(p, ptr, C0_CONTEXT); |
| 422 | uasm_i_dsrl(p, ptr, ptr, 23); |
Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 423 | #endif |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 424 | UASM_i_LA_mostly(p, tmp, pgdc); |
| 425 | uasm_i_daddu(p, ptr, ptr, tmp); |
| 426 | uasm_i_dmfc0(p, tmp, C0_BADVADDR); |
| 427 | uasm_i_ld(p, ptr, uasm_rel_lo(pgdc), ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 428 | #else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 429 | UASM_i_LA_mostly(p, ptr, pgdc); |
| 430 | uasm_i_ld(p, ptr, uasm_rel_lo(pgdc), ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 431 | #endif |
| 432 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 433 | uasm_l_vmalloc_done(l, *p); |
Ralf Baechle | 242954b | 2006-10-24 02:29:01 +0100 | [diff] [blame] | 434 | |
| 435 | if (PGDIR_SHIFT - 3 < 32) /* get pgd offset in bytes */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 436 | uasm_i_dsrl(p, tmp, tmp, PGDIR_SHIFT-3); |
Ralf Baechle | 242954b | 2006-10-24 02:29:01 +0100 | [diff] [blame] | 437 | else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 438 | uasm_i_dsrl32(p, tmp, tmp, PGDIR_SHIFT - 3 - 32); |
Ralf Baechle | 242954b | 2006-10-24 02:29:01 +0100 | [diff] [blame] | 439 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 440 | uasm_i_andi(p, tmp, tmp, (PTRS_PER_PGD - 1)<<3); |
| 441 | uasm_i_daddu(p, ptr, ptr, tmp); /* add in pgd offset */ |
| 442 | uasm_i_dmfc0(p, tmp, C0_BADVADDR); /* get faulting address */ |
| 443 | uasm_i_ld(p, ptr, 0, ptr); /* get pmd pointer */ |
| 444 | uasm_i_dsrl(p, tmp, tmp, PMD_SHIFT-3); /* get pmd offset in bytes */ |
| 445 | uasm_i_andi(p, tmp, tmp, (PTRS_PER_PMD - 1)<<3); |
| 446 | uasm_i_daddu(p, ptr, ptr, tmp); /* add in pmd offset */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 447 | } |
| 448 | |
| 449 | /* |
| 450 | * BVADDR is the faulting address, PTR is scratch. |
| 451 | * PTR will hold the pgd for vmalloc. |
| 452 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 453 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 454 | build_get_pgd_vmalloc64(u32 **p, struct uasm_label **l, struct uasm_reloc **r, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 455 | unsigned int bvaddr, unsigned int ptr) |
| 456 | { |
| 457 | long swpd = (long)swapper_pg_dir; |
| 458 | |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 459 | #ifdef MODULE_START |
| 460 | long modd = (long)module_pg_dir; |
| 461 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 462 | uasm_l_module_alloc(l, *p); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 463 | /* |
| 464 | * Assumption: |
| 465 | * VMALLOC_START >= 0xc000000000000000UL |
| 466 | * MODULE_START >= 0xe000000000000000UL |
| 467 | */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 468 | UASM_i_SLL(p, ptr, bvaddr, 2); |
| 469 | uasm_il_bgez(p, r, ptr, label_vmalloc); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 470 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 471 | if (uasm_in_compat_space_p(MODULE_START) && |
| 472 | !uasm_rel_lo(MODULE_START)) { |
| 473 | uasm_i_lui(p, ptr, uasm_rel_hi(MODULE_START)); /* delay slot */ |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 474 | } else { |
| 475 | /* unlikely configuration */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 476 | uasm_i_nop(p); /* delay slot */ |
| 477 | UASM_i_LA(p, ptr, MODULE_START); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 478 | } |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 479 | uasm_i_dsubu(p, bvaddr, bvaddr, ptr); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 480 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 481 | if (uasm_in_compat_space_p(modd) && !uasm_rel_lo(modd)) { |
| 482 | uasm_il_b(p, r, label_vmalloc_done); |
| 483 | uasm_i_lui(p, ptr, uasm_rel_hi(modd)); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 484 | } else { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 485 | UASM_i_LA_mostly(p, ptr, modd); |
| 486 | uasm_il_b(p, r, label_vmalloc_done); |
| 487 | if (uasm_in_compat_space_p(modd)) |
| 488 | uasm_i_addiu(p, ptr, ptr, uasm_rel_lo(modd)); |
Maciej W. Rozycki | 619b6e1 | 2007-10-23 12:43:25 +0100 | [diff] [blame] | 489 | else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 490 | uasm_i_daddiu(p, ptr, ptr, uasm_rel_lo(modd)); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 491 | } |
| 492 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 493 | uasm_l_vmalloc(l, *p); |
| 494 | if (uasm_in_compat_space_p(MODULE_START) && |
| 495 | !uasm_rel_lo(MODULE_START) && |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 496 | MODULE_START << 32 == VMALLOC_START) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 497 | uasm_i_dsll32(p, ptr, ptr, 0); /* typical case */ |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 498 | else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 499 | UASM_i_LA(p, ptr, VMALLOC_START); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 500 | #else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 501 | uasm_l_vmalloc(l, *p); |
| 502 | UASM_i_LA(p, ptr, VMALLOC_START); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 503 | #endif |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 504 | uasm_i_dsubu(p, bvaddr, bvaddr, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 505 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 506 | if (uasm_in_compat_space_p(swpd) && !uasm_rel_lo(swpd)) { |
| 507 | uasm_il_b(p, r, label_vmalloc_done); |
| 508 | uasm_i_lui(p, ptr, uasm_rel_hi(swpd)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 509 | } else { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 510 | UASM_i_LA_mostly(p, ptr, swpd); |
| 511 | uasm_il_b(p, r, label_vmalloc_done); |
| 512 | if (uasm_in_compat_space_p(swpd)) |
| 513 | uasm_i_addiu(p, ptr, ptr, uasm_rel_lo(swpd)); |
Maciej W. Rozycki | 619b6e1 | 2007-10-23 12:43:25 +0100 | [diff] [blame] | 514 | else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 515 | uasm_i_daddiu(p, ptr, ptr, uasm_rel_lo(swpd)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 516 | } |
| 517 | } |
| 518 | |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 519 | #else /* !CONFIG_64BIT */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 520 | |
| 521 | /* |
| 522 | * TMP and PTR are scratch. |
| 523 | * TMP will be clobbered, PTR will hold the pgd entry. |
| 524 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 525 | static void __cpuinit __maybe_unused |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 526 | build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr) |
| 527 | { |
| 528 | long pgdc = (long)pgd_current; |
| 529 | |
| 530 | /* 32 bit SMP has smp_processor_id() stored in CONTEXT. */ |
| 531 | #ifdef CONFIG_SMP |
Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 532 | #ifdef CONFIG_MIPS_MT_SMTC |
| 533 | /* |
| 534 | * SMTC uses TCBind value as "CPU" index |
| 535 | */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 536 | uasm_i_mfc0(p, ptr, C0_TCBIND); |
| 537 | UASM_i_LA_mostly(p, tmp, pgdc); |
| 538 | uasm_i_srl(p, ptr, ptr, 19); |
Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 539 | #else |
| 540 | /* |
| 541 | * smp_processor_id() << 3 is stored in CONTEXT. |
| 542 | */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 543 | uasm_i_mfc0(p, ptr, C0_CONTEXT); |
| 544 | UASM_i_LA_mostly(p, tmp, pgdc); |
| 545 | uasm_i_srl(p, ptr, ptr, 23); |
Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 546 | #endif |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 547 | uasm_i_addu(p, ptr, tmp, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 548 | #else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 549 | UASM_i_LA_mostly(p, ptr, pgdc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 550 | #endif |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 551 | uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */ |
| 552 | uasm_i_lw(p, ptr, uasm_rel_lo(pgdc), ptr); |
| 553 | uasm_i_srl(p, tmp, tmp, PGDIR_SHIFT); /* get pgd only bits */ |
| 554 | uasm_i_sll(p, tmp, tmp, PGD_T_LOG2); |
| 555 | uasm_i_addu(p, ptr, ptr, tmp); /* add in pgd offset */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 556 | } |
| 557 | |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 558 | #endif /* !CONFIG_64BIT */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 559 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 560 | static void __cpuinit build_adjust_context(u32 **p, unsigned int ctx) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 561 | { |
Ralf Baechle | 242954b | 2006-10-24 02:29:01 +0100 | [diff] [blame] | 562 | unsigned int shift = 4 - (PTE_T_LOG2 + 1) + PAGE_SHIFT - 12; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 563 | unsigned int mask = (PTRS_PER_PTE / 2 - 1) << (PTE_T_LOG2 + 1); |
| 564 | |
Ralf Baechle | 10cc352 | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 565 | switch (current_cpu_type()) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 566 | case CPU_VR41XX: |
| 567 | case CPU_VR4111: |
| 568 | case CPU_VR4121: |
| 569 | case CPU_VR4122: |
| 570 | case CPU_VR4131: |
| 571 | case CPU_VR4181: |
| 572 | case CPU_VR4181A: |
| 573 | case CPU_VR4133: |
| 574 | shift += 2; |
| 575 | break; |
| 576 | |
| 577 | default: |
| 578 | break; |
| 579 | } |
| 580 | |
| 581 | if (shift) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 582 | UASM_i_SRL(p, ctx, ctx, shift); |
| 583 | uasm_i_andi(p, ctx, ctx, mask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 584 | } |
| 585 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 586 | static void __cpuinit build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 587 | { |
| 588 | /* |
| 589 | * Bug workaround for the Nevada. It seems as if under certain |
| 590 | * circumstances the move from cp0_context might produce a |
| 591 | * bogus result when the mfc0 instruction and its consumer are |
| 592 | * in a different cacheline or a load instruction, probably any |
| 593 | * memory reference, is between them. |
| 594 | */ |
Ralf Baechle | 10cc352 | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 595 | switch (current_cpu_type()) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 596 | case CPU_NEVADA: |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 597 | UASM_i_LW(p, ptr, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 598 | GET_CONTEXT(p, tmp); /* get context reg */ |
| 599 | break; |
| 600 | |
| 601 | default: |
| 602 | GET_CONTEXT(p, tmp); /* get context reg */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 603 | UASM_i_LW(p, ptr, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 604 | break; |
| 605 | } |
| 606 | |
| 607 | build_adjust_context(p, tmp); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 608 | UASM_i_ADDU(p, ptr, ptr, tmp); /* add in offset */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 609 | } |
| 610 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 611 | static void __cpuinit build_update_entries(u32 **p, unsigned int tmp, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 612 | unsigned int ptep) |
| 613 | { |
| 614 | /* |
| 615 | * 64bit address support (36bit on a 32bit CPU) in a 32bit |
| 616 | * Kernel is a special case. Only a few CPUs use it. |
| 617 | */ |
| 618 | #ifdef CONFIG_64BIT_PHYS_ADDR |
| 619 | if (cpu_has_64bits) { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 620 | uasm_i_ld(p, tmp, 0, ptep); /* get even pte */ |
| 621 | uasm_i_ld(p, ptep, sizeof(pte_t), ptep); /* get odd pte */ |
| 622 | uasm_i_dsrl(p, tmp, tmp, 6); /* convert to entrylo0 */ |
| 623 | uasm_i_mtc0(p, tmp, C0_ENTRYLO0); /* load it */ |
| 624 | uasm_i_dsrl(p, ptep, ptep, 6); /* convert to entrylo1 */ |
| 625 | uasm_i_mtc0(p, ptep, C0_ENTRYLO1); /* load it */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 626 | } else { |
| 627 | int pte_off_even = sizeof(pte_t) / 2; |
| 628 | int pte_off_odd = pte_off_even + sizeof(pte_t); |
| 629 | |
| 630 | /* The pte entries are pre-shifted */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 631 | uasm_i_lw(p, tmp, pte_off_even, ptep); /* get even pte */ |
| 632 | uasm_i_mtc0(p, tmp, C0_ENTRYLO0); /* load it */ |
| 633 | uasm_i_lw(p, ptep, pte_off_odd, ptep); /* get odd pte */ |
| 634 | uasm_i_mtc0(p, ptep, C0_ENTRYLO1); /* load it */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 635 | } |
| 636 | #else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 637 | UASM_i_LW(p, tmp, 0, ptep); /* get even pte */ |
| 638 | UASM_i_LW(p, ptep, sizeof(pte_t), ptep); /* get odd pte */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 639 | if (r45k_bvahwbug()) |
| 640 | build_tlb_probe_entry(p); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 641 | UASM_i_SRL(p, tmp, tmp, 6); /* convert to entrylo0 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 642 | if (r4k_250MHZhwbug()) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 643 | uasm_i_mtc0(p, 0, C0_ENTRYLO0); |
| 644 | uasm_i_mtc0(p, tmp, C0_ENTRYLO0); /* load it */ |
| 645 | UASM_i_SRL(p, ptep, ptep, 6); /* convert to entrylo1 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 646 | if (r45k_bvahwbug()) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 647 | uasm_i_mfc0(p, tmp, C0_INDEX); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 648 | if (r4k_250MHZhwbug()) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 649 | uasm_i_mtc0(p, 0, C0_ENTRYLO1); |
| 650 | uasm_i_mtc0(p, ptep, C0_ENTRYLO1); /* load it */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 651 | #endif |
| 652 | } |
| 653 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 654 | static void __cpuinit build_r4000_tlb_refill_handler(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 655 | { |
| 656 | u32 *p = tlb_handler; |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 657 | struct uasm_label *l = labels; |
| 658 | struct uasm_reloc *r = relocs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 659 | u32 *f; |
| 660 | unsigned int final_len; |
| 661 | |
| 662 | memset(tlb_handler, 0, sizeof(tlb_handler)); |
| 663 | memset(labels, 0, sizeof(labels)); |
| 664 | memset(relocs, 0, sizeof(relocs)); |
| 665 | memset(final_handler, 0, sizeof(final_handler)); |
| 666 | |
| 667 | /* |
| 668 | * create the plain linear handler |
| 669 | */ |
| 670 | if (bcm1250_m3_war()) { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 671 | UASM_i_MFC0(&p, K0, C0_BADVADDR); |
| 672 | UASM_i_MFC0(&p, K1, C0_ENTRYHI); |
| 673 | uasm_i_xor(&p, K0, K0, K1); |
| 674 | UASM_i_SRL(&p, K0, K0, PAGE_SHIFT + 1); |
| 675 | uasm_il_bnez(&p, &r, K0, label_leave); |
| 676 | /* No need for uasm_i_nop */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 677 | } |
| 678 | |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 679 | #ifdef CONFIG_64BIT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 680 | build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */ |
| 681 | #else |
| 682 | build_get_pgde32(&p, K0, K1); /* get pgd in K1 */ |
| 683 | #endif |
| 684 | |
| 685 | build_get_ptep(&p, K0, K1); |
| 686 | build_update_entries(&p, K0, K1); |
| 687 | build_tlb_write_entry(&p, &l, &r, tlb_random); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 688 | uasm_l_leave(&l, p); |
| 689 | uasm_i_eret(&p); /* return from trap */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 690 | |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 691 | #ifdef CONFIG_64BIT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 692 | build_get_pgd_vmalloc64(&p, &l, &r, K0, K1); |
| 693 | #endif |
| 694 | |
| 695 | /* |
| 696 | * Overflow check: For the 64bit handler, we need at least one |
| 697 | * free instruction slot for the wrap-around branch. In worst |
| 698 | * case, if the intended insertion point is a delay slot, we |
Matt LaPlante | 4b3f686 | 2006-10-03 22:21:02 +0200 | [diff] [blame] | 699 | * need three, with the second nop'ed and the third being |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 700 | * unused. |
| 701 | */ |
Fuxin Zhang | 2a21c73 | 2007-06-06 14:52:43 +0800 | [diff] [blame] | 702 | /* Loongson2 ebase is different than r4k, we have more space */ |
| 703 | #if defined(CONFIG_32BIT) || defined(CONFIG_CPU_LOONGSON2) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 704 | if ((p - tlb_handler) > 64) |
| 705 | panic("TLB refill handler space exceeded"); |
| 706 | #else |
| 707 | if (((p - tlb_handler) > 63) |
| 708 | || (((p - tlb_handler) > 61) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 709 | && uasm_insn_has_bdelay(relocs, tlb_handler + 29))) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 710 | panic("TLB refill handler space exceeded"); |
| 711 | #endif |
| 712 | |
| 713 | /* |
| 714 | * Now fold the handler in the TLB refill handler space. |
| 715 | */ |
Fuxin Zhang | 2a21c73 | 2007-06-06 14:52:43 +0800 | [diff] [blame] | 716 | #if defined(CONFIG_32BIT) || defined(CONFIG_CPU_LOONGSON2) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 717 | f = final_handler; |
| 718 | /* Simplest case, just copy the handler. */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 719 | uasm_copy_handler(relocs, labels, tlb_handler, p, f); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 720 | final_len = p - tlb_handler; |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 721 | #else /* CONFIG_64BIT */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 722 | f = final_handler + 32; |
| 723 | if ((p - tlb_handler) <= 32) { |
| 724 | /* Just copy the handler. */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 725 | uasm_copy_handler(relocs, labels, tlb_handler, p, f); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 726 | final_len = p - tlb_handler; |
| 727 | } else { |
| 728 | u32 *split = tlb_handler + 30; |
| 729 | |
| 730 | /* |
| 731 | * Find the split point. |
| 732 | */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 733 | if (uasm_insn_has_bdelay(relocs, split - 1)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 734 | split--; |
| 735 | |
| 736 | /* Copy first part of the handler. */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 737 | uasm_copy_handler(relocs, labels, tlb_handler, split, f); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 738 | f += split - tlb_handler; |
| 739 | |
| 740 | /* Insert branch. */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 741 | uasm_l_split(&l, final_handler); |
| 742 | uasm_il_b(&f, &r, label_split); |
| 743 | if (uasm_insn_has_bdelay(relocs, split)) |
| 744 | uasm_i_nop(&f); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 745 | else { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 746 | uasm_copy_handler(relocs, labels, split, split + 1, f); |
| 747 | uasm_move_labels(labels, f, f + 1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 748 | f++; |
| 749 | split++; |
| 750 | } |
| 751 | |
| 752 | /* Copy the rest of the handler. */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 753 | uasm_copy_handler(relocs, labels, split, p, final_handler); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 754 | final_len = (f - (final_handler + 32)) + (p - split); |
| 755 | } |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 756 | #endif /* CONFIG_64BIT */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 757 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 758 | uasm_resolve_relocs(relocs, labels); |
| 759 | pr_debug("Wrote TLB refill handler (%u instructions).\n", |
| 760 | final_len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 761 | |
Ralf Baechle | 91b05e6 | 2006-03-29 18:53:00 +0100 | [diff] [blame] | 762 | memcpy((void *)ebase, final_handler, 0x100); |
Franck Bui-Huu | 92b1e6a | 2007-10-18 09:11:17 +0200 | [diff] [blame] | 763 | |
| 764 | dump_handler((u32 *)ebase, 64); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 765 | } |
| 766 | |
| 767 | /* |
| 768 | * TLB load/store/modify handlers. |
| 769 | * |
| 770 | * Only the fastpath gets synthesized at runtime, the slowpath for |
| 771 | * do_page_fault remains normal asm. |
| 772 | */ |
| 773 | extern void tlb_do_page_fault_0(void); |
| 774 | extern void tlb_do_page_fault_1(void); |
| 775 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 776 | /* |
| 777 | * 128 instructions for the fastpath handler is generous and should |
| 778 | * never be exceeded. |
| 779 | */ |
| 780 | #define FASTPATH_SIZE 128 |
| 781 | |
Franck Bui-Huu | cbdbe07 | 2007-10-18 09:11:16 +0200 | [diff] [blame] | 782 | u32 handle_tlbl[FASTPATH_SIZE] __cacheline_aligned; |
| 783 | u32 handle_tlbs[FASTPATH_SIZE] __cacheline_aligned; |
| 784 | u32 handle_tlbm[FASTPATH_SIZE] __cacheline_aligned; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 785 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 786 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 787 | iPTE_LW(u32 **p, struct uasm_label **l, unsigned int pte, unsigned int ptr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 788 | { |
| 789 | #ifdef CONFIG_SMP |
| 790 | # ifdef CONFIG_64BIT_PHYS_ADDR |
| 791 | if (cpu_has_64bits) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 792 | uasm_i_lld(p, pte, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 793 | else |
| 794 | # endif |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 795 | UASM_i_LL(p, pte, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 796 | #else |
| 797 | # ifdef CONFIG_64BIT_PHYS_ADDR |
| 798 | if (cpu_has_64bits) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 799 | uasm_i_ld(p, pte, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 800 | else |
| 801 | # endif |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 802 | UASM_i_LW(p, pte, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 803 | #endif |
| 804 | } |
| 805 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 806 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 807 | iPTE_SW(u32 **p, struct uasm_reloc **r, unsigned int pte, unsigned int ptr, |
Thiemo Seufer | 63b2d2f | 2005-04-28 08:52:57 +0000 | [diff] [blame] | 808 | unsigned int mode) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 809 | { |
Thiemo Seufer | 63b2d2f | 2005-04-28 08:52:57 +0000 | [diff] [blame] | 810 | #ifdef CONFIG_64BIT_PHYS_ADDR |
| 811 | unsigned int hwmode = mode & (_PAGE_VALID | _PAGE_DIRTY); |
| 812 | #endif |
| 813 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 814 | uasm_i_ori(p, pte, pte, mode); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 815 | #ifdef CONFIG_SMP |
| 816 | # ifdef CONFIG_64BIT_PHYS_ADDR |
| 817 | if (cpu_has_64bits) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 818 | uasm_i_scd(p, pte, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 819 | else |
| 820 | # endif |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 821 | UASM_i_SC(p, pte, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 822 | |
| 823 | if (r10000_llsc_war()) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 824 | uasm_il_beqzl(p, r, pte, label_smp_pgtable_change); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 825 | else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 826 | uasm_il_beqz(p, r, pte, label_smp_pgtable_change); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 827 | |
| 828 | # ifdef CONFIG_64BIT_PHYS_ADDR |
| 829 | if (!cpu_has_64bits) { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 830 | /* no uasm_i_nop needed */ |
| 831 | uasm_i_ll(p, pte, sizeof(pte_t) / 2, ptr); |
| 832 | uasm_i_ori(p, pte, pte, hwmode); |
| 833 | uasm_i_sc(p, pte, sizeof(pte_t) / 2, ptr); |
| 834 | uasm_il_beqz(p, r, pte, label_smp_pgtable_change); |
| 835 | /* no uasm_i_nop needed */ |
| 836 | uasm_i_lw(p, pte, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 837 | } else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 838 | uasm_i_nop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 839 | # else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 840 | uasm_i_nop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 841 | # endif |
| 842 | #else |
| 843 | # ifdef CONFIG_64BIT_PHYS_ADDR |
| 844 | if (cpu_has_64bits) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 845 | uasm_i_sd(p, pte, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 846 | else |
| 847 | # endif |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 848 | UASM_i_SW(p, pte, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 849 | |
| 850 | # ifdef CONFIG_64BIT_PHYS_ADDR |
| 851 | if (!cpu_has_64bits) { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 852 | uasm_i_lw(p, pte, sizeof(pte_t) / 2, ptr); |
| 853 | uasm_i_ori(p, pte, pte, hwmode); |
| 854 | uasm_i_sw(p, pte, sizeof(pte_t) / 2, ptr); |
| 855 | uasm_i_lw(p, pte, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 856 | } |
| 857 | # endif |
| 858 | #endif |
| 859 | } |
| 860 | |
| 861 | /* |
| 862 | * Check if PTE is present, if not then jump to LABEL. PTR points to |
| 863 | * the page table where this PTE is located, PTE will be re-loaded |
| 864 | * with it's original value. |
| 865 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 866 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 867 | build_pte_present(u32 **p, struct uasm_label **l, struct uasm_reloc **r, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 868 | unsigned int pte, unsigned int ptr, enum label_id lid) |
| 869 | { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 870 | uasm_i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_READ); |
| 871 | uasm_i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_READ); |
| 872 | uasm_il_bnez(p, r, pte, lid); |
Thiemo Seufer | 63b2d2f | 2005-04-28 08:52:57 +0000 | [diff] [blame] | 873 | iPTE_LW(p, l, pte, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 874 | } |
| 875 | |
| 876 | /* Make PTE valid, store result in PTR. */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 877 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 878 | build_make_valid(u32 **p, struct uasm_reloc **r, unsigned int pte, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 879 | unsigned int ptr) |
| 880 | { |
Thiemo Seufer | 63b2d2f | 2005-04-28 08:52:57 +0000 | [diff] [blame] | 881 | unsigned int mode = _PAGE_VALID | _PAGE_ACCESSED; |
| 882 | |
| 883 | iPTE_SW(p, r, pte, ptr, mode); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 884 | } |
| 885 | |
| 886 | /* |
| 887 | * Check if PTE can be written to, if not branch to LABEL. Regardless |
| 888 | * restore PTE with value from PTR when done. |
| 889 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 890 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 891 | build_pte_writable(u32 **p, struct uasm_label **l, struct uasm_reloc **r, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 892 | unsigned int pte, unsigned int ptr, enum label_id lid) |
| 893 | { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 894 | uasm_i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE); |
| 895 | uasm_i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE); |
| 896 | uasm_il_bnez(p, r, pte, lid); |
Thiemo Seufer | 63b2d2f | 2005-04-28 08:52:57 +0000 | [diff] [blame] | 897 | iPTE_LW(p, l, pte, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 898 | } |
| 899 | |
| 900 | /* Make PTE writable, update software status bits as well, then store |
| 901 | * at PTR. |
| 902 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 903 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 904 | build_make_write(u32 **p, struct uasm_reloc **r, unsigned int pte, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 905 | unsigned int ptr) |
| 906 | { |
Thiemo Seufer | 63b2d2f | 2005-04-28 08:52:57 +0000 | [diff] [blame] | 907 | unsigned int mode = (_PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_VALID |
| 908 | | _PAGE_DIRTY); |
| 909 | |
| 910 | iPTE_SW(p, r, pte, ptr, mode); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 911 | } |
| 912 | |
| 913 | /* |
| 914 | * Check if PTE can be modified, if not branch to LABEL. Regardless |
| 915 | * restore PTE with value from PTR when done. |
| 916 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 917 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 918 | build_pte_modifiable(u32 **p, struct uasm_label **l, struct uasm_reloc **r, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 919 | unsigned int pte, unsigned int ptr, enum label_id lid) |
| 920 | { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 921 | uasm_i_andi(p, pte, pte, _PAGE_WRITE); |
| 922 | uasm_il_beqz(p, r, pte, lid); |
Thiemo Seufer | 63b2d2f | 2005-04-28 08:52:57 +0000 | [diff] [blame] | 923 | iPTE_LW(p, l, pte, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 924 | } |
| 925 | |
| 926 | /* |
| 927 | * R3000 style TLB load/store/modify handlers. |
| 928 | */ |
| 929 | |
Maciej W. Rozycki | fded2e5 | 2005-06-13 20:24:00 +0000 | [diff] [blame] | 930 | /* |
| 931 | * This places the pte into ENTRYLO0 and writes it with tlbwi. |
| 932 | * Then it returns. |
| 933 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 934 | static void __cpuinit |
Maciej W. Rozycki | fded2e5 | 2005-06-13 20:24:00 +0000 | [diff] [blame] | 935 | build_r3000_pte_reload_tlbwi(u32 **p, unsigned int pte, unsigned int tmp) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 936 | { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 937 | uasm_i_mtc0(p, pte, C0_ENTRYLO0); /* cp0 delay */ |
| 938 | uasm_i_mfc0(p, tmp, C0_EPC); /* cp0 delay */ |
| 939 | uasm_i_tlbwi(p); |
| 940 | uasm_i_jr(p, tmp); |
| 941 | uasm_i_rfe(p); /* branch delay */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 942 | } |
| 943 | |
| 944 | /* |
Maciej W. Rozycki | fded2e5 | 2005-06-13 20:24:00 +0000 | [diff] [blame] | 945 | * This places the pte into ENTRYLO0 and writes it with tlbwi |
| 946 | * or tlbwr as appropriate. This is because the index register |
| 947 | * may have the probe fail bit set as a result of a trap on a |
| 948 | * kseg2 access, i.e. without refill. Then it returns. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 949 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 950 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 951 | build_r3000_tlb_reload_write(u32 **p, struct uasm_label **l, |
| 952 | struct uasm_reloc **r, unsigned int pte, |
| 953 | unsigned int tmp) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 954 | { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 955 | uasm_i_mfc0(p, tmp, C0_INDEX); |
| 956 | uasm_i_mtc0(p, pte, C0_ENTRYLO0); /* cp0 delay */ |
| 957 | uasm_il_bltz(p, r, tmp, label_r3000_write_probe_fail); /* cp0 delay */ |
| 958 | uasm_i_mfc0(p, tmp, C0_EPC); /* branch delay */ |
| 959 | uasm_i_tlbwi(p); /* cp0 delay */ |
| 960 | uasm_i_jr(p, tmp); |
| 961 | uasm_i_rfe(p); /* branch delay */ |
| 962 | uasm_l_r3000_write_probe_fail(l, *p); |
| 963 | uasm_i_tlbwr(p); /* cp0 delay */ |
| 964 | uasm_i_jr(p, tmp); |
| 965 | uasm_i_rfe(p); /* branch delay */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 966 | } |
| 967 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 968 | static void __cpuinit |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 969 | build_r3000_tlbchange_handler_head(u32 **p, unsigned int pte, |
| 970 | unsigned int ptr) |
| 971 | { |
| 972 | long pgdc = (long)pgd_current; |
| 973 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 974 | uasm_i_mfc0(p, pte, C0_BADVADDR); |
| 975 | uasm_i_lui(p, ptr, uasm_rel_hi(pgdc)); /* cp0 delay */ |
| 976 | uasm_i_lw(p, ptr, uasm_rel_lo(pgdc), ptr); |
| 977 | uasm_i_srl(p, pte, pte, 22); /* load delay */ |
| 978 | uasm_i_sll(p, pte, pte, 2); |
| 979 | uasm_i_addu(p, ptr, ptr, pte); |
| 980 | uasm_i_mfc0(p, pte, C0_CONTEXT); |
| 981 | uasm_i_lw(p, ptr, 0, ptr); /* cp0 delay */ |
| 982 | uasm_i_andi(p, pte, pte, 0xffc); /* load delay */ |
| 983 | uasm_i_addu(p, ptr, ptr, pte); |
| 984 | uasm_i_lw(p, pte, 0, ptr); |
| 985 | uasm_i_tlbp(p); /* load delay */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 986 | } |
| 987 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 988 | static void __cpuinit build_r3000_tlb_load_handler(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 989 | { |
| 990 | u32 *p = handle_tlbl; |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 991 | struct uasm_label *l = labels; |
| 992 | struct uasm_reloc *r = relocs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 993 | |
| 994 | memset(handle_tlbl, 0, sizeof(handle_tlbl)); |
| 995 | memset(labels, 0, sizeof(labels)); |
| 996 | memset(relocs, 0, sizeof(relocs)); |
| 997 | |
| 998 | build_r3000_tlbchange_handler_head(&p, K0, K1); |
| 999 | build_pte_present(&p, &l, &r, K0, K1, label_nopage_tlbl); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1000 | uasm_i_nop(&p); /* load delay */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1001 | build_make_valid(&p, &r, K0, K1); |
Maciej W. Rozycki | fded2e5 | 2005-06-13 20:24:00 +0000 | [diff] [blame] | 1002 | build_r3000_tlb_reload_write(&p, &l, &r, K0, K1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1003 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1004 | uasm_l_nopage_tlbl(&l, p); |
| 1005 | uasm_i_j(&p, (unsigned long)tlb_do_page_fault_0 & 0x0fffffff); |
| 1006 | uasm_i_nop(&p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1007 | |
| 1008 | if ((p - handle_tlbl) > FASTPATH_SIZE) |
| 1009 | panic("TLB load handler fastpath space exceeded"); |
| 1010 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1011 | uasm_resolve_relocs(relocs, labels); |
| 1012 | pr_debug("Wrote TLB load handler fastpath (%u instructions).\n", |
| 1013 | (unsigned int)(p - handle_tlbl)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1014 | |
Franck Bui-Huu | 92b1e6a | 2007-10-18 09:11:17 +0200 | [diff] [blame] | 1015 | dump_handler(handle_tlbl, ARRAY_SIZE(handle_tlbl)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1016 | } |
| 1017 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 1018 | static void __cpuinit build_r3000_tlb_store_handler(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1019 | { |
| 1020 | u32 *p = handle_tlbs; |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1021 | struct uasm_label *l = labels; |
| 1022 | struct uasm_reloc *r = relocs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1023 | |
| 1024 | memset(handle_tlbs, 0, sizeof(handle_tlbs)); |
| 1025 | memset(labels, 0, sizeof(labels)); |
| 1026 | memset(relocs, 0, sizeof(relocs)); |
| 1027 | |
| 1028 | build_r3000_tlbchange_handler_head(&p, K0, K1); |
| 1029 | build_pte_writable(&p, &l, &r, K0, K1, label_nopage_tlbs); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1030 | uasm_i_nop(&p); /* load delay */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1031 | build_make_write(&p, &r, K0, K1); |
Maciej W. Rozycki | fded2e5 | 2005-06-13 20:24:00 +0000 | [diff] [blame] | 1032 | build_r3000_tlb_reload_write(&p, &l, &r, K0, K1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1033 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1034 | uasm_l_nopage_tlbs(&l, p); |
| 1035 | uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff); |
| 1036 | uasm_i_nop(&p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1037 | |
| 1038 | if ((p - handle_tlbs) > FASTPATH_SIZE) |
| 1039 | panic("TLB store handler fastpath space exceeded"); |
| 1040 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1041 | uasm_resolve_relocs(relocs, labels); |
| 1042 | pr_debug("Wrote TLB store handler fastpath (%u instructions).\n", |
| 1043 | (unsigned int)(p - handle_tlbs)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1044 | |
Franck Bui-Huu | 92b1e6a | 2007-10-18 09:11:17 +0200 | [diff] [blame] | 1045 | dump_handler(handle_tlbs, ARRAY_SIZE(handle_tlbs)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1046 | } |
| 1047 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 1048 | static void __cpuinit build_r3000_tlb_modify_handler(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1049 | { |
| 1050 | u32 *p = handle_tlbm; |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1051 | struct uasm_label *l = labels; |
| 1052 | struct uasm_reloc *r = relocs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1053 | |
| 1054 | memset(handle_tlbm, 0, sizeof(handle_tlbm)); |
| 1055 | memset(labels, 0, sizeof(labels)); |
| 1056 | memset(relocs, 0, sizeof(relocs)); |
| 1057 | |
| 1058 | build_r3000_tlbchange_handler_head(&p, K0, K1); |
| 1059 | build_pte_modifiable(&p, &l, &r, K0, K1, label_nopage_tlbm); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1060 | uasm_i_nop(&p); /* load delay */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1061 | build_make_write(&p, &r, K0, K1); |
Maciej W. Rozycki | fded2e5 | 2005-06-13 20:24:00 +0000 | [diff] [blame] | 1062 | build_r3000_pte_reload_tlbwi(&p, K0, K1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1063 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1064 | uasm_l_nopage_tlbm(&l, p); |
| 1065 | uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff); |
| 1066 | uasm_i_nop(&p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1067 | |
| 1068 | if ((p - handle_tlbm) > FASTPATH_SIZE) |
| 1069 | panic("TLB modify handler fastpath space exceeded"); |
| 1070 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1071 | uasm_resolve_relocs(relocs, labels); |
| 1072 | pr_debug("Wrote TLB modify handler fastpath (%u instructions).\n", |
| 1073 | (unsigned int)(p - handle_tlbm)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1074 | |
Franck Bui-Huu | 92b1e6a | 2007-10-18 09:11:17 +0200 | [diff] [blame] | 1075 | dump_handler(handle_tlbm, ARRAY_SIZE(handle_tlbm)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1076 | } |
| 1077 | |
| 1078 | /* |
| 1079 | * R4000 style TLB load/store/modify handlers. |
| 1080 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 1081 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1082 | build_r4000_tlbchange_handler_head(u32 **p, struct uasm_label **l, |
| 1083 | struct uasm_reloc **r, unsigned int pte, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1084 | unsigned int ptr) |
| 1085 | { |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 1086 | #ifdef CONFIG_64BIT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1087 | build_get_pmde64(p, l, r, pte, ptr); /* get pmd in ptr */ |
| 1088 | #else |
| 1089 | build_get_pgde32(p, pte, ptr); /* get pgd in ptr */ |
| 1090 | #endif |
| 1091 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1092 | UASM_i_MFC0(p, pte, C0_BADVADDR); |
| 1093 | UASM_i_LW(p, ptr, 0, ptr); |
| 1094 | UASM_i_SRL(p, pte, pte, PAGE_SHIFT + PTE_ORDER - PTE_T_LOG2); |
| 1095 | uasm_i_andi(p, pte, pte, (PTRS_PER_PTE - 1) << PTE_T_LOG2); |
| 1096 | UASM_i_ADDU(p, ptr, ptr, pte); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1097 | |
| 1098 | #ifdef CONFIG_SMP |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1099 | uasm_l_smp_pgtable_change(l, *p); |
| 1100 | #endif |
Thiemo Seufer | 63b2d2f | 2005-04-28 08:52:57 +0000 | [diff] [blame] | 1101 | iPTE_LW(p, l, pte, ptr); /* get even pte */ |
Maciej W. Rozycki | 8df5bea | 2006-08-23 14:26:50 +0100 | [diff] [blame] | 1102 | if (!m4kc_tlbp_war()) |
| 1103 | build_tlb_probe_entry(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1104 | } |
| 1105 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 1106 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1107 | build_r4000_tlbchange_handler_tail(u32 **p, struct uasm_label **l, |
| 1108 | struct uasm_reloc **r, unsigned int tmp, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1109 | unsigned int ptr) |
| 1110 | { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1111 | uasm_i_ori(p, ptr, ptr, sizeof(pte_t)); |
| 1112 | uasm_i_xori(p, ptr, ptr, sizeof(pte_t)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1113 | build_update_entries(p, tmp, ptr); |
| 1114 | build_tlb_write_entry(p, l, r, tlb_indexed); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1115 | uasm_l_leave(l, *p); |
| 1116 | uasm_i_eret(p); /* return from trap */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1117 | |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 1118 | #ifdef CONFIG_64BIT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1119 | build_get_pgd_vmalloc64(p, l, r, tmp, ptr); |
| 1120 | #endif |
| 1121 | } |
| 1122 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 1123 | static void __cpuinit build_r4000_tlb_load_handler(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1124 | { |
| 1125 | u32 *p = handle_tlbl; |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1126 | struct uasm_label *l = labels; |
| 1127 | struct uasm_reloc *r = relocs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1128 | |
| 1129 | memset(handle_tlbl, 0, sizeof(handle_tlbl)); |
| 1130 | memset(labels, 0, sizeof(labels)); |
| 1131 | memset(relocs, 0, sizeof(relocs)); |
| 1132 | |
| 1133 | if (bcm1250_m3_war()) { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1134 | UASM_i_MFC0(&p, K0, C0_BADVADDR); |
| 1135 | UASM_i_MFC0(&p, K1, C0_ENTRYHI); |
| 1136 | uasm_i_xor(&p, K0, K0, K1); |
| 1137 | UASM_i_SRL(&p, K0, K0, PAGE_SHIFT + 1); |
| 1138 | uasm_il_bnez(&p, &r, K0, label_leave); |
| 1139 | /* No need for uasm_i_nop */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1140 | } |
| 1141 | |
| 1142 | build_r4000_tlbchange_handler_head(&p, &l, &r, K0, K1); |
| 1143 | build_pte_present(&p, &l, &r, K0, K1, label_nopage_tlbl); |
Maciej W. Rozycki | 8df5bea | 2006-08-23 14:26:50 +0100 | [diff] [blame] | 1144 | if (m4kc_tlbp_war()) |
| 1145 | build_tlb_probe_entry(&p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1146 | build_make_valid(&p, &r, K0, K1); |
| 1147 | build_r4000_tlbchange_handler_tail(&p, &l, &r, K0, K1); |
| 1148 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1149 | uasm_l_nopage_tlbl(&l, p); |
| 1150 | uasm_i_j(&p, (unsigned long)tlb_do_page_fault_0 & 0x0fffffff); |
| 1151 | uasm_i_nop(&p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1152 | |
| 1153 | if ((p - handle_tlbl) > FASTPATH_SIZE) |
| 1154 | panic("TLB load handler fastpath space exceeded"); |
| 1155 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1156 | uasm_resolve_relocs(relocs, labels); |
| 1157 | pr_debug("Wrote TLB load handler fastpath (%u instructions).\n", |
| 1158 | (unsigned int)(p - handle_tlbl)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1159 | |
Franck Bui-Huu | 92b1e6a | 2007-10-18 09:11:17 +0200 | [diff] [blame] | 1160 | dump_handler(handle_tlbl, ARRAY_SIZE(handle_tlbl)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1161 | } |
| 1162 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 1163 | static void __cpuinit build_r4000_tlb_store_handler(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1164 | { |
| 1165 | u32 *p = handle_tlbs; |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1166 | struct uasm_label *l = labels; |
| 1167 | struct uasm_reloc *r = relocs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1168 | |
| 1169 | memset(handle_tlbs, 0, sizeof(handle_tlbs)); |
| 1170 | memset(labels, 0, sizeof(labels)); |
| 1171 | memset(relocs, 0, sizeof(relocs)); |
| 1172 | |
| 1173 | build_r4000_tlbchange_handler_head(&p, &l, &r, K0, K1); |
| 1174 | build_pte_writable(&p, &l, &r, K0, K1, label_nopage_tlbs); |
Maciej W. Rozycki | 8df5bea | 2006-08-23 14:26:50 +0100 | [diff] [blame] | 1175 | if (m4kc_tlbp_war()) |
| 1176 | build_tlb_probe_entry(&p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1177 | build_make_write(&p, &r, K0, K1); |
| 1178 | build_r4000_tlbchange_handler_tail(&p, &l, &r, K0, K1); |
| 1179 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1180 | uasm_l_nopage_tlbs(&l, p); |
| 1181 | uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff); |
| 1182 | uasm_i_nop(&p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1183 | |
| 1184 | if ((p - handle_tlbs) > FASTPATH_SIZE) |
| 1185 | panic("TLB store handler fastpath space exceeded"); |
| 1186 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1187 | uasm_resolve_relocs(relocs, labels); |
| 1188 | pr_debug("Wrote TLB store handler fastpath (%u instructions).\n", |
| 1189 | (unsigned int)(p - handle_tlbs)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1190 | |
Franck Bui-Huu | 92b1e6a | 2007-10-18 09:11:17 +0200 | [diff] [blame] | 1191 | dump_handler(handle_tlbs, ARRAY_SIZE(handle_tlbs)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1192 | } |
| 1193 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 1194 | static void __cpuinit build_r4000_tlb_modify_handler(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1195 | { |
| 1196 | u32 *p = handle_tlbm; |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1197 | struct uasm_label *l = labels; |
| 1198 | struct uasm_reloc *r = relocs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1199 | |
| 1200 | memset(handle_tlbm, 0, sizeof(handle_tlbm)); |
| 1201 | memset(labels, 0, sizeof(labels)); |
| 1202 | memset(relocs, 0, sizeof(relocs)); |
| 1203 | |
| 1204 | build_r4000_tlbchange_handler_head(&p, &l, &r, K0, K1); |
| 1205 | build_pte_modifiable(&p, &l, &r, K0, K1, label_nopage_tlbm); |
Maciej W. Rozycki | 8df5bea | 2006-08-23 14:26:50 +0100 | [diff] [blame] | 1206 | if (m4kc_tlbp_war()) |
| 1207 | build_tlb_probe_entry(&p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1208 | /* Present and writable bits set, set accessed and dirty bits. */ |
| 1209 | build_make_write(&p, &r, K0, K1); |
| 1210 | build_r4000_tlbchange_handler_tail(&p, &l, &r, K0, K1); |
| 1211 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1212 | uasm_l_nopage_tlbm(&l, p); |
| 1213 | uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff); |
| 1214 | uasm_i_nop(&p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1215 | |
| 1216 | if ((p - handle_tlbm) > FASTPATH_SIZE) |
| 1217 | panic("TLB modify handler fastpath space exceeded"); |
| 1218 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1219 | uasm_resolve_relocs(relocs, labels); |
| 1220 | pr_debug("Wrote TLB modify handler fastpath (%u instructions).\n", |
| 1221 | (unsigned int)(p - handle_tlbm)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1222 | |
Franck Bui-Huu | 92b1e6a | 2007-10-18 09:11:17 +0200 | [diff] [blame] | 1223 | dump_handler(handle_tlbm, ARRAY_SIZE(handle_tlbm)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1224 | } |
| 1225 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 1226 | void __cpuinit build_tlb_refill_handler(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1227 | { |
| 1228 | /* |
| 1229 | * The refill handler is generated per-CPU, multi-node systems |
| 1230 | * may have local storage for it. The other handlers are only |
| 1231 | * needed once. |
| 1232 | */ |
| 1233 | static int run_once = 0; |
| 1234 | |
Ralf Baechle | 10cc352 | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 1235 | switch (current_cpu_type()) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1236 | case CPU_R2000: |
| 1237 | case CPU_R3000: |
| 1238 | case CPU_R3000A: |
| 1239 | case CPU_R3081E: |
| 1240 | case CPU_TX3912: |
| 1241 | case CPU_TX3922: |
| 1242 | case CPU_TX3927: |
| 1243 | build_r3000_tlb_refill_handler(); |
| 1244 | if (!run_once) { |
| 1245 | build_r3000_tlb_load_handler(); |
| 1246 | build_r3000_tlb_store_handler(); |
| 1247 | build_r3000_tlb_modify_handler(); |
| 1248 | run_once++; |
| 1249 | } |
| 1250 | break; |
| 1251 | |
| 1252 | case CPU_R6000: |
| 1253 | case CPU_R6000A: |
| 1254 | panic("No R6000 TLB refill handler yet"); |
| 1255 | break; |
| 1256 | |
| 1257 | case CPU_R8000: |
| 1258 | panic("No R8000 TLB refill handler yet"); |
| 1259 | break; |
| 1260 | |
| 1261 | default: |
| 1262 | build_r4000_tlb_refill_handler(); |
| 1263 | if (!run_once) { |
| 1264 | build_r4000_tlb_load_handler(); |
| 1265 | build_r4000_tlb_store_handler(); |
| 1266 | build_r4000_tlb_modify_handler(); |
| 1267 | run_once++; |
| 1268 | } |
| 1269 | } |
| 1270 | } |
Ralf Baechle | 1d40cfc | 2005-07-15 15:23:23 +0000 | [diff] [blame] | 1271 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame^] | 1272 | void __cpuinit flush_tlb_handlers(void) |
Ralf Baechle | 1d40cfc | 2005-07-15 15:23:23 +0000 | [diff] [blame] | 1273 | { |
| 1274 | flush_icache_range((unsigned long)handle_tlbl, |
| 1275 | (unsigned long)handle_tlbl + sizeof(handle_tlbl)); |
| 1276 | flush_icache_range((unsigned long)handle_tlbs, |
| 1277 | (unsigned long)handle_tlbs + sizeof(handle_tlbs)); |
| 1278 | flush_icache_range((unsigned long)handle_tlbm, |
| 1279 | (unsigned long)handle_tlbm + sizeof(handle_tlbm)); |
| 1280 | } |