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H. Peter Anvin1965aae2008-10-22 22:26:29 -07001#ifndef _ASM_X86_GART_H
2#define _ASM_X86_GART_H
Joerg Roedel395624f2007-10-24 12:49:47 +02003
Pavel Machek0abbc782008-05-20 16:27:17 +02004#include <asm/e820.h>
5
Rafael J. Wysocki6703f6d2008-06-10 00:10:48 +02006extern void set_up_gart_resume(u32, u32);
FUJITA Tomonorie93be882008-07-10 08:27:49 +09007
Joerg Roedel395624f2007-10-24 12:49:47 +02008extern int fallback_aper_order;
9extern int fallback_aper_force;
Joerg Roedel395624f2007-10-24 12:49:47 +020010extern int fix_aperture;
Joerg Roedel395624f2007-10-24 12:49:47 +020011
Pavel Machekaa134f12008-04-08 10:49:03 +020012/* PTE bits. */
13#define GPTE_VALID 1
14#define GPTE_COHERENT 2
15
16/* Aperture control register bits. */
17#define GARTEN (1<<0)
18#define DISGARTCPU (1<<4)
19#define DISGARTIO (1<<5)
Borislav Petkov260133a2010-09-03 18:39:40 +020020#define DISTLBWALKPRB (1<<6)
Pavel Machekaa134f12008-04-08 10:49:03 +020021
22/* GART cache control register bits. */
23#define INVGART (1<<0)
24#define GARTPTEERR (1<<1)
25
26/* K8 On-cpu GART registers */
27#define AMD64_GARTAPERTURECTL 0x90
28#define AMD64_GARTAPERTUREBASE 0x94
29#define AMD64_GARTTABLEBASE 0x98
30#define AMD64_GARTCACHECTL 0x9c
Pavel Machekaa134f12008-04-08 10:49:03 +020031
Joerg Roedel1d9b16d2008-11-27 18:39:15 +010032#ifdef CONFIG_GART_IOMMU
33extern int gart_iommu_aperture;
34extern int gart_iommu_aperture_allowed;
35extern int gart_iommu_aperture_disabled;
36
37extern void early_gart_iommu_check(void);
FUJITA Tomonoride957622009-11-10 19:46:14 +090038extern int gart_iommu_init(void);
Joerg Roedel1d9b16d2008-11-27 18:39:15 +010039extern void __init gart_parse_options(char *);
40extern void gart_iommu_hole_init(void);
41
42#else
43#define gart_iommu_aperture 0
44#define gart_iommu_aperture_allowed 0
45#define gart_iommu_aperture_disabled 1
46
47static inline void early_gart_iommu_check(void)
48{
49}
Joerg Roedel1d9b16d2008-11-27 18:39:15 +010050static inline void gart_parse_options(char *options)
51{
52}
53static inline void gart_iommu_hole_init(void)
54{
55}
56#endif
57
Joerg Roedel237a6222008-09-25 12:13:53 +020058extern int agp_amd64_init(void);
59
Borislav Petkov260133a2010-09-03 18:39:40 +020060static inline void gart_set_size_and_enable(struct pci_dev *dev, u32 order)
61{
62 u32 ctl;
63
64 /*
65 * Don't enable translation but enable GART IO and CPU accesses.
66 * Also, set DISTLBWALKPRB since GART tables memory is UC.
67 */
68 ctl = DISTLBWALKPRB | order << 1;
69
70 pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl);
71}
72
Pavel Machek3bb6fbf2008-04-15 12:43:57 +020073static inline void enable_gart_translation(struct pci_dev *dev, u64 addr)
74{
75 u32 tmp, ctl;
76
77 /* address of the mappings table */
78 addr >>= 12;
79 tmp = (u32) addr<<4;
80 tmp &= ~0xf;
81 pci_write_config_dword(dev, AMD64_GARTTABLEBASE, tmp);
82
83 /* Enable GART translation for this hammer. */
84 pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl);
85 ctl |= GARTEN;
86 ctl &= ~(DISGARTCPU | DISGARTIO);
87 pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl);
88}
89
Pavel Machek0abbc782008-05-20 16:27:17 +020090static inline int aperture_valid(u64 aper_base, u32 aper_size, u32 min_size)
91{
92 if (!aper_base)
93 return 0;
94
95 if (aper_base + aper_size > 0x100000000ULL) {
Adam Jackson9b156842008-09-29 14:52:03 -040096 printk(KERN_INFO "Aperture beyond 4GB. Ignoring.\n");
Pavel Machek0abbc782008-05-20 16:27:17 +020097 return 0;
98 }
99 if (e820_any_mapped(aper_base, aper_base + aper_size, E820_RAM)) {
Adam Jackson9b156842008-09-29 14:52:03 -0400100 printk(KERN_INFO "Aperture pointing to e820 RAM. Ignoring.\n");
Pavel Machek0abbc782008-05-20 16:27:17 +0200101 return 0;
102 }
103 if (aper_size < min_size) {
Adam Jackson9b156842008-09-29 14:52:03 -0400104 printk(KERN_INFO "Aperture too small (%d MB) than (%d MB)\n",
Pavel Machek0abbc782008-05-20 16:27:17 +0200105 aper_size>>20, min_size>>20);
106 return 0;
107 }
108
109 return 1;
110}
111
H. Peter Anvin1965aae2008-10-22 22:26:29 -0700112#endif /* _ASM_X86_GART_H */