blob: 4eebc67773d28a6e9c80f7c66504fecc9127a201 [file] [log] [blame]
Sergei Shtylyovf138e542015-10-01 02:02:27 +03001/*
2 * Device Tree Source for the Porter board
3 *
4 * Copyright (C) 2015 Cogent Embedded, Inc.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/dts-v1/;
12#include "r8a7791.dtsi"
Sergei Shtylyovb941a5c2015-10-07 02:05:41 +030013#include <dt-bindings/gpio/gpio.h>
Sergei Shtylyovf138e542015-10-01 02:02:27 +030014
15/ {
16 model = "Porter";
17 compatible = "renesas,porter", "renesas,r8a7791";
18
19 aliases {
20 serial0 = &scif0;
21 };
22
23 chosen {
Sergei Shtylyov08770982015-10-06 01:51:01 +030024 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
Sergei Shtylyovf138e542015-10-01 02:02:27 +030025 stdout-path = &scif0;
26 };
27
28 memory@40000000 {
29 device_type = "memory";
30 reg = <0 0x40000000 0 0x40000000>;
31 };
32
33 memory@200000000 {
34 device_type = "memory";
35 reg = <2 0x00000000 0 0x40000000>;
36 };
Sergei Shtylyovb941a5c2015-10-07 02:05:41 +030037
38 vcc_sdhi0: regulator@0 {
39 compatible = "regulator-fixed";
40
41 regulator-name = "SDHI0 Vcc";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
44 regulator-always-on;
45 };
46
47 vccq_sdhi0: regulator@1 {
48 compatible = "regulator-gpio";
49
50 regulator-name = "SDHI0 VccQ";
51 regulator-min-microvolt = <1800000>;
52 regulator-max-microvolt = <3300000>;
53
54 gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
55 gpios-states = <1>;
56 states = <3300000 1
57 1800000 0>;
58 };
59
60 vcc_sdhi2: regulator@2 {
61 compatible = "regulator-fixed";
62
63 regulator-name = "SDHI2 Vcc";
64 regulator-min-microvolt = <3300000>;
65 regulator-max-microvolt = <3300000>;
66 regulator-always-on;
67 };
68
69 vccq_sdhi2: regulator@3 {
70 compatible = "regulator-gpio";
71
72 regulator-name = "SDHI2 VccQ";
73 regulator-min-microvolt = <1800000>;
74 regulator-max-microvolt = <3300000>;
75
76 gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
77 gpios-states = <1>;
78 states = <3300000 1
79 1800000 0>;
80 };
Sergei Shtylyovf138e542015-10-01 02:02:27 +030081};
82
83&extal_clk {
84 clock-frequency = <20000000>;
85};
86
87&pfc {
88 scif0_pins: serial0 {
89 renesas,groups = "scif0_data_d";
90 renesas,function = "scif0";
91 };
Sergei Shtylyov08770982015-10-06 01:51:01 +030092
93 ether_pins: ether {
94 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
95 renesas,function = "eth";
96 };
97
98 phy1_pins: phy1 {
99 renesas,groups = "intc_irq0";
100 renesas,function = "intc";
101 };
Sergei Shtylyovb941a5c2015-10-07 02:05:41 +0300102
103 sdhi0_pins: sd0 {
104 renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
105 renesas,function = "sdhi0";
106 };
107
108 sdhi2_pins: sd2 {
109 renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
110 renesas,function = "sdhi2";
111 };
Sergei Shtylyovd6b94032015-10-09 00:44:18 +0300112
Sergei Shtylyov2685a2c2015-10-10 00:40:31 +0300113 qspi_pins: spi0 {
114 renesas,groups = "qspi_ctrl", "qspi_data4";
115 renesas,function = "qspi";
116 };
117
Sergei Shtylyovd6b94032015-10-09 00:44:18 +0300118 i2c2_pins: i2c2 {
119 renesas,groups = "i2c2";
120 renesas,function = "i2c2";
121 };
Sergei Shtylyov778f2e72015-10-09 00:45:49 +0300122
123 vin0_pins: vin0 {
124 renesas,groups = "vin0_data8", "vin0_clk";
125 renesas,function = "vin0";
126 };
Sergei Shtylyovf138e542015-10-01 02:02:27 +0300127};
128
129&scif0 {
130 pinctrl-0 = <&scif0_pins>;
131 pinctrl-names = "default";
132
133 status = "okay";
134};
Sergei Shtylyov08770982015-10-06 01:51:01 +0300135
136&ether {
137 pinctrl-0 = <&ether_pins &phy1_pins>;
138 pinctrl-names = "default";
139
140 phy-handle = <&phy1>;
141 renesas,ether-link-active-low;
142 status = "ok";
143
144 phy1: ethernet-phy@1 {
145 reg = <1>;
146 interrupt-parent = <&irqc0>;
147 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
148 micrel,led-mode = <1>;
149 };
150};
Sergei Shtylyovb941a5c2015-10-07 02:05:41 +0300151
152&sdhi0 {
153 pinctrl-0 = <&sdhi0_pins>;
154 pinctrl-names = "default";
155
156 vmmc-supply = <&vcc_sdhi0>;
157 vqmmc-supply = <&vccq_sdhi0>;
158 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
159 wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
160 status = "okay";
161};
162
163&sdhi2 {
164 pinctrl-0 = <&sdhi2_pins>;
165 pinctrl-names = "default";
166
167 vmmc-supply = <&vcc_sdhi2>;
168 vqmmc-supply = <&vccq_sdhi2>;
169 cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
170 status = "okay";
171};
Sergei Shtylyovefbb05c22015-10-08 01:00:06 +0300172
Sergei Shtylyov2685a2c2015-10-10 00:40:31 +0300173&qspi {
174 pinctrl-0 = <&qspi_pins>;
175 pinctrl-names = "default";
176
177 status = "okay";
178
179 flash@0 {
180 #address-cells = <1>;
181 #size-cells = <1>;
182 compatible = "spansion,s25fl512s", "jedec,spi-nor";
183 reg = <0>;
184 spi-max-frequency = <30000000>;
185 spi-tx-bus-width = <4>;
186 spi-rx-bus-width = <4>;
187 m25p,fast-read;
188
189 partition@0 {
190 label = "loader_prg";
191 reg = <0x00000000 0x00040000>;
192 read-only;
193 };
194 partition@40000 {
195 label = "user_prg";
196 reg = <0x00040000 0x00400000>;
197 read-only;
198 };
199 partition@440000 {
200 label = "flash_fs";
201 reg = <0x00440000 0x03bc0000>;
202 };
203 };
204};
205
Sergei Shtylyovd6b94032015-10-09 00:44:18 +0300206&i2c2 {
207 pinctrl-0 = <&i2c2_pins>;
208 pinctrl-names = "default";
209
210 status = "okay";
211 clock-frequency = <400000>;
Sergei Shtylyov778f2e72015-10-09 00:45:49 +0300212
213 composite-in@20 {
214 compatible = "adi,adv7180";
215 reg = <0x20>;
216 remote = <&vin0>;
217
218 port {
219 adv7180: endpoint {
220 bus-width = <8>;
221 remote-endpoint = <&vin0ep>;
222 };
223 };
224 };
Sergei Shtylyovd6b94032015-10-09 00:44:18 +0300225};
226
Sergei Shtylyovefbb05c22015-10-08 01:00:06 +0300227&sata0 {
228 status = "okay";
229};
Sergei Shtylyov778f2e72015-10-09 00:45:49 +0300230
231/* composite video input */
232&vin0 {
233 status = "ok";
234 pinctrl-0 = <&vin0_pins>;
235 pinctrl-names = "default";
236
237 port {
238 #address-cells = <1>;
239 #size-cells = <0>;
240
241 vin0ep: endpoint {
242 remote-endpoint = <&adv7180>;
243 bus-width = <8>;
244 };
245 };
246};