Maxim Levitsky | e5f710c | 2010-03-19 17:22:54 +0200 | [diff] [blame] | 1 | config MTD_NAND_ECC |
| 2 | tristate |
| 3 | |
| 4 | config MTD_NAND_ECC_SMC |
| 5 | bool "NAND ECC Smart Media byte order" |
| 6 | depends on MTD_NAND_ECC |
| 7 | default n |
| 8 | help |
| 9 | Software ECC according to the Smart Media Specification. |
| 10 | The original Linux implementation had byte 0 and 1 swapped. |
| 11 | |
Maxim Levitsky | 5869d2c | 2010-06-02 18:22:48 +0300 | [diff] [blame] | 12 | |
| 13 | menuconfig MTD_NAND |
| 14 | tristate "NAND Device Support" |
| 15 | depends on MTD |
| 16 | select MTD_NAND_IDS |
| 17 | select MTD_NAND_ECC |
| 18 | help |
| 19 | This enables support for accessing all type of NAND flash |
| 20 | devices. For further information see |
| 21 | <http://www.linux-mtd.infradead.org/doc/nand.html>. |
| 22 | |
Jan Engelhardt | ec98c68 | 2007-04-19 16:21:41 -0500 | [diff] [blame] | 23 | if MTD_NAND |
| 24 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | config MTD_NAND_VERIFY_WRITE |
| 26 | bool "Verify NAND page writes" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | help |
| 28 | This adds an extra check when data is written to the flash. The |
| 29 | NAND flash device internally checks only bits transitioning |
| 30 | from 1 to 0. There is a rare possibility that even though the |
| 31 | device thinks the write was successful, a bit could have been |
Matt LaPlante | 0950960 | 2006-10-03 22:31:37 +0200 | [diff] [blame] | 32 | flipped accidentally due to device wear or something else. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 34 | config MTD_NAND_BCH |
| 35 | tristate |
| 36 | select BCH |
| 37 | depends on MTD_NAND_ECC_BCH |
| 38 | default MTD_NAND |
| 39 | |
| 40 | config MTD_NAND_ECC_BCH |
| 41 | bool "Support software BCH ECC" |
| 42 | default n |
| 43 | help |
| 44 | This enables support for software BCH error correction. Binary BCH |
| 45 | codes are more powerful and cpu intensive than traditional Hamming |
| 46 | ECC codes. They are used with NAND devices requiring more than 1 bit |
| 47 | of error correction. |
| 48 | |
Maxim Levitsky | 9fc51a3 | 2010-02-22 20:39:39 +0200 | [diff] [blame] | 49 | config MTD_SM_COMMON |
Maxim Levitsky | 9fc51a3 | 2010-02-22 20:39:39 +0200 | [diff] [blame] | 50 | tristate |
| 51 | default n |
| 52 | |
Thomas Gleixner | 1cf9827 | 2007-04-17 18:30:57 +0100 | [diff] [blame] | 53 | config MTD_NAND_MUSEUM_IDS |
| 54 | bool "Enable chip ids for obsolete ancient NAND devices" |
Thomas Gleixner | 1cf9827 | 2007-04-17 18:30:57 +0100 | [diff] [blame] | 55 | default n |
| 56 | help |
| 57 | Enable this option only when your board has first generation |
| 58 | NAND chips (page size 256 byte, erase size 4-8KiB). The IDs |
| 59 | of these chips were reused by later, larger chips. |
| 60 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 61 | config MTD_NAND_AUTCPU12 |
| 62 | tristate "SmartMediaCard on autronix autcpu12 board" |
Jan Engelhardt | ec98c68 | 2007-04-19 16:21:41 -0500 | [diff] [blame] | 63 | depends on ARCH_AUTCPU12 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 64 | help |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 65 | This enables the driver for the autronix autcpu12 board to |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | access the SmartMediaCard. |
| 67 | |
Jason Roberts | ce08259 | 2010-05-13 15:57:33 +0100 | [diff] [blame] | 68 | config MTD_NAND_DENALI |
| 69 | depends on PCI |
| 70 | tristate "Support Denali NAND controller on Intel Moorestown" |
| 71 | help |
| 72 | Enable the driver for NAND flash on Intel Moorestown, using the |
| 73 | Denali NAND controller core. |
| 74 | |
| 75 | config MTD_NAND_DENALI_SCRATCH_REG_ADDR |
| 76 | hex "Denali NAND size scratch register address" |
| 77 | default "0xFF108018" |
Karl Beldan | 1df6206 | 2010-06-12 12:25:13 +0200 | [diff] [blame] | 78 | depends on MTD_NAND_DENALI |
Jason Roberts | ce08259 | 2010-05-13 15:57:33 +0100 | [diff] [blame] | 79 | help |
| 80 | Some platforms place the NAND chip size in a scratch register |
| 81 | because (some versions of) the driver aren't able to automatically |
| 82 | determine the size of certain chips. Set the address of the |
| 83 | scratch register here to enable this feature. On Intel Moorestown |
| 84 | boards, the scratch register is at 0xFF108018. |
| 85 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 86 | config MTD_NAND_H1900 |
| 87 | tristate "iPAQ H1900 flash" |
Arnd Bergmann | 57468a6 | 2011-10-01 22:03:46 +0200 | [diff] [blame] | 88 | depends on ARCH_PXA && BROKEN |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 89 | help |
| 90 | This enables the driver for the iPAQ h1900 flash. |
| 91 | |
Mike Rapoport | aaf7ea2 | 2008-10-15 08:38:49 +0200 | [diff] [blame] | 92 | config MTD_NAND_GPIO |
| 93 | tristate "GPIO NAND Flash driver" |
David Woodhouse | 7d28e0d | 2008-10-20 09:24:43 +0100 | [diff] [blame] | 94 | depends on GENERIC_GPIO && ARM |
Mike Rapoport | aaf7ea2 | 2008-10-15 08:38:49 +0200 | [diff] [blame] | 95 | help |
| 96 | This enables a GPIO based NAND flash driver. |
| 97 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 98 | config MTD_NAND_SPIA |
| 99 | tristate "NAND Flash device on SPIA board" |
Jan Engelhardt | ec98c68 | 2007-04-19 16:21:41 -0500 | [diff] [blame] | 100 | depends on ARCH_P720T |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 101 | help |
| 102 | If you had to ask, you don't have one. Say 'N'. |
| 103 | |
Jonathan McDowell | 3d12c0c | 2006-05-21 18:11:55 +0100 | [diff] [blame] | 104 | config MTD_NAND_AMS_DELTA |
| 105 | tristate "NAND Flash device on Amstrad E3" |
Jan Engelhardt | ec98c68 | 2007-04-19 16:21:41 -0500 | [diff] [blame] | 106 | depends on MACH_AMS_DELTA |
Janusz Krzysztofik | 494f45d | 2010-12-15 12:58:15 +0100 | [diff] [blame] | 107 | default y |
Jonathan McDowell | 3d12c0c | 2006-05-21 18:11:55 +0100 | [diff] [blame] | 108 | help |
| 109 | Support for NAND flash on Amstrad E3 (Delta). |
| 110 | |
Vimal Singh | 67ce04b | 2009-05-12 13:47:03 -0700 | [diff] [blame] | 111 | config MTD_NAND_OMAP2 |
Jan Weitzel | 46a00d8 | 2011-07-20 09:28:04 +0200 | [diff] [blame] | 112 | tristate "NAND Flash device on OMAP2, OMAP3 and OMAP4" |
Shubhrajyoti D | 12f049b | 2011-11-16 10:48:00 +0530 | [diff] [blame] | 113 | depends on ARCH_OMAP2PLUS |
Vimal Singh | 67ce04b | 2009-05-12 13:47:03 -0700 | [diff] [blame] | 114 | help |
Jan Weitzel | 46a00d8 | 2011-07-20 09:28:04 +0200 | [diff] [blame] | 115 | Support for NAND flash on Texas Instruments OMAP2, OMAP3 and OMAP4 |
| 116 | platforms. |
Vimal Singh | 67ce04b | 2009-05-12 13:47:03 -0700 | [diff] [blame] | 117 | |
Ivan Djelic | 0e618ef | 2012-04-30 12:17:18 +0200 | [diff] [blame] | 118 | config MTD_NAND_OMAP_BCH |
| 119 | depends on MTD_NAND && MTD_NAND_OMAP2 && ARCH_OMAP3 |
| 120 | bool "Enable support for hardware BCH error correction" |
| 121 | default n |
| 122 | select BCH |
| 123 | select BCH_CONST_PARAMS |
| 124 | help |
| 125 | Support for hardware BCH error correction. |
| 126 | |
| 127 | choice |
| 128 | prompt "BCH error correction capability" |
| 129 | depends on MTD_NAND_OMAP_BCH |
| 130 | |
| 131 | config MTD_NAND_OMAP_BCH8 |
| 132 | bool "8 bits / 512 bytes (recommended)" |
| 133 | help |
| 134 | Support correcting up to 8 bitflips per 512-byte block. |
| 135 | This will use 13 bytes of spare area per 512 bytes of page data. |
| 136 | This is the recommended mode, as 4-bit mode does not work |
| 137 | on some OMAP3 revisions, due to a hardware bug. |
| 138 | |
| 139 | config MTD_NAND_OMAP_BCH4 |
| 140 | bool "4 bits / 512 bytes" |
| 141 | help |
| 142 | Support correcting up to 4 bitflips per 512-byte block. |
| 143 | This will use 7 bytes of spare area per 512 bytes of page data. |
| 144 | Note that this mode does not work on some OMAP3 revisions, due to a |
| 145 | hardware bug. Please check your OMAP datasheet before selecting this |
| 146 | mode. |
| 147 | |
| 148 | endchoice |
| 149 | |
| 150 | if MTD_NAND_OMAP_BCH |
| 151 | config BCH_CONST_M |
| 152 | default 13 |
| 153 | config BCH_CONST_T |
| 154 | default 4 if MTD_NAND_OMAP_BCH4 |
| 155 | default 8 if MTD_NAND_OMAP_BCH8 |
| 156 | endif |
| 157 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 158 | config MTD_NAND_IDS |
| 159 | tristate |
| 160 | |
Maxim Levitsky | 67e054e | 2010-02-22 20:39:42 +0200 | [diff] [blame] | 161 | config MTD_NAND_RICOH |
| 162 | tristate "Ricoh xD card reader" |
| 163 | default n |
Randy Dunlap | f696aa4 | 2010-03-11 09:10:32 -0800 | [diff] [blame] | 164 | depends on PCI |
Maxim Levitsky | 67e054e | 2010-02-22 20:39:42 +0200 | [diff] [blame] | 165 | select MTD_SM_COMMON |
| 166 | help |
| 167 | Enable support for Ricoh R5C852 xD card reader |
| 168 | You also need to enable ether |
| 169 | NAND SSFDC (SmartMedia) read only translation layer' or new |
| 170 | expermental, readwrite |
| 171 | 'SmartMedia/xD new translation layer' |
| 172 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 173 | config MTD_NAND_AU1550 |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 174 | tristate "Au1550/1200 NAND support" |
Manuel Lauss | 376638603 | 2011-08-12 11:39:45 +0200 | [diff] [blame] | 175 | depends on MIPS_ALCHEMY |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 176 | help |
| 177 | This enables the driver for the NAND flash controller on the |
| 178 | AMD/Alchemy 1550 SOC. |
| 179 | |
Bryan Wu | b37bde1 | 2007-10-02 13:56:05 -0700 | [diff] [blame] | 180 | config MTD_NAND_BF5XX |
| 181 | tristate "Blackfin on-chip NAND Flash Controller driver" |
Kyle Spaans | 8c1a115 | 2010-06-08 09:48:22 -0400 | [diff] [blame] | 182 | depends on BF54x || BF52x |
Bryan Wu | b37bde1 | 2007-10-02 13:56:05 -0700 | [diff] [blame] | 183 | help |
| 184 | This enables the Blackfin on-chip NAND flash controller |
| 185 | |
| 186 | No board specific support is done by this driver, each board |
| 187 | must advertise a platform_device for the driver to attach. |
| 188 | |
| 189 | This driver can also be built as a module. If so, the module |
| 190 | will be called bf5xx-nand. |
| 191 | |
| 192 | config MTD_NAND_BF5XX_HWECC |
| 193 | bool "BF5XX NAND Hardware ECC" |
Mike Frysinger | a0dd201 | 2008-07-30 12:35:02 -0700 | [diff] [blame] | 194 | default y |
Bryan Wu | b37bde1 | 2007-10-02 13:56:05 -0700 | [diff] [blame] | 195 | depends on MTD_NAND_BF5XX |
| 196 | help |
| 197 | Enable the use of the BF5XX's internal ECC generator when |
| 198 | using NAND. |
| 199 | |
Mike Frysinger | fcb90ba | 2008-07-30 12:35:01 -0700 | [diff] [blame] | 200 | config MTD_NAND_BF5XX_BOOTROM_ECC |
| 201 | bool "Use Blackfin BootROM ECC Layout" |
| 202 | default n |
| 203 | depends on MTD_NAND_BF5XX_HWECC |
| 204 | help |
| 205 | If you wish to modify NAND pages and allow the Blackfin on-chip |
| 206 | BootROM to boot from them, say Y here. This is only necessary |
| 207 | if you are booting U-Boot out of NAND and you wish to update |
| 208 | U-Boot from Linux' userspace. Otherwise, you should say N here. |
| 209 | |
| 210 | If unsure, say N. |
| 211 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 212 | config MTD_NAND_RTC_FROM4 |
| 213 | tristate "Renesas Flash ROM 4-slot interface board (FROM_BOARD4)" |
Jan Engelhardt | ec98c68 | 2007-04-19 16:21:41 -0500 | [diff] [blame] | 214 | depends on SH_SOLUTION_ENGINE |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 215 | select REED_SOLOMON |
| 216 | select REED_SOLOMON_DEC8 |
Adrian Bunk | 1605cd3 | 2006-11-22 05:38:11 +0100 | [diff] [blame] | 217 | select BITREVERSE |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 218 | help |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 219 | This enables the driver for the Renesas Technology AG-AND |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 220 | flash interface board (FROM_BOARD4) |
| 221 | |
| 222 | config MTD_NAND_PPCHAMELEONEVB |
| 223 | tristate "NAND Flash device on PPChameleonEVB board" |
Jan Engelhardt | ec98c68 | 2007-04-19 16:21:41 -0500 | [diff] [blame] | 224 | depends on PPCHAMELEONEVB && BROKEN |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 225 | help |
| 226 | This enables the NAND flash driver on the PPChameleon EVB Board. |
| 227 | |
| 228 | config MTD_NAND_S3C2410 |
Peter Korsgaard | 9dbc090 | 2009-06-07 06:04:23 -0700 | [diff] [blame] | 229 | tristate "NAND Flash support for Samsung S3C SoCs" |
Kukjin Kim | b130d5c | 2012-02-03 14:29:23 +0900 | [diff] [blame] | 230 | depends on ARCH_S3C24XX || ARCH_S3C64XX |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 231 | help |
Peter Korsgaard | 9dbc090 | 2009-06-07 06:04:23 -0700 | [diff] [blame] | 232 | This enables the NAND flash controller on the S3C24xx and S3C64xx |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 233 | SoCs |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 234 | |
Egry Gábor | 4992a9e | 2006-05-12 17:35:02 +0100 | [diff] [blame] | 235 | No board specific support is done by this driver, each board |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 236 | must advertise a platform_device for the driver to attach. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 237 | |
| 238 | config MTD_NAND_S3C2410_DEBUG |
Peter Korsgaard | 9dbc090 | 2009-06-07 06:04:23 -0700 | [diff] [blame] | 239 | bool "Samsung S3C NAND driver debug" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 240 | depends on MTD_NAND_S3C2410 |
| 241 | help |
Peter Korsgaard | 9dbc090 | 2009-06-07 06:04:23 -0700 | [diff] [blame] | 242 | Enable debugging of the S3C NAND driver |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 243 | |
| 244 | config MTD_NAND_S3C2410_HWECC |
Peter Korsgaard | 9dbc090 | 2009-06-07 06:04:23 -0700 | [diff] [blame] | 245 | bool "Samsung S3C NAND Hardware ECC" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 246 | depends on MTD_NAND_S3C2410 |
| 247 | help |
Peter Korsgaard | 9dbc090 | 2009-06-07 06:04:23 -0700 | [diff] [blame] | 248 | Enable the use of the controller's internal ECC generator when |
| 249 | using NAND. Early versions of the chips have had problems with |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 250 | incorrect ECC generation, and if using these, the default of |
| 251 | software ECC is preferable. |
| 252 | |
Sean MacLennan | a808ad3 | 2008-12-10 13:16:34 +0000 | [diff] [blame] | 253 | config MTD_NAND_NDFC |
| 254 | tristate "NDFC NanD Flash Controller" |
| 255 | depends on 4xx |
| 256 | select MTD_NAND_ECC_SMC |
| 257 | help |
| 258 | NDFC Nand Flash Controllers are integrated in IBM/AMCC's 4xx SoCs |
| 259 | |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 260 | config MTD_NAND_S3C2410_CLKSTOP |
Peter Korsgaard | 9dbc090 | 2009-06-07 06:04:23 -0700 | [diff] [blame] | 261 | bool "Samsung S3C NAND IDLE clock stop" |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 262 | depends on MTD_NAND_S3C2410 |
| 263 | default n |
| 264 | help |
| 265 | Stop the clock to the NAND controller when there is no chip |
| 266 | selected to save power. This will mean there is a small delay |
| 267 | when the is NAND chip selected or released, but will save |
| 268 | approximately 5mA of power when there is nothing happening. |
| 269 | |
Leo (Hao) Chen | 266dead | 2009-10-09 19:13:08 -0700 | [diff] [blame] | 270 | config MTD_NAND_BCM_UMI |
| 271 | tristate "NAND Flash support for BCM Reference Boards" |
Kyle Spaans | 8c1a115 | 2010-06-08 09:48:22 -0400 | [diff] [blame] | 272 | depends on ARCH_BCMRING |
Leo (Hao) Chen | 266dead | 2009-10-09 19:13:08 -0700 | [diff] [blame] | 273 | help |
| 274 | This enables the NAND flash controller on the BCM UMI block. |
| 275 | |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 276 | No board specific support is done by this driver, each board |
Leo (Hao) Chen | 266dead | 2009-10-09 19:13:08 -0700 | [diff] [blame] | 277 | must advertise a platform_device for the driver to attach. |
| 278 | |
| 279 | config MTD_NAND_BCM_UMI_HWCS |
| 280 | bool "BCM UMI NAND Hardware CS" |
| 281 | depends on MTD_NAND_BCM_UMI |
| 282 | help |
| 283 | Enable the use of the BCM UMI block's internal CS using NAND. |
| 284 | This should only be used if you know the external NAND CS can toggle. |
| 285 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 286 | config MTD_NAND_DISKONCHIP |
| 287 | tristate "DiskOnChip 2000, Millennium and Millennium Plus (NAND reimplementation) (EXPERIMENTAL)" |
Jan Engelhardt | ec98c68 | 2007-04-19 16:21:41 -0500 | [diff] [blame] | 288 | depends on EXPERIMENTAL |
Richard Weinberger | 9310da0 | 2012-02-07 01:22:50 +0100 | [diff] [blame] | 289 | depends on HAS_IOMEM |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 290 | select REED_SOLOMON |
| 291 | select REED_SOLOMON_DEC16 |
| 292 | help |
| 293 | This is a reimplementation of M-Systems DiskOnChip 2000, |
| 294 | Millennium and Millennium Plus as a standard NAND device driver, |
| 295 | as opposed to the earlier self-contained MTD device drivers. |
| 296 | This should enable, among other things, proper JFFS2 operation on |
| 297 | these devices. |
| 298 | |
| 299 | config MTD_NAND_DISKONCHIP_PROBE_ADVANCED |
| 300 | bool "Advanced detection options for DiskOnChip" |
| 301 | depends on MTD_NAND_DISKONCHIP |
| 302 | help |
| 303 | This option allows you to specify nonstandard address at which to |
| 304 | probe for a DiskOnChip, or to change the detection options. You |
| 305 | are unlikely to need any of this unless you are using LinuxBIOS. |
| 306 | Say 'N'. |
| 307 | |
| 308 | config MTD_NAND_DISKONCHIP_PROBE_ADDRESS |
| 309 | hex "Physical address of DiskOnChip" if MTD_NAND_DISKONCHIP_PROBE_ADVANCED |
| 310 | depends on MTD_NAND_DISKONCHIP |
| 311 | default "0" |
| 312 | ---help--- |
| 313 | By default, the probe for DiskOnChip devices will look for a |
| 314 | DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. |
| 315 | This option allows you to specify a single address at which to probe |
| 316 | for the device, which is useful if you have other devices in that |
| 317 | range which get upset when they are probed. |
| 318 | |
| 319 | (Note that on PowerPC, the normal probe will only check at |
| 320 | 0xE4000000.) |
| 321 | |
| 322 | Normally, you should leave this set to zero, to allow the probe at |
| 323 | the normal addresses. |
| 324 | |
| 325 | config MTD_NAND_DISKONCHIP_PROBE_HIGH |
| 326 | bool "Probe high addresses" |
| 327 | depends on MTD_NAND_DISKONCHIP_PROBE_ADVANCED |
| 328 | help |
| 329 | By default, the probe for DiskOnChip devices will look for a |
| 330 | DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. |
| 331 | This option changes to make it probe between 0xFFFC8000 and |
| 332 | 0xFFFEE000. Unless you are using LinuxBIOS, this is unlikely to be |
| 333 | useful to you. Say 'N'. |
| 334 | |
| 335 | config MTD_NAND_DISKONCHIP_BBTWRITE |
| 336 | bool "Allow BBT writes on DiskOnChip Millennium and 2000TSOP" |
| 337 | depends on MTD_NAND_DISKONCHIP |
| 338 | help |
| 339 | On DiskOnChip devices shipped with the INFTL filesystem (Millennium |
| 340 | and 2000 TSOP/Alon), Linux reserves some space at the end of the |
| 341 | device for the Bad Block Table (BBT). If you have existing INFTL |
| 342 | data on your device (created by non-Linux tools such as M-Systems' |
| 343 | DOS drivers), your data might overlap the area Linux wants to use for |
| 344 | the BBT. If this is a concern for you, leave this option disabled and |
| 345 | Linux will not write BBT data into this area. |
| 346 | The downside of leaving this option disabled is that if bad blocks |
| 347 | are detected by Linux, they will not be recorded in the BBT, which |
| 348 | could cause future problems. |
| 349 | Once you enable this option, new filesystems (INFTL or others, created |
| 350 | in Linux or other operating systems) will not use the reserved area. |
| 351 | The only reason not to enable this option is to prevent damage to |
| 352 | preexisting filesystems. |
| 353 | Even if you leave this disabled, you can enable BBT writes at module |
| 354 | load time (assuming you build diskonchip as a module) with the module |
| 355 | parameter "inftl_bbt_write=1". |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 356 | |
Mike Dunn | 570469f | 2012-01-03 16:05:44 -0800 | [diff] [blame] | 357 | config MTD_NAND_DOCG4 |
| 358 | tristate "Support for DiskOnChip G4 (EXPERIMENTAL)" |
| 359 | depends on EXPERIMENTAL |
| 360 | select BCH |
| 361 | select BITREVERSE |
| 362 | help |
| 363 | Support for diskonchip G4 nand flash, found in various smartphones and |
| 364 | PDAs, among them the Palm Treo680, HTC Prophet and Wizard, Toshiba |
| 365 | Portege G900, Asus P526, and O2 XDA Zinc. |
| 366 | |
| 367 | With this driver you will be able to use UBI and create a ubifs on the |
| 368 | device, so you may wish to consider enabling UBI and UBIFS as well. |
| 369 | |
| 370 | These devices ship with the Mys/Sandisk SAFTL formatting, for which |
| 371 | there is currently no mtd parser, so you may want to use command line |
| 372 | partitioning to segregate write-protected blocks. On the Treo680, the |
| 373 | first five erase blocks (256KiB each) are write-protected, followed |
| 374 | by the block containing the saftl partition table. This is probably |
| 375 | typical. |
| 376 | |
Adrian Bunk | 54af6b4 | 2006-03-31 02:29:43 -0800 | [diff] [blame] | 377 | config MTD_NAND_SHARPSL |
| 378 | tristate "Support for NAND Flash on Sharp SL Series (C7xx + others)" |
Jan Engelhardt | ec98c68 | 2007-04-19 16:21:41 -0500 | [diff] [blame] | 379 | depends on ARCH_PXA |
Adrian Bunk | 54af6b4 | 2006-03-31 02:29:43 -0800 | [diff] [blame] | 380 | |
David Woodhouse | c45aa05 | 2006-10-22 02:17:05 +0100 | [diff] [blame] | 381 | config MTD_NAND_CAFE |
Segher Boessenkool | 8c61b7a | 2007-05-02 12:18:49 +0200 | [diff] [blame] | 382 | tristate "NAND support for OLPC CAFÉ chip" |
| 383 | depends on PCI |
| 384 | select REED_SOLOMON |
| 385 | select REED_SOLOMON_DEC16 |
| 386 | help |
Adrian Bunk | 8f46c52 | 2007-06-22 01:52:08 +0200 | [diff] [blame] | 387 | Use NAND flash attached to the CAFÉ chip designed for the OLPC |
Segher Boessenkool | 8c61b7a | 2007-05-02 12:18:49 +0200 | [diff] [blame] | 388 | laptop. |
David Woodhouse | c45aa05 | 2006-10-22 02:17:05 +0100 | [diff] [blame] | 389 | |
David Woodhouse | 179fdc3 | 2006-05-11 22:35:28 +0100 | [diff] [blame] | 390 | config MTD_NAND_CS553X |
| 391 | tristate "NAND support for CS5535/CS5536 (AMD Geode companion chip)" |
Yinghai Lu | 4272ebf | 2009-01-29 15:14:46 -0800 | [diff] [blame] | 392 | depends on X86_32 |
David Woodhouse | f41a5f8 | 2006-05-16 13:11:47 +0100 | [diff] [blame] | 393 | help |
| 394 | The CS553x companion chips for the AMD Geode processor |
| 395 | include NAND flash controllers with built-in hardware ECC |
| 396 | capabilities; enabling this option will allow you to use |
| 397 | these. The driver will check the MSRs to verify that the |
| 398 | controller is enabled for NAND, and currently requires that |
| 399 | the controller be in MMIO mode. |
| 400 | |
Pavel Machek | 4737f09 | 2009-06-05 00:44:53 +0200 | [diff] [blame] | 401 | If you say "m", the module will be called cs553x_nand. |
David Woodhouse | f41a5f8 | 2006-05-16 13:11:47 +0100 | [diff] [blame] | 402 | |
Håvard Skinnemoen | d4f4c0a | 2008-06-06 18:04:52 +0200 | [diff] [blame] | 403 | config MTD_NAND_ATMEL |
David Brownell | bd5a438 | 2008-07-03 23:40:19 -0700 | [diff] [blame] | 404 | tristate "Support for NAND Flash / SmartMedia on AT91 and AVR32" |
Håvard Skinnemoen | 984290d | 2008-06-06 18:04:57 +0200 | [diff] [blame] | 405 | depends on ARCH_AT91 || AVR32 |
Andrew Victor | 42cb140 | 2006-10-19 18:24:35 +0200 | [diff] [blame] | 406 | help |
| 407 | Enables support for NAND Flash / Smart Media Card interface |
Håvard Skinnemoen | 984290d | 2008-06-06 18:04:57 +0200 | [diff] [blame] | 408 | on Atmel AT91 and AVR32 processors. |
Richard Genoud | 77f5492 | 2008-04-23 19:51:14 +0200 | [diff] [blame] | 409 | choice |
Håvard Skinnemoen | 984290d | 2008-06-06 18:04:57 +0200 | [diff] [blame] | 410 | prompt "ECC management for NAND Flash / SmartMedia on AT91 / AVR32" |
Håvard Skinnemoen | d4f4c0a | 2008-06-06 18:04:52 +0200 | [diff] [blame] | 411 | depends on MTD_NAND_ATMEL |
Richard Genoud | 77f5492 | 2008-04-23 19:51:14 +0200 | [diff] [blame] | 412 | |
Håvard Skinnemoen | d4f4c0a | 2008-06-06 18:04:52 +0200 | [diff] [blame] | 413 | config MTD_NAND_ATMEL_ECC_HW |
Richard Genoud | 77f5492 | 2008-04-23 19:51:14 +0200 | [diff] [blame] | 414 | bool "Hardware ECC" |
Håvard Skinnemoen | 984290d | 2008-06-06 18:04:57 +0200 | [diff] [blame] | 415 | depends on ARCH_AT91SAM9263 || ARCH_AT91SAM9260 || AVR32 |
Richard Genoud | 77f5492 | 2008-04-23 19:51:14 +0200 | [diff] [blame] | 416 | help |
Håvard Skinnemoen | d4f4c0a | 2008-06-06 18:04:52 +0200 | [diff] [blame] | 417 | Use hardware ECC instead of software ECC when the chip |
| 418 | supports it. |
| 419 | |
Richard Genoud | 77f5492 | 2008-04-23 19:51:14 +0200 | [diff] [blame] | 420 | The hardware ECC controller is capable of single bit error |
| 421 | correction and 2-bit random detection per page. |
| 422 | |
| 423 | NB : hardware and software ECC schemes are incompatible. |
| 424 | If you switch from one to another, you'll have to erase your |
| 425 | mtd partition. |
| 426 | |
| 427 | If unsure, say Y |
| 428 | |
Håvard Skinnemoen | d4f4c0a | 2008-06-06 18:04:52 +0200 | [diff] [blame] | 429 | config MTD_NAND_ATMEL_ECC_SOFT |
Richard Genoud | 77f5492 | 2008-04-23 19:51:14 +0200 | [diff] [blame] | 430 | bool "Software ECC" |
| 431 | help |
Håvard Skinnemoen | d4f4c0a | 2008-06-06 18:04:52 +0200 | [diff] [blame] | 432 | Use software ECC. |
Richard Genoud | 77f5492 | 2008-04-23 19:51:14 +0200 | [diff] [blame] | 433 | |
| 434 | NB : hardware and software ECC schemes are incompatible. |
| 435 | If you switch from one to another, you'll have to erase your |
| 436 | mtd partition. |
| 437 | |
Håvard Skinnemoen | d4f4c0a | 2008-06-06 18:04:52 +0200 | [diff] [blame] | 438 | config MTD_NAND_ATMEL_ECC_NONE |
Richard Genoud | 77f5492 | 2008-04-23 19:51:14 +0200 | [diff] [blame] | 439 | bool "No ECC (testing only, DANGEROUS)" |
| 440 | depends on DEBUG_KERNEL |
| 441 | help |
| 442 | No ECC will be used. |
| 443 | It's not a good idea and it should be reserved for testing |
| 444 | purpose only. |
| 445 | |
| 446 | If unsure, say N |
| 447 | |
Richard Genoud | 77f5492 | 2008-04-23 19:51:14 +0200 | [diff] [blame] | 448 | endchoice |
Andrew Victor | 42cb140 | 2006-10-19 18:24:35 +0200 | [diff] [blame] | 449 | |
eric miao | fe69af0 | 2008-02-14 15:48:23 +0800 | [diff] [blame] | 450 | config MTD_NAND_PXA3xx |
Mike Rapoport | 82a72d1 | 2009-02-17 13:54:46 +0200 | [diff] [blame] | 451 | tristate "Support for NAND flash devices on PXA3xx" |
Kyle Spaans | 8c1a115 | 2010-06-08 09:48:22 -0400 | [diff] [blame] | 452 | depends on PXA3xx || ARCH_MMP |
eric miao | fe69af0 | 2008-02-14 15:48:23 +0800 | [diff] [blame] | 453 | help |
| 454 | This enables the driver for the NAND flash device found on |
| 455 | PXA3xx processors |
| 456 | |
Roland Stigge | 2944a44 | 2012-06-07 12:22:15 +0200 | [diff] [blame^] | 457 | config MTD_NAND_SLC_LPC32XX |
| 458 | tristate "NXP LPC32xx SLC Controller" |
| 459 | depends on ARCH_LPC32XX |
| 460 | help |
| 461 | Enables support for NXP's LPC32XX SLC (i.e. for Single Level Cell |
| 462 | chips) NAND controller. This is the default for the PHYTEC 3250 |
| 463 | reference board which contains a NAND256R3A2CZA6 chip. |
| 464 | |
| 465 | Please check the actual NAND chip connected and its support |
| 466 | by the SLC NAND controller. |
| 467 | |
Mike Rapoport | 54d33c4 | 2007-04-22 08:53:21 +0300 | [diff] [blame] | 468 | config MTD_NAND_CM_X270 |
| 469 | tristate "Support for NAND Flash on CM-X270 modules" |
Kyle Spaans | 8c1a115 | 2010-06-08 09:48:22 -0400 | [diff] [blame] | 470 | depends on MACH_ARMCORE |
Mike Rapoport | 54d33c4 | 2007-04-22 08:53:21 +0300 | [diff] [blame] | 471 | |
Egor Martovetsky | 846fc31 | 2007-11-28 18:37:31 -0600 | [diff] [blame] | 472 | config MTD_NAND_PASEMI |
| 473 | tristate "NAND support for PA Semi PWRficient" |
Kyle Spaans | 8c1a115 | 2010-06-08 09:48:22 -0400 | [diff] [blame] | 474 | depends on PPC_PASEMI |
Egor Martovetsky | 846fc31 | 2007-11-28 18:37:31 -0600 | [diff] [blame] | 475 | help |
| 476 | Enables support for NAND Flash interface on PA Semi PWRficient |
| 477 | based boards |
Mike Rapoport | 54d33c4 | 2007-04-22 08:53:21 +0300 | [diff] [blame] | 478 | |
Ian Molton | ec43b81 | 2008-07-15 16:04:22 +0100 | [diff] [blame] | 479 | config MTD_NAND_TMIO |
| 480 | tristate "NAND Flash device on Toshiba Mobile IO Controller" |
Kyle Spaans | 8c1a115 | 2010-06-08 09:48:22 -0400 | [diff] [blame] | 481 | depends on MFD_TMIO |
Ian Molton | ec43b81 | 2008-07-15 16:04:22 +0100 | [diff] [blame] | 482 | help |
| 483 | Support for NAND flash connected to a Toshiba Mobile IO |
| 484 | Controller in some PDAs, including the Sharp SL6000x. |
| 485 | |
Adrian Bunk | 54af6b4 | 2006-03-31 02:29:43 -0800 | [diff] [blame] | 486 | config MTD_NAND_NANDSIM |
| 487 | tristate "Support for NAND Flash Simulator" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 488 | help |
David Woodhouse | f41a5f8 | 2006-05-16 13:11:47 +0100 | [diff] [blame] | 489 | The simulator may simulate various NAND flash chips for the |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 490 | MTD nand layer. |
Adrian Bunk | 54af6b4 | 2006-03-31 02:29:43 -0800 | [diff] [blame] | 491 | |
Huang Shijie | 157550ff | 2011-09-08 10:47:11 +0800 | [diff] [blame] | 492 | config MTD_NAND_GPMI_NAND |
| 493 | bool "GPMI NAND Flash Controller driver" |
Huang Shijie | 9013bb4 | 2012-05-04 21:42:06 -0400 | [diff] [blame] | 494 | depends on MTD_NAND && (SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q) |
Huang Shijie | 157550ff | 2011-09-08 10:47:11 +0800 | [diff] [blame] | 495 | help |
| 496 | Enables NAND Flash support for IMX23 or IMX28. |
| 497 | The GPMI controller is very powerful, with the help of BCH |
| 498 | module, it can do the hardware ECC. The GPMI supports several |
| 499 | NAND flashs at the same time. The GPMI may conflicts with other |
| 500 | block, such as SD card. So pay attention to it when you enable |
| 501 | the GPMI. |
| 502 | |
Vitaly Wool | 711fdf6 | 2007-05-06 19:31:18 +0400 | [diff] [blame] | 503 | config MTD_NAND_PLATFORM |
| 504 | tristate "Support for generic platform NAND driver" |
Richard Weinberger | 9310da0 | 2012-02-07 01:22:50 +0100 | [diff] [blame] | 505 | depends on HAS_IOMEM |
Vitaly Wool | 711fdf6 | 2007-05-06 19:31:18 +0400 | [diff] [blame] | 506 | help |
| 507 | This implements a generic NAND driver for on-SOC platform |
| 508 | devices. You will need to provide platform-specific functions |
| 509 | via platform_data. |
| 510 | |
Jörn Engel | e208520 | 2007-08-29 17:57:11 +0200 | [diff] [blame] | 511 | config MTD_ALAUDA |
Dave Jones | 4226594 | 2007-10-17 23:33:12 +0200 | [diff] [blame] | 512 | tristate "MTD driver for Olympus MAUSB-10 and Fujifilm DPC-R1" |
Kyle Spaans | 8c1a115 | 2010-06-08 09:48:22 -0400 | [diff] [blame] | 513 | depends on USB |
Jörn Engel | e208520 | 2007-08-29 17:57:11 +0200 | [diff] [blame] | 514 | help |
| 515 | These two (and possibly other) Alauda-based cardreaders for |
| 516 | SmartMedia and xD allow raw flash access. |
Vitaly Wool | 711fdf6 | 2007-05-06 19:31:18 +0400 | [diff] [blame] | 517 | |
Tzachi Perelstein | 2a1dba2 | 2007-10-17 01:10:40 +0200 | [diff] [blame] | 518 | config MTD_NAND_ORION |
| 519 | tristate "NAND Flash support for Marvell Orion SoC" |
Kyle Spaans | 8c1a115 | 2010-06-08 09:48:22 -0400 | [diff] [blame] | 520 | depends on PLAT_ORION |
Tzachi Perelstein | 2a1dba2 | 2007-10-17 01:10:40 +0200 | [diff] [blame] | 521 | help |
| 522 | This enables the NAND flash controller on Orion machines. |
| 523 | |
| 524 | No board specific support is done by this driver, each board |
| 525 | must advertise a platform_device for the driver to attach. |
| 526 | |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 527 | config MTD_NAND_FSL_ELBC |
| 528 | tristate "NAND support for Freescale eLBC controllers" |
Kyle Spaans | 8c1a115 | 2010-06-08 09:48:22 -0400 | [diff] [blame] | 529 | depends on PPC_OF |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 530 | select FSL_LBC |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 531 | help |
| 532 | Various Freescale chips, including the 8313, include a NAND Flash |
| 533 | Controller Module with built-in hardware ECC capabilities. |
| 534 | Enabling this option will enable you to use this to control |
| 535 | external NAND devices. |
| 536 | |
Prabhakar Kushwaha | 8277188 | 2012-03-15 11:04:23 +0530 | [diff] [blame] | 537 | config MTD_NAND_FSL_IFC |
| 538 | tristate "NAND support for Freescale IFC controller" |
| 539 | depends on MTD_NAND && FSL_SOC |
| 540 | select FSL_IFC |
| 541 | help |
| 542 | Various Freescale chips e.g P1010, include a NAND Flash machine |
| 543 | with built-in hardware ECC capabilities. |
| 544 | Enabling this option will enable you to use this to control |
| 545 | external NAND devices. |
| 546 | |
Anton Vorontsov | 5c249c5 | 2008-03-11 22:33:13 +0300 | [diff] [blame] | 547 | config MTD_NAND_FSL_UPM |
| 548 | tristate "Support for NAND on Freescale UPM" |
Kyle Spaans | 8c1a115 | 2010-06-08 09:48:22 -0400 | [diff] [blame] | 549 | depends on PPC_83xx || PPC_85xx |
Anton Vorontsov | 5c249c5 | 2008-03-11 22:33:13 +0300 | [diff] [blame] | 550 | select FSL_LBC |
| 551 | help |
| 552 | Enables support for NAND Flash chips wired onto Freescale PowerPC |
| 553 | processor localbus with User-Programmable Machine support. |
| 554 | |
Anatolij Gustschin | bb315f7 | 2010-02-15 18:35:05 +0100 | [diff] [blame] | 555 | config MTD_NAND_MPC5121_NFC |
| 556 | tristate "MPC5121 built-in NAND Flash Controller support" |
| 557 | depends on PPC_MPC512x |
| 558 | help |
| 559 | This enables the driver for the NAND flash controller on the |
| 560 | MPC5121 SoC. |
| 561 | |
Sascha Hauer | 34f6e15 | 2008-09-02 17:16:59 +0200 | [diff] [blame] | 562 | config MTD_NAND_MXC |
| 563 | tristate "MXC NAND support" |
Richard Zhao | 7685167 | 2011-03-03 16:40:02 +0800 | [diff] [blame] | 564 | depends on IMX_HAVE_PLATFORM_MXC_NAND |
Sascha Hauer | 34f6e15 | 2008-09-02 17:16:59 +0200 | [diff] [blame] | 565 | help |
| 566 | This enables the driver for the NAND flash controller on the |
| 567 | MXC processors. |
| 568 | |
Alessandro Rubini | 6323471 | 2009-07-29 18:51:56 +0200 | [diff] [blame] | 569 | config MTD_NAND_NOMADIK |
| 570 | tristate "ST Nomadik 8815 NAND support" |
| 571 | depends on ARCH_NOMADIK |
| 572 | help |
| 573 | Driver for the NAND flash controller on the Nomadik, with ECC. |
| 574 | |
Yoshihiro Shimoda | 6028aa0 | 2008-10-14 21:23:26 +0900 | [diff] [blame] | 575 | config MTD_NAND_SH_FLCTL |
| 576 | tristate "Support for NAND on Renesas SuperH FLCTL" |
Kyle Spaans | 8c1a115 | 2010-06-08 09:48:22 -0400 | [diff] [blame] | 577 | depends on SUPERH || ARCH_SHMOBILE |
Yoshihiro Shimoda | 6028aa0 | 2008-10-14 21:23:26 +0900 | [diff] [blame] | 578 | help |
| 579 | Several Renesas SuperH CPU has FLCTL. This option enables support |
Magnus Damm | b79c7ad | 2010-02-02 13:01:25 +0900 | [diff] [blame] | 580 | for NAND Flash using FLCTL. |
Yoshihiro Shimoda | 6028aa0 | 2008-10-14 21:23:26 +0900 | [diff] [blame] | 581 | |
David Brownell | ff4569c | 2009-03-04 12:01:37 -0800 | [diff] [blame] | 582 | config MTD_NAND_DAVINCI |
| 583 | tristate "Support NAND on DaVinci SoC" |
| 584 | depends on ARCH_DAVINCI |
| 585 | help |
| 586 | Enable the driver for NAND flash chips on Texas Instruments |
| 587 | DaVinci processors. |
| 588 | |
Atsushi Nemoto | 64fb65b | 2009-03-04 12:01:34 -0800 | [diff] [blame] | 589 | config MTD_NAND_TXX9NDFMC |
| 590 | tristate "NAND Flash support for TXx9 SoC" |
| 591 | depends on SOC_TX4938 || SOC_TX4939 |
| 592 | help |
| 593 | This enables the NAND flash controller on the TXx9 SoCs. |
| 594 | |
Wolfgang Grandegger | 1b57819 | 2009-03-25 11:48:38 +0100 | [diff] [blame] | 595 | config MTD_NAND_SOCRATES |
| 596 | tristate "Support for NAND on Socrates board" |
Kyle Spaans | 8c1a115 | 2010-06-08 09:48:22 -0400 | [diff] [blame] | 597 | depends on SOCRATES |
Wolfgang Grandegger | 1b57819 | 2009-03-25 11:48:38 +0100 | [diff] [blame] | 598 | help |
| 599 | Enables support for NAND Flash chips wired onto Socrates board. |
| 600 | |
David Woodhouse | bb6a7755 | 2010-01-01 12:16:47 +0000 | [diff] [blame] | 601 | config MTD_NAND_NUC900 |
| 602 | tristate "Support for NAND on Nuvoton NUC9xx/w90p910 evaluation boards." |
Jamie Iles | 6a8a98b | 2011-05-23 10:23:43 +0100 | [diff] [blame] | 603 | depends on ARCH_W90X900 |
Wan ZongShun | 8bff82c | 2009-07-10 15:17:27 +0800 | [diff] [blame] | 604 | help |
| 605 | This enables the driver for the NAND Flash on evaluation board based |
David Woodhouse | bb6a7755 | 2010-01-01 12:16:47 +0000 | [diff] [blame] | 606 | on w90p910 / NUC9xx. |
Wan ZongShun | 8bff82c | 2009-07-10 15:17:27 +0800 | [diff] [blame] | 607 | |
Lars-Peter Clausen | ba01d6e | 2010-07-17 11:15:29 +0000 | [diff] [blame] | 608 | config MTD_NAND_JZ4740 |
| 609 | tristate "Support for JZ4740 SoC NAND controller" |
| 610 | depends on MACH_JZ4740 |
| 611 | help |
| 612 | Enables support for NAND Flash on JZ4740 SoC based boards. |
| 613 | |
Linus Walleij | 6c009ab | 2010-09-13 00:35:22 +0200 | [diff] [blame] | 614 | config MTD_NAND_FSMC |
| 615 | tristate "Support for NAND on ST Micros FSMC" |
| 616 | depends on PLAT_SPEAR || PLAT_NOMADIK || MACH_U300 |
| 617 | help |
| 618 | Enables support for NAND Flash chips on the ST Microelectronics |
| 619 | Flexible Static Memory Controller (FSMC) |
| 620 | |
Jan Engelhardt | ec98c68 | 2007-04-19 16:21:41 -0500 | [diff] [blame] | 621 | endif # MTD_NAND |