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Christian Daudt8ac49e02012-11-19 09:46:10 -08001/*
Markus Mayere3b62ff2013-08-02 13:12:21 -07002 * Copyright (C) 2012-2013 Broadcom Corporation
Christian Daudt8ac49e02012-11-19 09:46:10 -08003 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
Matt Porter5401cc42013-06-06 01:41:35 -040014#include <dt-bindings/interrupt-controller/arm-gic.h>
15#include <dt-bindings/interrupt-controller/irq.h>
16
Alex Elder2bb94532014-02-14 12:29:20 -060017#include "dt-bindings/clock/bcm281xx.h"
18
Matt Porter74375652013-06-06 01:41:34 -040019#include "skeleton.dtsi"
Christian Daudt8ac49e02012-11-19 09:46:10 -080020
21/ {
22 model = "BCM11351 SoC";
Christian Daudt15e22dd2013-07-30 16:27:10 -070023 compatible = "brcm,bcm11351";
Christian Daudt8ac49e02012-11-19 09:46:10 -080024 interrupt-parent = <&gic>;
25
26 chosen {
27 bootargs = "console=ttyS0,115200n8";
28 };
29
30 gic: interrupt-controller@3ff00100 {
31 compatible = "arm,cortex-a9-gic";
32 #interrupt-cells = <3>;
33 #address-cells = <0>;
34 interrupt-controller;
35 reg = <0x3ff01000 0x1000>,
36 <0x3ff00100 0x100>;
37 };
38
Christian Daudt7f6c62e2013-03-13 15:05:37 -070039 smc@0x3404c000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -070040 compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
Matt Porterd22dc5e2013-06-11 14:45:58 -040041 reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
Christian Daudt7f6c62e2013-03-13 15:05:37 -070042 };
43
Christian Daudt8ac49e02012-11-19 09:46:10 -080044 uart@3e000000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -070045 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
Christian Daudt8ac49e02012-11-19 09:46:10 -080046 status = "disabled";
47 reg = <0x3e000000 0x1000>;
Alex Elder2bb94532014-02-14 12:29:20 -060048 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB>;
Matt Porter5401cc42013-06-06 01:41:35 -040049 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
Christian Daudt8ac49e02012-11-19 09:46:10 -080050 reg-shift = <2>;
51 reg-io-width = <4>;
52 };
53
Tim Kryger84491c02013-09-23 10:49:57 -070054 uart@3e001000 {
55 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
56 status = "disabled";
57 reg = <0x3e001000 0x1000>;
Alex Elder2bb94532014-02-14 12:29:20 -060058 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB2>;
Tim Kryger84491c02013-09-23 10:49:57 -070059 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
60 reg-shift = <2>;
61 reg-io-width = <4>;
62 };
63
64 uart@3e002000 {
65 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
66 status = "disabled";
67 reg = <0x3e002000 0x1000>;
Alex Elder2bb94532014-02-14 12:29:20 -060068 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>;
Tim Kryger84491c02013-09-23 10:49:57 -070069 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
70 reg-shift = <2>;
71 reg-io-width = <4>;
72 };
73
74 uart@3e003000 {
75 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
76 status = "disabled";
77 reg = <0x3e003000 0x1000>;
Alex Elder2bb94532014-02-14 12:29:20 -060078 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB4>;
Tim Kryger84491c02013-09-23 10:49:57 -070079 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
80 reg-shift = <2>;
81 reg-io-width = <4>;
82 };
83
Christian Daudt8ac49e02012-11-19 09:46:10 -080084 L2: l2-cache {
Christian Daudt15e22dd2013-07-30 16:27:10 -070085 compatible = "brcm,bcm11351-a2-pl310-cache";
Christian Daudt3b656fe2013-05-09 22:21:01 +010086 reg = <0x3ff20000 0x1000>;
87 cache-unified;
88 cache-level = <2>;
Christian Daudt8ac49e02012-11-19 09:46:10 -080089 };
Christian Daudt5f03dc22013-03-13 14:27:28 -070090
Markus Mayere3b62ff2013-08-02 13:12:21 -070091 watchdog@35002f40 {
92 compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
93 reg = <0x35002f40 0x6c>;
94 };
95
Christian Daudt5f03dc22013-03-13 14:27:28 -070096 timer@35006000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -070097 compatible = "brcm,kona-timer";
Christian Daudt5f03dc22013-03-13 14:27:28 -070098 reg = <0x35006000 0x1000>;
Matt Porter5401cc42013-06-06 01:41:35 -040099 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
Alex Elder2bb94532014-02-14 12:29:20 -0600100 clocks = <&aon_ccu BCM281XX_AON_CCU_HUB_TIMER>;
Christian Daudt5f03dc22013-03-13 14:27:28 -0700101 };
102
Markus Mayerd394c7b2013-09-10 11:07:03 -0700103 gpio: gpio@35003000 {
104 compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";
105 reg = <0x35003000 0x800>;
106 interrupts =
107 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
108 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
109 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
110 GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
111 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
112 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
113 #gpio-cells = <2>;
114 #interrupt-cells = <2>;
115 gpio-controller;
116 interrupt-controller;
117 };
118
Christian Daudtd7358f82013-08-07 22:37:47 -0700119 sdio1: sdio@3f180000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -0700120 compatible = "brcm,kona-sdhci";
Christian Daudt2dbfe742013-05-10 00:10:07 -0700121 reg = <0x3f180000 0x10000>;
Matt Porter9c0dae02013-09-19 13:18:26 -0400122 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
Alex Elder2bb94532014-02-14 12:29:20 -0600123 clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO1>;
Christian Daudt2dbfe742013-05-10 00:10:07 -0700124 status = "disabled";
125 };
126
Christian Daudtd7358f82013-08-07 22:37:47 -0700127 sdio2: sdio@3f190000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -0700128 compatible = "brcm,kona-sdhci";
Christian Daudt2dbfe742013-05-10 00:10:07 -0700129 reg = <0x3f190000 0x10000>;
Matt Porter9c0dae02013-09-19 13:18:26 -0400130 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
Alex Elder2bb94532014-02-14 12:29:20 -0600131 clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO2>;
Christian Daudt2dbfe742013-05-10 00:10:07 -0700132 status = "disabled";
133 };
134
Christian Daudtd7358f82013-08-07 22:37:47 -0700135 sdio3: sdio@3f1a0000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -0700136 compatible = "brcm,kona-sdhci";
Christian Daudt2dbfe742013-05-10 00:10:07 -0700137 reg = <0x3f1a0000 0x10000>;
Matt Porter9c0dae02013-09-19 13:18:26 -0400138 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
Alex Elder2bb94532014-02-14 12:29:20 -0600139 clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO3>;
Christian Daudt2dbfe742013-05-10 00:10:07 -0700140 status = "disabled";
141 };
142
Christian Daudtd7358f82013-08-07 22:37:47 -0700143 sdio4: sdio@3f1b0000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -0700144 compatible = "brcm,kona-sdhci";
Christian Daudt2dbfe742013-05-10 00:10:07 -0700145 reg = <0x3f1b0000 0x10000>;
Matt Porter9c0dae02013-09-19 13:18:26 -0400146 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
Alex Elder2bb94532014-02-14 12:29:20 -0600147 clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO4>;
Christian Daudt2dbfe742013-05-10 00:10:07 -0700148 status = "disabled";
149 };
150
Sherman Yin67a57be2013-12-20 18:13:36 -0800151 pinctrl@35004800 {
152 compatible = "brcm,capri-pinctrl";
153 reg = <0x35004800 0x430>;
154 };
Linus Torvaldsf8a504c2014-01-30 18:08:27 -0800155
Tim Krygerdfc4334b2013-12-06 15:45:27 -0800156 i2c@3e016000 {
157 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
158 reg = <0x3e016000 0x80>;
159 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
160 #address-cells = <1>;
161 #size-cells = <0>;
Alex Elder2bb94532014-02-14 12:29:20 -0600162 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC1>;
Tim Krygerdfc4334b2013-12-06 15:45:27 -0800163 status = "disabled";
164 };
165
166 i2c@3e017000 {
167 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
168 reg = <0x3e017000 0x80>;
169 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
170 #address-cells = <1>;
171 #size-cells = <0>;
Alex Elder2bb94532014-02-14 12:29:20 -0600172 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC2>;
Tim Krygerdfc4334b2013-12-06 15:45:27 -0800173 status = "disabled";
174 };
175
176 i2c@3e018000 {
177 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
178 reg = <0x3e018000 0x80>;
179 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
180 #address-cells = <1>;
181 #size-cells = <0>;
Alex Elder2bb94532014-02-14 12:29:20 -0600182 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC3>;
Tim Krygerdfc4334b2013-12-06 15:45:27 -0800183 status = "disabled";
184 };
185
186 i2c@3500d000 {
187 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
188 reg = <0x3500d000 0x80>;
189 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
190 #address-cells = <1>;
191 #size-cells = <0>;
Alex Elder2bb94532014-02-14 12:29:20 -0600192 clocks = <&aon_ccu BCM281XX_AON_CCU_PMU_BSC>;
Tim Krygerdfc4334b2013-12-06 15:45:27 -0800193 status = "disabled";
194 };
195
Tim Kryger0bd898b2013-12-05 11:20:37 -0800196 clocks {
Alex Elder2bb94532014-02-14 12:29:20 -0600197 #address-cells = <1>;
198 #size-cells = <1>;
199 ranges;
200
201 root_ccu: root_ccu {
202 compatible = "brcm,bcm11351-root-ccu";
203 reg = <0x35001000 0x0f00>;
204 #clock-cells = <1>;
205 clock-output-names = "frac_1m";
Tim Kryger0bd898b2013-12-05 11:20:37 -0800206 };
207
Alex Elder2bb94532014-02-14 12:29:20 -0600208 hub_ccu: hub_ccu {
209 compatible = "brcm,bcm11351-hub-ccu";
210 reg = <0x34000000 0x0f00>;
211 #clock-cells = <1>;
212 clock-output-names = "tmon_1m";
Tim Kryger0bd898b2013-12-05 11:20:37 -0800213 };
214
Alex Elder2bb94532014-02-14 12:29:20 -0600215 aon_ccu: aon_ccu {
216 compatible = "brcm,bcm11351-aon-ccu";
217 reg = <0x35002000 0x0f00>;
218 #clock-cells = <1>;
219 clock-output-names = "hub_timer",
220 "pmu_bsc",
221 "pmu_bsc_var";
Tim Kryger0bd898b2013-12-05 11:20:37 -0800222 };
223
Alex Elder2bb94532014-02-14 12:29:20 -0600224 master_ccu: master_ccu {
225 compatible = "brcm,bcm11351-master-ccu";
226 reg = <0x3f001000 0x0f00>;
227 #clock-cells = <1>;
228 clock-output-names = "sdio1",
229 "sdio2",
230 "sdio3",
231 "sdio4",
232 "usb_ic",
233 "hsic2_48m",
234 "hsic2_12m";
Tim Kryger0bd898b2013-12-05 11:20:37 -0800235 };
236
Alex Elder2bb94532014-02-14 12:29:20 -0600237 slave_ccu: slave_ccu {
238 compatible = "brcm,bcm11351-slave-ccu";
239 reg = <0x3e011000 0x0f00>;
240 #clock-cells = <1>;
241 clock-output-names = "uartb",
242 "uartb2",
243 "uartb3",
244 "uartb4",
245 "ssp0",
246 "ssp2",
247 "bsc1",
248 "bsc2",
249 "bsc3",
250 "pwm";
Tim Kryger0bd898b2013-12-05 11:20:37 -0800251 };
252
Alex Elder2bb94532014-02-14 12:29:20 -0600253 ref_1m_clk: ref_1m {
Tim Kryger0bd898b2013-12-05 11:20:37 -0800254 #clock-cells = <0>;
Tim Kryger0bd898b2013-12-05 11:20:37 -0800255 compatible = "fixed-clock";
256 clock-frequency = <1000000>;
Tim Kryger0bd898b2013-12-05 11:20:37 -0800257 };
258
Alex Elder2bb94532014-02-14 12:29:20 -0600259 ref_32k_clk: ref_32k {
Tim Kryger0bd898b2013-12-05 11:20:37 -0800260 #clock-cells = <0>;
Alex Elder2bb94532014-02-14 12:29:20 -0600261 compatible = "fixed-clock";
262 clock-frequency = <32768>;
Tim Kryger0bd898b2013-12-05 11:20:37 -0800263 };
264
Alex Elder2bb94532014-02-14 12:29:20 -0600265 bbl_32k_clk: bbl_32k {
Tim Kryger0bd898b2013-12-05 11:20:37 -0800266 #clock-cells = <0>;
Alex Elder2bb94532014-02-14 12:29:20 -0600267 compatible = "fixed-clock";
268 clock-frequency = <32768>;
Tim Kryger0bd898b2013-12-05 11:20:37 -0800269 };
270
Alex Elder2bb94532014-02-14 12:29:20 -0600271 ref_13m_clk: ref_13m {
272 #clock-cells = <0>;
Tim Kryger0bd898b2013-12-05 11:20:37 -0800273 compatible = "fixed-clock";
274 clock-frequency = <13000000>;
Tim Kryger0bd898b2013-12-05 11:20:37 -0800275 };
276
Alex Elder2bb94532014-02-14 12:29:20 -0600277 var_13m_clk: var_13m {
278 #clock-cells = <0>;
Tim Kryger0bd898b2013-12-05 11:20:37 -0800279 compatible = "fixed-clock";
280 clock-frequency = <13000000>;
Alex Elder2bb94532014-02-14 12:29:20 -0600281 };
282
283 dft_19_5m_clk: dft_19_5m {
Tim Kryger0bd898b2013-12-05 11:20:37 -0800284 #clock-cells = <0>;
Alex Elder2bb94532014-02-14 12:29:20 -0600285 compatible = "fixed-clock";
286 clock-frequency = <19500000>;
287 };
288
289 ref_crystal_clk: ref_crystal {
290 #clock-cells = <0>;
291 compatible = "fixed-clock";
292 clock-frequency = <26000000>;
293 };
294
295 ref_cx40_clk: ref_cx40 {
296 #clock-cells = <0>;
297 compatible = "fixed-clock";
298 clock-frequency = <40000000>;
299 };
300
301 ref_52m_clk: ref_52m {
302 #clock-cells = <0>;
303 compatible = "fixed-clock";
304 clock-frequency = <52000000>;
305 };
306
307 var_52m_clk: var_52m {
308 #clock-cells = <0>;
309 compatible = "fixed-clock";
310 clock-frequency = <52000000>;
Tim Kryger0bd898b2013-12-05 11:20:37 -0800311 };
312
313 usb_otg_ahb_clk: usb_otg_ahb {
314 compatible = "fixed-clock";
315 clock-frequency = <52000000>;
316 #clock-cells = <0>;
317 };
Alex Elder2bb94532014-02-14 12:29:20 -0600318
319 ref_96m_clk: ref_96m {
320 #clock-cells = <0>;
321 compatible = "fixed-clock";
322 clock-frequency = <96000000>;
323 };
324
325 var_96m_clk: var_96m {
326 #clock-cells = <0>;
327 compatible = "fixed-clock";
328 clock-frequency = <96000000>;
329 };
330
331 ref_104m_clk: ref_104m {
332 #clock-cells = <0>;
333 compatible = "fixed-clock";
334 clock-frequency = <104000000>;
335 };
336
337 var_104m_clk: var_104m {
338 #clock-cells = <0>;
339 compatible = "fixed-clock";
340 clock-frequency = <104000000>;
341 };
342
343 ref_156m_clk: ref_156m {
344 #clock-cells = <0>;
345 compatible = "fixed-clock";
346 clock-frequency = <156000000>;
347 };
348
349 var_156m_clk: var_156m {
350 #clock-cells = <0>;
351 compatible = "fixed-clock";
352 clock-frequency = <156000000>;
353 };
354
355 ref_208m_clk: ref_208m {
356 #clock-cells = <0>;
357 compatible = "fixed-clock";
358 clock-frequency = <208000000>;
359 };
360
361 var_208m_clk: var_208m {
362 #clock-cells = <0>;
363 compatible = "fixed-clock";
364 clock-frequency = <208000000>;
365 };
366
367 ref_312m_clk: ref_312m {
368 #clock-cells = <0>;
369 compatible = "fixed-clock";
370 clock-frequency = <312000000>;
371 };
372
373 var_312m_clk: var_312m {
374 #clock-cells = <0>;
375 compatible = "fixed-clock";
376 clock-frequency = <312000000>;
377 };
Tim Kryger0bd898b2013-12-05 11:20:37 -0800378 };
Matt Porterd97f7992013-12-19 09:23:10 -0500379
380 usbotg: usb@3f120000 {
381 compatible = "snps,dwc2";
382 reg = <0x3f120000 0x10000>;
383 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
384 clocks = <&usb_otg_ahb_clk>;
385 clock-names = "otg";
386 phys = <&usbphy>;
387 phy-names = "usb2-phy";
388 status = "disabled";
389 };
390
391 usbphy: usb-phy@3f130000 {
392 compatible = "brcm,kona-usb2-phy";
393 reg = <0x3f130000 0x28>;
394 #phy-cells = <0>;
395 status = "disabled";
396 };
Christian Daudt8ac49e02012-11-19 09:46:10 -0800397};