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Mark Browne1a3c742011-05-06 09:45:13 +09001/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
2 *
3 * Copyright 2011 Wolfson Microelectronics plc
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6 * Copyright 2011 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/list.h>
16#include <linux/serial_core.h>
17#include <linux/platform_device.h>
18#include <linux/fb.h>
19#include <linux/io.h>
20#include <linux/init.h>
21#include <linux/gpio.h>
Mark Brown66211f92011-12-29 18:05:29 +090022#include <linux/leds.h>
Mark Browne1a3c742011-05-06 09:45:13 +090023#include <linux/delay.h>
Mark Brownfb7f60f2011-12-30 13:44:31 +090024#include <linux/mmc/host.h>
Mark Browne1a3c742011-05-06 09:45:13 +090025#include <linux/regulator/machine.h>
Mark Brownae24c262011-06-22 13:08:13 +090026#include <linux/regulator/fixed.h>
Mark Browne1a3c742011-05-06 09:45:13 +090027#include <linux/pwm_backlight.h>
28#include <linux/dm9000.h>
29#include <linux/gpio_keys.h>
30#include <linux/basic_mmio_gpio.h>
31#include <linux/spi/spi.h>
32
33#include <linux/i2c/pca953x.h>
Lukasz Majewski126625e2012-05-09 13:16:53 +020034#include <linux/platform_data/s3c-hsotg.h>
Mark Browne1a3c742011-05-06 09:45:13 +090035
36#include <video/platform_lcd.h>
37
38#include <linux/mfd/wm831x/core.h>
39#include <linux/mfd/wm831x/pdata.h>
Mark Brownae24c262011-06-22 13:08:13 +090040#include <linux/mfd/wm831x/irq.h>
Mark Browne1a3c742011-05-06 09:45:13 +090041#include <linux/mfd/wm831x/gpio.h>
42
Mark Brown8504a3c2011-12-02 14:29:07 +090043#include <sound/wm1250-ev1.h>
44
Jamie Iles774b51f2011-11-04 01:10:04 +000045#include <asm/hardware/vic.h>
Mark Browne1a3c742011-05-06 09:45:13 +090046#include <asm/mach/arch.h>
47#include <asm/mach-types.h>
48
Leela Krishna Amudala5a213a52012-08-08 09:44:49 +090049#include <video/samsung_fimd.h>
Mark Browne1a3c742011-05-06 09:45:13 +090050#include <mach/hardware.h>
51#include <mach/map.h>
52
Mark Browne1a3c742011-05-06 09:45:13 +090053#include <mach/regs-sys.h>
54#include <mach/regs-gpio.h>
55#include <mach/regs-modem.h>
Mark Brownd0f0b432011-08-19 22:40:07 +090056#include <mach/crag6410.h>
Mark Browne1a3c742011-05-06 09:45:13 +090057
Mark Browne1a3c742011-05-06 09:45:13 +090058#include <mach/regs-gpio-memport.h>
59
60#include <plat/regs-serial.h>
Mark Browne1a3c742011-05-06 09:45:13 +090061#include <plat/fb.h>
62#include <plat/sdhci.h>
63#include <plat/gpio-cfg.h>
Arnd Bergmann436d42c2012-08-24 15:22:12 +020064#include <linux/platform_data/spi-s3c64xx.h>
Mark Browne1a3c742011-05-06 09:45:13 +090065
66#include <plat/keypad.h>
67#include <plat/clock.h>
68#include <plat/devs.h>
69#include <plat/cpu.h>
70#include <plat/adc.h>
Arnd Bergmann436d42c2012-08-24 15:22:12 +020071#include <linux/platform_data/i2c-s3c2410.h>
Mark Browne1a3c742011-05-06 09:45:13 +090072#include <plat/pm.h>
73
Kukjin Kimb024043b2011-12-22 23:27:42 +010074#include "common.h"
75
Mark Browne1a3c742011-05-06 09:45:13 +090076/* serial port setup */
77
78#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
79#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
80#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
81
82static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
83 [0] = {
Mark Brownae24c262011-06-22 13:08:13 +090084 .hwport = 0,
85 .flags = 0,
86 .ucon = UCON,
87 .ulcon = ULCON,
88 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +090089 },
90 [1] = {
Mark Brownae24c262011-06-22 13:08:13 +090091 .hwport = 1,
92 .flags = 0,
93 .ucon = UCON,
94 .ulcon = ULCON,
95 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +090096 },
97 [2] = {
Mark Brownae24c262011-06-22 13:08:13 +090098 .hwport = 2,
99 .flags = 0,
100 .ucon = UCON,
101 .ulcon = ULCON,
102 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +0900103 },
104 [3] = {
Mark Brownae24c262011-06-22 13:08:13 +0900105 .hwport = 3,
106 .flags = 0,
107 .ucon = UCON,
108 .ulcon = ULCON,
109 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +0900110 },
111};
112
113static struct platform_pwm_backlight_data crag6410_backlight_data = {
114 .pwm_id = 0,
115 .max_brightness = 1000,
116 .dft_brightness = 600,
117 .pwm_period_ns = 100000, /* about 1kHz */
118};
119
120static struct platform_device crag6410_backlight_device = {
121 .name = "pwm-backlight",
122 .id = -1,
123 .dev = {
124 .parent = &s3c_device_timer[0].dev,
125 .platform_data = &crag6410_backlight_data,
126 },
127};
128
129static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
130{
131 pr_debug("%s: setting power %d\n", __func__, power);
132
133 if (power) {
134 gpio_set_value(S3C64XX_GPB(0), 1);
135 msleep(1);
136 s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
137 } else {
138 gpio_direction_output(S3C64XX_GPF(14), 0);
139 gpio_set_value(S3C64XX_GPB(0), 0);
140 }
141}
142
143static struct platform_device crag6410_lcd_powerdev = {
144 .name = "platform-lcd",
145 .id = -1,
146 .dev.parent = &s3c_device_fb.dev,
147 .dev.platform_data = &(struct plat_lcd_data) {
148 .set_power = crag6410_lcd_power_set,
149 },
150};
151
152/* 640x480 URT */
153static struct s3c_fb_pd_win crag6410_fb_win0 = {
Mark Browne1a3c742011-05-06 09:45:13 +0900154 .max_bpp = 32,
155 .default_bpp = 16,
Thomas Abraham79d3c412012-03-24 21:58:48 +0530156 .xres = 640,
157 .yres = 480,
Mark Browne1a3c742011-05-06 09:45:13 +0900158 .virtual_y = 480 * 2,
159 .virtual_x = 640,
160};
161
Thomas Abraham79d3c412012-03-24 21:58:48 +0530162static struct fb_videomode crag6410_lcd_timing = {
163 .left_margin = 150,
164 .right_margin = 80,
165 .upper_margin = 40,
166 .lower_margin = 5,
167 .hsync_len = 40,
168 .vsync_len = 5,
169 .xres = 640,
170 .yres = 480,
171};
172
Mark Browne1a3c742011-05-06 09:45:13 +0900173/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
Mark Brown70660e52012-07-19 14:45:26 +0900174static struct s3c_fb_platdata crag6410_lcd_pdata __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900175 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
Thomas Abraham79d3c412012-03-24 21:58:48 +0530176 .vtiming = &crag6410_lcd_timing,
Mark Browne1a3c742011-05-06 09:45:13 +0900177 .win[0] = &crag6410_fb_win0,
178 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
179 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
180};
181
182/* 2x6 keypad */
183
Mark Brown70660e52012-07-19 14:45:26 +0900184static uint32_t crag6410_keymap[] __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900185 /* KEY(row, col, keycode) */
186 KEY(0, 0, KEY_VOLUMEUP),
187 KEY(0, 1, KEY_HOME),
188 KEY(0, 2, KEY_VOLUMEDOWN),
189 KEY(0, 3, KEY_HELP),
190 KEY(0, 4, KEY_MENU),
191 KEY(0, 5, KEY_MEDIA),
192 KEY(1, 0, 232),
193 KEY(1, 1, KEY_DOWN),
194 KEY(1, 2, KEY_LEFT),
195 KEY(1, 3, KEY_UP),
196 KEY(1, 4, KEY_RIGHT),
197 KEY(1, 5, KEY_CAMERA),
198};
199
Mark Brown70660e52012-07-19 14:45:26 +0900200static struct matrix_keymap_data crag6410_keymap_data __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900201 .keymap = crag6410_keymap,
202 .keymap_size = ARRAY_SIZE(crag6410_keymap),
203};
204
Mark Brown70660e52012-07-19 14:45:26 +0900205static struct samsung_keypad_platdata crag6410_keypad_data __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900206 .keymap_data = &crag6410_keymap_data,
207 .rows = 2,
208 .cols = 6,
209};
210
211static struct gpio_keys_button crag6410_gpio_keys[] = {
212 [0] = {
213 .code = KEY_SUSPEND,
214 .gpio = S3C64XX_GPL(10), /* EINT 18 */
Mark Brownae24c262011-06-22 13:08:13 +0900215 .type = EV_KEY,
Mark Browne1a3c742011-05-06 09:45:13 +0900216 .wakeup = 1,
217 .active_low = 1,
218 },
Mark Brownae24c262011-06-22 13:08:13 +0900219 [1] = {
220 .code = SW_FRONT_PROXIMITY,
221 .gpio = S3C64XX_GPN(11), /* EINT 11 */
222 .type = EV_SW,
223 },
Mark Browne1a3c742011-05-06 09:45:13 +0900224};
225
226static struct gpio_keys_platform_data crag6410_gpio_keydata = {
227 .buttons = crag6410_gpio_keys,
228 .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
229};
230
231static struct platform_device crag6410_gpio_keydev = {
232 .name = "gpio-keys",
233 .id = 0,
234 .dev.platform_data = &crag6410_gpio_keydata,
235};
236
237static struct resource crag6410_dm9k_resource[] = {
Tushar Behera8ebf1482012-05-12 16:12:26 +0900238 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2),
239 [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 << 8), 2),
240 [2] = DEFINE_RES_NAMED(S3C_EINT(17), 1, NULL, IORESOURCE_IRQ \
241 | IORESOURCE_IRQ_HIGHLEVEL),
Mark Browne1a3c742011-05-06 09:45:13 +0900242};
243
244static struct dm9000_plat_data mini6410_dm9k_pdata = {
245 .flags = DM9000_PLATF_16BITONLY,
246};
247
248static struct platform_device crag6410_dm9k_device = {
249 .name = "dm9000",
250 .id = -1,
251 .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
252 .resource = crag6410_dm9k_resource,
253 .dev.platform_data = &mini6410_dm9k_pdata,
254};
255
256static struct resource crag6410_mmgpio_resource[] = {
Tushar Behera8ebf1482012-05-12 16:12:26 +0900257 [0] = DEFINE_RES_MEM_NAMED(S3C64XX_PA_XM0CSN4, 1, "dat"),
Mark Browne1a3c742011-05-06 09:45:13 +0900258};
259
260static struct platform_device crag6410_mmgpio = {
261 .name = "basic-mmio-gpio",
262 .id = -1,
263 .resource = crag6410_mmgpio_resource,
264 .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
265 .dev.platform_data = &(struct bgpio_pdata) {
Mark Brown91b60b12011-12-29 18:02:39 +0900266 .base = MMGPIO_GPIO_BASE,
Mark Browne1a3c742011-05-06 09:45:13 +0900267 },
268};
269
Mark Brownae24c262011-06-22 13:08:13 +0900270static struct platform_device speyside_device = {
271 .name = "speyside",
272 .id = -1,
273};
274
Mark Brown8c051ab2011-09-05 14:50:02 +0900275static struct platform_device lowland_device = {
276 .name = "lowland",
277 .id = -1,
278};
279
Mark Brown64142612011-11-30 13:30:27 +0000280static struct platform_device tobermory_device = {
281 .name = "tobermory",
Mark Brownae24c262011-06-22 13:08:13 +0900282 .id = -1,
283};
284
Mark Brownc5c32c92011-12-02 14:32:32 +0900285static struct platform_device littlemill_device = {
286 .name = "littlemill",
287 .id = -1,
288};
289
Mark Brown33229142012-11-28 07:30:18 +0900290static struct platform_device bells_wm2200_device = {
Mark Brown25752b72012-08-10 13:03:18 +0900291 .name = "bells",
292 .id = 0,
293};
294
Mark Brown33229142012-11-28 07:30:18 +0900295static struct platform_device bells_wm5102_device = {
Mark Brown25752b72012-08-10 13:03:18 +0900296 .name = "bells",
297 .id = 1,
298};
299
Mark Brown33229142012-11-28 07:30:18 +0900300static struct platform_device bells_wm5110_device = {
301 .name = "bells",
302 .id = 2,
303};
304
Mark Brownae24c262011-06-22 13:08:13 +0900305static struct regulator_consumer_supply wallvdd_consumers[] = {
Mark Brown554f01f2012-01-27 14:58:46 +0900306 REGULATOR_SUPPLY("SPKVDD", "1-001a"),
Mark Brownae24c262011-06-22 13:08:13 +0900307 REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
308 REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
Mark Brown4ed12b52011-08-31 08:03:11 +0900309 REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
310 REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
Mark Brown402f624b2012-04-04 09:21:15 -0700311
Mark Brown479535e2012-10-17 17:41:07 +0900312 REGULATOR_SUPPLY("SPKVDDL", "spi0.1"),
313 REGULATOR_SUPPLY("SPKVDDR", "spi0.1"),
314 REGULATOR_SUPPLY("SPKVDDL", "wm5102-codec"),
315 REGULATOR_SUPPLY("SPKVDDR", "wm5102-codec"),
316 REGULATOR_SUPPLY("SPKVDDL", "wm5110-codec"),
317 REGULATOR_SUPPLY("SPKVDDR", "wm5110-codec"),
318
Mark Brown402f624b2012-04-04 09:21:15 -0700319 REGULATOR_SUPPLY("DC1VDD", "0-0034"),
320 REGULATOR_SUPPLY("DC2VDD", "0-0034"),
321 REGULATOR_SUPPLY("DC3VDD", "0-0034"),
322 REGULATOR_SUPPLY("LDO1VDD", "0-0034"),
323 REGULATOR_SUPPLY("LDO2VDD", "0-0034"),
324 REGULATOR_SUPPLY("LDO4VDD", "0-0034"),
325 REGULATOR_SUPPLY("LDO5VDD", "0-0034"),
326 REGULATOR_SUPPLY("LDO6VDD", "0-0034"),
327 REGULATOR_SUPPLY("LDO7VDD", "0-0034"),
328 REGULATOR_SUPPLY("LDO8VDD", "0-0034"),
329 REGULATOR_SUPPLY("LDO9VDD", "0-0034"),
330 REGULATOR_SUPPLY("LDO10VDD", "0-0034"),
331 REGULATOR_SUPPLY("LDO11VDD", "0-0034"),
332
333 REGULATOR_SUPPLY("DC1VDD", "1-0034"),
334 REGULATOR_SUPPLY("DC2VDD", "1-0034"),
335 REGULATOR_SUPPLY("DC3VDD", "1-0034"),
Mark Brownae24c262011-06-22 13:08:13 +0900336};
337
338static struct regulator_init_data wallvdd_data = {
339 .constraints = {
340 .always_on = 1,
341 },
342 .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
343 .consumer_supplies = wallvdd_consumers,
344};
345
346static struct fixed_voltage_config wallvdd_pdata = {
347 .supply_name = "WALLVDD",
348 .microvolts = 5000000,
349 .init_data = &wallvdd_data,
350 .gpio = -EINVAL,
351};
352
353static struct platform_device wallvdd_device = {
354 .name = "reg-fixed-voltage",
355 .id = -1,
356 .dev = {
357 .platform_data = &wallvdd_pdata,
358 },
359};
360
Mark Browne1a3c742011-05-06 09:45:13 +0900361static struct platform_device *crag6410_devices[] __initdata = {
362 &s3c_device_hsmmc0,
Mark Browne1a3c742011-05-06 09:45:13 +0900363 &s3c_device_hsmmc2,
364 &s3c_device_i2c0,
365 &s3c_device_i2c1,
366 &s3c_device_fb,
367 &s3c_device_ohci,
368 &s3c_device_usb_hsotg,
Mark Browne1a3c742011-05-06 09:45:13 +0900369 &s3c_device_timer[0],
370 &s3c64xx_device_iis0,
371 &s3c64xx_device_iis1,
372 &samsung_asoc_dma,
373 &samsung_device_keypad,
374 &crag6410_gpio_keydev,
375 &crag6410_dm9k_device,
376 &s3c64xx_device_spi0,
377 &crag6410_mmgpio,
378 &crag6410_lcd_powerdev,
379 &crag6410_backlight_device,
Mark Brownae24c262011-06-22 13:08:13 +0900380 &speyside_device,
Mark Brown64142612011-11-30 13:30:27 +0000381 &tobermory_device,
Mark Brownc5c32c92011-12-02 14:32:32 +0900382 &littlemill_device,
Mark Brown8c051ab2011-09-05 14:50:02 +0900383 &lowland_device,
Mark Brown33229142012-11-28 07:30:18 +0900384 &bells_wm2200_device,
Mark Brown25752b72012-08-10 13:03:18 +0900385 &bells_wm5102_device,
386 &bells_wm5110_device,
Mark Brownae24c262011-06-22 13:08:13 +0900387 &wallvdd_device,
Mark Browne1a3c742011-05-06 09:45:13 +0900388};
389
390static struct pca953x_platform_data crag6410_pca_data = {
391 .gpio_base = PCA935X_GPIO_BASE,
Mark Brown6e11e0b2011-12-30 09:46:40 +0900392 .irq_base = -1,
Mark Browne1a3c742011-05-06 09:45:13 +0900393};
394
Mark Brown986afc92011-08-12 18:08:17 +0900395/* VDDARM is controlled by DVS1 connected to GPK(0) */
396static struct wm831x_buckv_pdata vddarm_pdata = {
397 .dvs_control_src = 1,
398 .dvs_gpio = S3C64XX_GPK(0),
399};
400
Mark Brown70660e52012-07-19 14:45:26 +0900401static struct regulator_consumer_supply vddarm_consumers[] __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900402 REGULATOR_SUPPLY("vddarm", NULL),
403};
404
Mark Brown70660e52012-07-19 14:45:26 +0900405static struct regulator_init_data vddarm __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900406 .constraints = {
407 .name = "VDDARM",
408 .min_uV = 1000000,
409 .max_uV = 1300000,
410 .always_on = 1,
411 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
412 },
413 .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
414 .consumer_supplies = vddarm_consumers,
Mark Brown35127292011-06-22 13:08:17 +0900415 .supply_regulator = "WALLVDD",
Mark Brown986afc92011-08-12 18:08:17 +0900416 .driver_data = &vddarm_pdata,
Mark Browne1a3c742011-05-06 09:45:13 +0900417};
418
Mark Brown70660e52012-07-19 14:45:26 +0900419static struct regulator_consumer_supply vddint_consumers[] __devinitdata = {
Mark Brown39cb2632011-12-08 10:52:19 +0900420 REGULATOR_SUPPLY("vddint", NULL),
421};
422
Mark Brown70660e52012-07-19 14:45:26 +0900423static struct regulator_init_data vddint __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900424 .constraints = {
425 .name = "VDDINT",
426 .min_uV = 1000000,
427 .max_uV = 1200000,
428 .always_on = 1,
429 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
430 },
Mark Brown39cb2632011-12-08 10:52:19 +0900431 .num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
432 .consumer_supplies = vddint_consumers,
433 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900434};
435
Mark Brown70660e52012-07-19 14:45:26 +0900436static struct regulator_init_data vddmem __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900437 .constraints = {
438 .name = "VDDMEM",
439 .always_on = 1,
440 },
441};
442
Mark Brown70660e52012-07-19 14:45:26 +0900443static struct regulator_init_data vddsys __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900444 .constraints = {
445 .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
446 .always_on = 1,
447 },
448};
449
Mark Brown70660e52012-07-19 14:45:26 +0900450static struct regulator_consumer_supply vddmmc_consumers[] __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900451 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
452 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
453 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
454};
455
Mark Brown70660e52012-07-19 14:45:26 +0900456static struct regulator_init_data vddmmc __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900457 .constraints = {
458 .name = "VDDMMC,UH",
459 .always_on = 1,
460 },
461 .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
462 .consumer_supplies = vddmmc_consumers,
Mark Brown35127292011-06-22 13:08:17 +0900463 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900464};
465
Mark Brown70660e52012-07-19 14:45:26 +0900466static struct regulator_init_data vddotgi __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900467 .constraints = {
468 .name = "VDDOTGi",
469 .always_on = 1,
470 },
Mark Brown35127292011-06-22 13:08:17 +0900471 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900472};
473
Mark Brown70660e52012-07-19 14:45:26 +0900474static struct regulator_init_data vddotg __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900475 .constraints = {
476 .name = "VDDOTG",
477 .always_on = 1,
478 },
Mark Brown35127292011-06-22 13:08:17 +0900479 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900480};
481
Mark Brown70660e52012-07-19 14:45:26 +0900482static struct regulator_init_data vddhi __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900483 .constraints = {
484 .name = "VDDHI",
485 .always_on = 1,
486 },
Mark Brown35127292011-06-22 13:08:17 +0900487 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900488};
489
Mark Brown70660e52012-07-19 14:45:26 +0900490static struct regulator_init_data vddadc __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900491 .constraints = {
492 .name = "VDDADC,VDDDAC",
493 .always_on = 1,
494 },
Mark Brown35127292011-06-22 13:08:17 +0900495 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900496};
497
Mark Brown70660e52012-07-19 14:45:26 +0900498static struct regulator_init_data vddmem0 __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900499 .constraints = {
500 .name = "VDDMEM0",
501 .always_on = 1,
502 },
Mark Brown35127292011-06-22 13:08:17 +0900503 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900504};
505
Mark Brown70660e52012-07-19 14:45:26 +0900506static struct regulator_init_data vddpll __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900507 .constraints = {
508 .name = "VDDPLL",
509 .always_on = 1,
510 },
Mark Brown35127292011-06-22 13:08:17 +0900511 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900512};
513
Mark Brown70660e52012-07-19 14:45:26 +0900514static struct regulator_init_data vddlcd __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900515 .constraints = {
516 .name = "VDDLCD",
517 .always_on = 1,
518 },
Mark Brown35127292011-06-22 13:08:17 +0900519 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900520};
521
Mark Brown70660e52012-07-19 14:45:26 +0900522static struct regulator_init_data vddalive __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900523 .constraints = {
524 .name = "VDDALIVE",
525 .always_on = 1,
526 },
Mark Brown35127292011-06-22 13:08:17 +0900527 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900528};
529
Mark Brown70660e52012-07-19 14:45:26 +0900530static struct wm831x_backup_pdata banff_backup_pdata __devinitdata = {
Mark Brown89e1c3d2011-07-21 01:26:24 +0900531 .charger_enable = 1,
532 .vlim = 2500, /* mV */
533 .ilim = 200, /* uA */
534};
535
Mark Brown70660e52012-07-19 14:45:26 +0900536static struct wm831x_status_pdata banff_red_led __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900537 .name = "banff:red:",
538 .default_src = WM831X_STATUS_MANUAL,
539};
540
Mark Brown70660e52012-07-19 14:45:26 +0900541static struct wm831x_status_pdata banff_green_led __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900542 .name = "banff:green:",
543 .default_src = WM831X_STATUS_MANUAL,
544};
545
Mark Brown70660e52012-07-19 14:45:26 +0900546static struct wm831x_touch_pdata touch_pdata __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900547 .data_irq = S3C_EINT(26),
Mark Brownae24c262011-06-22 13:08:13 +0900548 .pd_irq = S3C_EINT(27),
Mark Browne1a3c742011-05-06 09:45:13 +0900549};
550
Mark Brown70660e52012-07-19 14:45:26 +0900551static struct wm831x_pdata crag_pmic_pdata __devinitdata = {
Mark Brownae24c262011-06-22 13:08:13 +0900552 .wm831x_num = 1,
Mark Brownaaed44e2011-11-03 16:28:15 +0900553 .gpio_base = BANFF_PMIC_GPIO_BASE,
Mark Browndcf35802011-12-02 14:29:07 +0900554 .soft_shutdown = true,
Mark Browne1a3c742011-05-06 09:45:13 +0900555
Mark Brown89e1c3d2011-07-21 01:26:24 +0900556 .backup = &banff_backup_pdata,
557
Mark Brownae24c262011-06-22 13:08:13 +0900558 .gpio_defaults = {
Mark Brown986afc92011-08-12 18:08:17 +0900559 /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
560 [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
Mark Brownae24c262011-06-22 13:08:13 +0900561 /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
562 [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
563 /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
564 [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
565 },
566
Mark Browne1a3c742011-05-06 09:45:13 +0900567 .dcdc = {
568 &vddarm, /* DCDC1 */
569 &vddint, /* DCDC2 */
570 &vddmem, /* DCDC3 */
571 },
572
573 .ldo = {
574 &vddsys, /* LDO1 */
575 &vddmmc, /* LDO2 */
576 NULL, /* LDO3 */
577 &vddotgi, /* LDO4 */
578 &vddotg, /* LDO5 */
579 &vddhi, /* LDO6 */
580 &vddadc, /* LDO7 */
581 &vddmem0, /* LDO8 */
582 &vddpll, /* LDO9 */
583 &vddlcd, /* LDO10 */
584 &vddalive, /* LDO11 */
585 },
586
587 .status = {
588 &banff_green_led,
589 &banff_red_led,
590 },
591
592 .touch = &touch_pdata,
593};
594
Mark Brown70660e52012-07-19 14:45:26 +0900595static struct i2c_board_info i2c_devs0[] __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900596 { I2C_BOARD_INFO("24c08", 0x50), },
597 { I2C_BOARD_INFO("tca6408", 0x20),
598 .platform_data = &crag6410_pca_data,
599 },
600 { I2C_BOARD_INFO("wm8312", 0x34),
601 .platform_data = &crag_pmic_pdata,
602 .irq = S3C_EINT(23),
603 },
604};
605
606static struct s3c2410_platform_i2c i2c0_pdata = {
607 .frequency = 400000,
608};
609
Mark Brown70660e52012-07-19 14:45:26 +0900610static struct regulator_consumer_supply pvdd_1v2_consumers[] __devinitdata = {
Mark Browncda23492012-01-12 11:04:56 +0900611 REGULATOR_SUPPLY("DCVDD", "spi0.0"),
612 REGULATOR_SUPPLY("AVDD", "spi0.0"),
Mark Brown479535e2012-10-17 17:41:07 +0900613 REGULATOR_SUPPLY("AVDD", "spi0.1"),
Mark Browncda23492012-01-12 11:04:56 +0900614};
615
Mark Brown70660e52012-07-19 14:45:26 +0900616static struct regulator_init_data pvdd_1v2 __devinitdata = {
Mark Brownae24c262011-06-22 13:08:13 +0900617 .constraints = {
618 .name = "PVDD_1V2",
Mark Browncda23492012-01-12 11:04:56 +0900619 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
Mark Brownae24c262011-06-22 13:08:13 +0900620 },
Mark Browncda23492012-01-12 11:04:56 +0900621
622 .consumer_supplies = pvdd_1v2_consumers,
623 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers),
Mark Brownae24c262011-06-22 13:08:13 +0900624};
625
Mark Brown70660e52012-07-19 14:45:26 +0900626static struct regulator_consumer_supply pvdd_1v8_consumers[] __devinitdata = {
Mark Brownd5160ec2011-09-26 13:18:28 +0900627 REGULATOR_SUPPLY("LDOVDD", "1-001a"),
Mark Brownae24c262011-06-22 13:08:13 +0900628 REGULATOR_SUPPLY("PLLVDD", "1-001a"),
629 REGULATOR_SUPPLY("DBVDD", "1-001a"),
Mark Brown4ed12b52011-08-31 08:03:11 +0900630 REGULATOR_SUPPLY("DBVDD1", "1-001a"),
631 REGULATOR_SUPPLY("DBVDD2", "1-001a"),
632 REGULATOR_SUPPLY("DBVDD3", "1-001a"),
Mark Brownae24c262011-06-22 13:08:13 +0900633 REGULATOR_SUPPLY("CPVDD", "1-001a"),
634 REGULATOR_SUPPLY("AVDD2", "1-001a"),
635 REGULATOR_SUPPLY("DCVDD", "1-001a"),
636 REGULATOR_SUPPLY("AVDD", "1-001a"),
Mark Browncda23492012-01-12 11:04:56 +0900637 REGULATOR_SUPPLY("DBVDD", "spi0.0"),
Mark Browne6a194b2012-10-17 17:41:09 +0900638
639 REGULATOR_SUPPLY("DBVDD", "1-003a"),
640 REGULATOR_SUPPLY("LDOVDD", "1-003a"),
641 REGULATOR_SUPPLY("CPVDD", "1-003a"),
642 REGULATOR_SUPPLY("AVDD", "1-003a"),
Mark Brown479535e2012-10-17 17:41:07 +0900643 REGULATOR_SUPPLY("DBVDD1", "spi0.1"),
644 REGULATOR_SUPPLY("DBVDD2", "spi0.1"),
645 REGULATOR_SUPPLY("DBVDD3", "spi0.1"),
646 REGULATOR_SUPPLY("LDOVDD", "spi0.1"),
647 REGULATOR_SUPPLY("CPVDD", "spi0.1"),
648
649 REGULATOR_SUPPLY("DBVDD2", "wm5102-codec"),
650 REGULATOR_SUPPLY("DBVDD3", "wm5102-codec"),
651 REGULATOR_SUPPLY("CPVDD", "wm5102-codec"),
652
653 REGULATOR_SUPPLY("DBVDD2", "wm5110-codec"),
654 REGULATOR_SUPPLY("DBVDD3", "wm5110-codec"),
655 REGULATOR_SUPPLY("CPVDD", "wm5110-codec"),
Mark Brownae24c262011-06-22 13:08:13 +0900656};
657
Mark Brown70660e52012-07-19 14:45:26 +0900658static struct regulator_init_data pvdd_1v8 __devinitdata = {
Mark Brownae24c262011-06-22 13:08:13 +0900659 .constraints = {
660 .name = "PVDD_1V8",
661 .always_on = 1,
662 },
663
664 .consumer_supplies = pvdd_1v8_consumers,
665 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
666};
667
Mark Brown70660e52012-07-19 14:45:26 +0900668static struct regulator_consumer_supply pvdd_3v3_consumers[] __devinitdata = {
Mark Brownae24c262011-06-22 13:08:13 +0900669 REGULATOR_SUPPLY("MICVDD", "1-001a"),
670 REGULATOR_SUPPLY("AVDD1", "1-001a"),
671};
672
Mark Brown70660e52012-07-19 14:45:26 +0900673static struct regulator_init_data pvdd_3v3 __devinitdata = {
Mark Brownae24c262011-06-22 13:08:13 +0900674 .constraints = {
675 .name = "PVDD_3V3",
676 .always_on = 1,
677 },
678
679 .consumer_supplies = pvdd_3v3_consumers,
680 .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
681};
682
Mark Brown70660e52012-07-19 14:45:26 +0900683static struct wm831x_pdata glenfarclas_pmic_pdata __devinitdata = {
Mark Brownae24c262011-06-22 13:08:13 +0900684 .wm831x_num = 2,
685 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
686 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
Mark Browndcf35802011-12-02 14:29:07 +0900687 .soft_shutdown = true,
Mark Brownae24c262011-06-22 13:08:13 +0900688
689 .gpio_defaults = {
690 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
691 [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
692 [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
693 [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
694 },
695
696 .dcdc = {
697 &pvdd_1v2, /* DCDC1 */
698 &pvdd_1v8, /* DCDC2 */
699 &pvdd_3v3, /* DCDC3 */
700 },
701
702 .disable_touch = true,
703};
704
Mark Brown8504a3c2011-12-02 14:29:07 +0900705static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
706 .gpios = {
707 [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
708 [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
709 [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
710 [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
711 [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
712 },
713};
714
Mark Brown70660e52012-07-19 14:45:26 +0900715static struct i2c_board_info i2c_devs1[] __devinitdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900716 { I2C_BOARD_INFO("wm8311", 0x34),
Mark Brownae24c262011-06-22 13:08:13 +0900717 .irq = S3C_EINT(0),
718 .platform_data = &glenfarclas_pmic_pdata },
719
Mark Brown091cff02012-10-17 17:41:10 +0900720 { I2C_BOARD_INFO("wlf-gf-module", 0x20) },
Mark Brownea070cd2012-05-16 07:01:10 +0900721 { I2C_BOARD_INFO("wlf-gf-module", 0x22) },
Mark Brownd0f0b432011-08-19 22:40:07 +0900722 { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
723 { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
724 { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
725
Mark Brown8504a3c2011-12-02 14:29:07 +0900726 { I2C_BOARD_INFO("wm1250-ev1", 0x27),
727 .platform_data = &wm1250_ev1_pdata },
Mark Browne1a3c742011-05-06 09:45:13 +0900728};
729
Mark Brown8351c7a2011-12-02 14:29:07 +0900730static struct s3c2410_platform_i2c i2c1_pdata = {
731 .frequency = 400000,
732 .bus_num = 1,
Mark Browne1a3c742011-05-06 09:45:13 +0900733};
734
735static void __init crag6410_map_io(void)
736{
737 s3c64xx_init_io(NULL, 0);
738 s3c24xx_init_clocks(12000000);
739 s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
740
741 /* LCD type and Bypass set by bootloader */
742}
743
744static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
745 .max_width = 4,
746 .cd_type = S3C_SDHCI_CD_PERMANENT,
Mark Browna9294cd2011-12-30 13:44:36 +0900747 .host_caps = MMC_CAP_POWER_OFF_CARD,
Mark Browne1a3c742011-05-06 09:45:13 +0900748};
749
Mark Browne1a3c742011-05-06 09:45:13 +0900750static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
751{
752 /* Set all the necessary GPG pins to special-function 2 */
753 s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
754
755 /* force card-detected for prototype 0 */
756 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
757}
758
759static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
760 .max_width = 4,
761 .cd_type = S3C_SDHCI_CD_INTERNAL,
762 .cfg_gpio = crag6410_cfg_sdhci0,
Mark Brownfb7f60f2011-12-30 13:44:31 +0900763 .host_caps = MMC_CAP_POWER_OFF_CARD,
Mark Browne1a3c742011-05-06 09:45:13 +0900764};
765
Mark Brown66211f92011-12-29 18:05:29 +0900766static const struct gpio_led gpio_leds[] = {
767 {
768 .name = "d13:green:",
769 .gpio = MMGPIO_GPIO_BASE + 0,
770 .default_state = LEDS_GPIO_DEFSTATE_ON,
771 },
772 {
773 .name = "d14:green:",
774 .gpio = MMGPIO_GPIO_BASE + 1,
775 .default_state = LEDS_GPIO_DEFSTATE_ON,
776 },
777 {
778 .name = "d15:green:",
779 .gpio = MMGPIO_GPIO_BASE + 2,
780 .default_state = LEDS_GPIO_DEFSTATE_ON,
781 },
782 {
783 .name = "d16:green:",
784 .gpio = MMGPIO_GPIO_BASE + 3,
785 .default_state = LEDS_GPIO_DEFSTATE_ON,
786 },
787 {
788 .name = "d17:green:",
789 .gpio = MMGPIO_GPIO_BASE + 4,
790 .default_state = LEDS_GPIO_DEFSTATE_ON,
791 },
792 {
793 .name = "d18:green:",
794 .gpio = MMGPIO_GPIO_BASE + 5,
795 .default_state = LEDS_GPIO_DEFSTATE_ON,
796 },
797 {
798 .name = "d19:green:",
799 .gpio = MMGPIO_GPIO_BASE + 6,
800 .default_state = LEDS_GPIO_DEFSTATE_ON,
801 },
802 {
803 .name = "d20:green:",
804 .gpio = MMGPIO_GPIO_BASE + 7,
805 .default_state = LEDS_GPIO_DEFSTATE_ON,
806 },
807};
808
809static const struct gpio_led_platform_data gpio_leds_pdata = {
810 .leds = gpio_leds,
811 .num_leds = ARRAY_SIZE(gpio_leds),
Mark Browne1a3c742011-05-06 09:45:13 +0900812};
813
Joonyoung Shim99f6e1f2012-03-07 04:23:47 -0800814static struct s3c_hsotg_plat crag6410_hsotg_pdata;
815
Mark Browne1a3c742011-05-06 09:45:13 +0900816static void __init crag6410_machine_init(void)
817{
818 /* Open drain IRQs need pullups */
819 s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
820 s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
821
822 gpio_request(S3C64XX_GPB(0), "LCD power");
823 gpio_direction_output(S3C64XX_GPB(0), 0);
824
825 gpio_request(S3C64XX_GPF(14), "LCD PWM");
826 gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
827
828 gpio_request(S3C64XX_GPB(1), "SD power");
829 gpio_direction_output(S3C64XX_GPB(1), 0);
830
831 gpio_request(S3C64XX_GPF(10), "nRESETSEL");
832 gpio_direction_output(S3C64XX_GPF(10), 1);
833
834 s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
Mark Browne1a3c742011-05-06 09:45:13 +0900835 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
836
837 s3c_i2c0_set_platdata(&i2c0_pdata);
Mark Brown8351c7a2011-12-02 14:29:07 +0900838 s3c_i2c1_set_platdata(&i2c1_pdata);
Mark Browne1a3c742011-05-06 09:45:13 +0900839 s3c_fb_set_platdata(&crag6410_lcd_pdata);
Joonyoung Shim99f6e1f2012-03-07 04:23:47 -0800840 s3c_hsotg_set_platdata(&crag6410_hsotg_pdata);
Mark Browne1a3c742011-05-06 09:45:13 +0900841
842 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
843 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
844
845 samsung_keypad_set_platdata(&crag6410_keypad_data);
Mark Brown479535e2012-10-17 17:41:07 +0900846 s3c64xx_spi0_set_platdata(NULL, 0, 2);
Mark Browne1a3c742011-05-06 09:45:13 +0900847
848 platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
849
Mark Brown66211f92011-12-29 18:05:29 +0900850 gpio_led_register_device(-1, &gpio_leds_pdata);
851
Mark Brownae24c262011-06-22 13:08:13 +0900852 regulator_has_full_constraints();
853
Mark Brownc656c302011-12-08 23:27:48 +0100854 s3c64xx_pm_init();
Mark Browne1a3c742011-05-06 09:45:13 +0900855}
856
857MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
858 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
Nicolas Pitre170a5902011-07-05 22:38:17 -0400859 .atag_offset = 0x100,
Mark Browne1a3c742011-05-06 09:45:13 +0900860 .init_irq = s3c6410_init_irq,
Jamie Iles774b51f2011-11-04 01:10:04 +0000861 .handle_irq = vic_handle_irq,
Mark Browne1a3c742011-05-06 09:45:13 +0900862 .map_io = crag6410_map_io,
863 .init_machine = crag6410_machine_init,
Shawn Guocc8f2522012-04-26 21:08:52 +0800864 .init_late = s3c64xx_init_late,
Mark Browne1a3c742011-05-06 09:45:13 +0900865 .timer = &s3c24xx_timer,
Kukjin Kimff84ded2012-01-03 14:03:30 +0100866 .restart = s3c64xx_restart,
Mark Browne1a3c742011-05-06 09:45:13 +0900867MACHINE_END