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Zhang Xiantao82470192007-12-17 13:59:56 +08001#ifndef __KVM_X86_LAPIC_H
2#define __KVM_X86_LAPIC_H
3
Andre Przywaraaf669ac2015-03-26 14:39:29 +00004#include <kvm/iodev.h>
Zhang Xiantao82470192007-12-17 13:59:56 +08005
6#include <linux/kvm_host.h>
7
Jan Kiszka66450a22013-03-13 12:42:34 +01008#define KVM_APIC_INIT 0
9#define KVM_APIC_SIPI 1
Suravee Suthikulpanit1e6e2752016-05-04 14:09:40 -050010#define KVM_APIC_LVT_NUM 6
Jan Kiszka66450a22013-03-13 12:42:34 +010011
Suravee Suthikulpanit18f40c52016-05-04 14:09:48 -050012#define KVM_APIC_SHORT_MASK 0xc0000
13#define KVM_APIC_DEST_MASK 0x800
14
Avi Kivitye9d90d42012-07-26 18:01:50 +030015struct kvm_timer {
16 struct hrtimer timer;
17 s64 period; /* unit: ns */
Wanpeng Li8003c9a2016-10-24 18:23:13 +080018 ktime_t target_expiration;
Radim Krčmářa323b402014-10-30 15:06:46 +010019 u32 timer_mode;
Avi Kivitye9d90d42012-07-26 18:01:50 +030020 u32 timer_mode_mask;
21 u64 tscdeadline;
Marcelo Tosattid0659d92014-12-16 09:08:15 -050022 u64 expired_tscdeadline;
Avi Kivitye9d90d42012-07-26 18:01:50 +030023 atomic_t pending; /* accumulated triggered timers */
Yunhong Jiangce7a0582016-06-13 14:20:01 -070024 bool hv_timer_in_use;
Avi Kivitye9d90d42012-07-26 18:01:50 +030025};
26
Zhang Xiantao82470192007-12-17 13:59:56 +080027struct kvm_lapic {
28 unsigned long base_address;
29 struct kvm_io_device dev;
Marcelo Tosattid3c7b772009-02-23 10:57:41 -030030 struct kvm_timer lapic_timer;
31 u32 divide_count;
Zhang Xiantao82470192007-12-17 13:59:56 +080032 struct kvm_vcpu *vcpu;
Radim Krčmáře4627552014-10-30 15:06:45 +010033 bool sw_enabled;
Gleb Natapov33e4c682009-06-11 11:06:51 +030034 bool irr_pending;
Radim Krčmář59fd1322015-06-30 22:19:16 +020035 bool lvt0_in_nmi_mode;
Michael S. Tsirkin8680b942012-06-24 19:24:26 +030036 /* Number of bits set in ISR. */
37 s16 isr_count;
38 /* The highest vector set in ISR; if -1 - invalid, must scan ISR. */
39 int highest_isr_cache;
Michael S. Tsirkin5eadf912012-06-24 19:24:19 +030040 /**
41 * APIC register page. The layout matches the register layout seen by
42 * the guest 1:1, because it is accessed by the vmx microcode.
43 * Note: Only one register, the TPR, is used by the microcode.
44 */
Zhang Xiantao82470192007-12-17 13:59:56 +080045 void *regs;
Avi Kivityb93463a2007-10-25 16:52:32 +020046 gpa_t vapic_addr;
Andy Honigfda4e2e2013-11-20 10:23:22 -080047 struct gfn_to_hva_cache vapic_cache;
Jan Kiszka66450a22013-03-13 12:42:34 +010048 unsigned long pending_events;
49 unsigned int sipi_vector;
Zhang Xiantao82470192007-12-17 13:59:56 +080050};
Joerg Roedel9e4aabe2016-02-29 16:04:43 +010051
52struct dest_map;
53
Zhang Xiantao82470192007-12-17 13:59:56 +080054int kvm_create_lapic(struct kvm_vcpu *vcpu);
55void kvm_free_lapic(struct kvm_vcpu *vcpu);
56
57int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu);
58int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu);
59int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu);
Jan Kiszka66450a22013-03-13 12:42:34 +010060void kvm_apic_accept_events(struct kvm_vcpu *vcpu);
Nadav Amitd28bc9d2015-04-13 14:34:08 +030061void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event);
Zhang Xiantao82470192007-12-17 13:59:56 +080062u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu);
63void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8);
Kevin Tian58fbbf22011-08-30 13:56:17 +030064void kvm_lapic_set_eoi(struct kvm_vcpu *vcpu);
Zhang Xiantao82470192007-12-17 13:59:56 +080065void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value);
Harvey Harrison8b2cf732008-04-27 12:14:13 -070066u64 kvm_lapic_get_base(struct kvm_vcpu *vcpu);
Gleb Natapovfc61b802009-07-05 17:39:35 +030067void kvm_apic_set_version(struct kvm_vcpu *vcpu);
Suravee Suthikulpanit1e6e2752016-05-04 14:09:40 -050068int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val);
69int kvm_lapic_reg_read(struct kvm_lapic *apic, u32 offset, int len,
70 void *data);
71bool kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
72 int short_hand, unsigned int dest, int dest_mode);
Zhang Xiantao82470192007-12-17 13:59:56 +080073
Paolo Bonzini810e6de2016-12-19 13:05:46 +010074int __kvm_apic_update_irr(u32 *pir, void *regs);
75int kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir);
Paolo Bonzinieb90f342016-12-18 14:02:21 +010076void kvm_apic_update_ppr(struct kvm_vcpu *vcpu);
Yang Zhangb4f22252013-04-11 19:21:37 +080077int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq,
Joerg Roedel9e4aabe2016-02-29 16:04:43 +010078 struct dest_map *dest_map);
Avi Kivity89342082011-11-10 14:57:21 +020079int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type);
Zhang Xiantao82470192007-12-17 13:59:56 +080080
Gleb Natapov1e08ec42012-09-13 17:19:24 +030081bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
Joerg Roedel9e4aabe2016-02-29 16:04:43 +010082 struct kvm_lapic_irq *irq, int *r, struct dest_map *dest_map);
Gleb Natapov1e08ec42012-09-13 17:19:24 +030083
Zhang Xiantao82470192007-12-17 13:59:56 +080084u64 kvm_get_apic_base(struct kvm_vcpu *vcpu);
Jan Kiszka58cb6282014-01-24 16:48:44 +010085int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
Radim Krčmářa92e2542016-07-12 22:09:22 +020086int kvm_apic_get_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s);
87int kvm_apic_set_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s);
Zhang Xiantao82470192007-12-17 13:59:56 +080088int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);
Zhang Xiantao82470192007-12-17 13:59:56 +080089
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +080090u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu);
91void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data);
92
Yang Zhang83d4c282013-01-25 10:18:49 +080093void kvm_apic_write_nodecode(struct kvm_vcpu *vcpu, u32 offset);
Yang Zhangc7c9c562013-01-25 10:18:51 +080094void kvm_apic_set_eoi_accelerated(struct kvm_vcpu *vcpu, int vector);
Yang Zhang83d4c282013-01-25 10:18:49 +080095
Andy Honigfda4e2e2013-11-20 10:23:22 -080096int kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr);
Avi Kivityb93463a2007-10-25 16:52:32 +020097void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu);
98void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu);
99
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300100int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
101int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
Gleb Natapov10388a02010-01-17 15:51:23 +0200102
103int kvm_hv_vapic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
104int kvm_hv_vapic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
105
106static inline bool kvm_hv_vapic_assist_page_enabled(struct kvm_vcpu *vcpu)
107{
Andrey Smetanine83d5882015-07-03 15:01:34 +0300108 return vcpu->arch.hyperv.hv_vapic & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE;
Gleb Natapov10388a02010-01-17 15:51:23 +0200109}
Michael S. Tsirkinae7a2a32012-06-24 19:25:07 +0300110
111int kvm_lapic_enable_pv_eoi(struct kvm_vcpu *vcpu, u64 data);
Gleb Natapovc5cc4212012-08-05 15:58:30 +0300112void kvm_lapic_init(void);
David Matlackcef84c32016-12-16 14:30:36 -0800113void kvm_lapic_exit(void);
Gleb Natapovc48f1492012-08-05 15:58:33 +0300114
Suravee Suthikulpanit1e6e2752016-05-04 14:09:40 -0500115#define VEC_POS(v) ((v) & (32 - 1))
116#define REG_POS(v) (((v) >> 5) << 4)
117
118static inline void kvm_lapic_set_vector(int vec, void *bitmap)
119{
120 set_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
121}
122
123static inline void kvm_lapic_set_irr(int vec, struct kvm_lapic *apic)
124{
125 kvm_lapic_set_vector(vec, apic->regs + APIC_IRR);
126 /*
127 * irr_pending must be true if any interrupt is pending; set it after
128 * APIC_IRR to avoid race with apic_clear_irr
129 */
130 apic->irr_pending = true;
131}
132
Suravee Suthikulpanitdfb95952016-05-04 14:09:41 -0500133static inline u32 kvm_lapic_get_reg(struct kvm_lapic *apic, int reg_off)
Gleb Natapovc48f1492012-08-05 15:58:33 +0300134{
Suravee Suthikulpanitdfb95952016-05-04 14:09:41 -0500135 return *((u32 *) (apic->regs + reg_off));
Gleb Natapovc48f1492012-08-05 15:58:33 +0300136}
137
Suravee Suthikulpanit1e6e2752016-05-04 14:09:40 -0500138static inline void kvm_lapic_set_reg(struct kvm_lapic *apic, int reg_off, u32 val)
139{
140 *((u32 *) (apic->regs + reg_off)) = val;
141}
142
Gleb Natapovc48f1492012-08-05 15:58:33 +0300143extern struct static_key kvm_no_apic_vcpu;
144
Paolo Bonzinibce87cc2016-01-08 13:48:51 +0100145static inline bool lapic_in_kernel(struct kvm_vcpu *vcpu)
Gleb Natapovc48f1492012-08-05 15:58:33 +0300146{
147 if (static_key_false(&kvm_no_apic_vcpu))
148 return vcpu->arch.apic;
149 return true;
150}
151
152extern struct static_key_deferred apic_hw_disabled;
153
154static inline int kvm_apic_hw_enabled(struct kvm_lapic *apic)
155{
156 if (static_key_false(&apic_hw_disabled.key))
157 return apic->vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE;
158 return MSR_IA32_APICBASE_ENABLE;
159}
160
161extern struct static_key_deferred apic_sw_disabled;
162
Radim Krčmářf30ebc32014-10-30 15:06:47 +0100163static inline bool kvm_apic_sw_enabled(struct kvm_lapic *apic)
Gleb Natapovc48f1492012-08-05 15:58:33 +0300164{
165 if (static_key_false(&apic_sw_disabled.key))
Radim Krčmářf30ebc32014-10-30 15:06:47 +0100166 return apic->sw_enabled;
167 return true;
Gleb Natapovc48f1492012-08-05 15:58:33 +0300168}
169
170static inline bool kvm_apic_present(struct kvm_vcpu *vcpu)
171{
Paolo Bonzinibce87cc2016-01-08 13:48:51 +0100172 return lapic_in_kernel(vcpu) && kvm_apic_hw_enabled(vcpu->arch.apic);
Gleb Natapovc48f1492012-08-05 15:58:33 +0300173}
174
175static inline int kvm_lapic_enabled(struct kvm_vcpu *vcpu)
176{
177 return kvm_apic_present(vcpu) && kvm_apic_sw_enabled(vcpu->arch.apic);
178}
179
Yang Zhang8d146952013-01-25 10:18:50 +0800180static inline int apic_x2apic_mode(struct kvm_lapic *apic)
181{
182 return apic->vcpu->arch.apic_base & X2APIC_ENABLE;
183}
184
Andrey Smetanind62caab2015-11-10 15:36:33 +0300185static inline bool kvm_vcpu_apicv_active(struct kvm_vcpu *vcpu)
Yang Zhangc7c9c562013-01-25 10:18:51 +0800186{
Andrey Smetanind62caab2015-11-10 15:36:33 +0300187 return vcpu->arch.apic && vcpu->arch.apicv_active;
Yang Zhangc7c9c562013-01-25 10:18:51 +0800188}
189
Jan Kiszka66450a22013-03-13 12:42:34 +0100190static inline bool kvm_apic_has_events(struct kvm_vcpu *vcpu)
191{
Paolo Bonzinibce87cc2016-01-08 13:48:51 +0100192 return lapic_in_kernel(vcpu) && vcpu->arch.apic->pending_events;
Jan Kiszka66450a22013-03-13 12:42:34 +0100193}
194
James Sullivand1ebdbf2015-03-18 19:26:04 -0600195static inline bool kvm_lowest_prio_delivery(struct kvm_lapic_irq *irq)
196{
197 return (irq->delivery_mode == APIC_DM_LOWEST ||
198 irq->msi_redir_hint);
199}
200
Paolo Bonzinif0778252015-04-01 15:06:40 +0200201static inline int kvm_lapic_latched_init(struct kvm_vcpu *vcpu)
202{
Paolo Bonzinibce87cc2016-01-08 13:48:51 +0100203 return lapic_in_kernel(vcpu) && test_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
Paolo Bonzinif0778252015-04-01 15:06:40 +0200204}
205
Yang Zhang10606912013-04-11 19:21:38 +0800206bool kvm_apic_pending_eoi(struct kvm_vcpu *vcpu, int vector);
207
Marcelo Tosattid0659d92014-12-16 09:08:15 -0500208void wait_lapic_expire(struct kvm_vcpu *vcpu);
209
Feng Wu8feb4a02015-09-18 22:29:47 +0800210bool kvm_intr_is_single_vcpu_fast(struct kvm *kvm, struct kvm_lapic_irq *irq,
211 struct kvm_vcpu **dest_vcpu);
Feng Wu520040142016-01-25 16:53:33 +0800212int kvm_vector_to_index(u32 vector, u32 dest_vcpus,
213 const unsigned long *bitmap, u32 bitmap_size);
Yunhong Jiangce7a0582016-06-13 14:20:01 -0700214void kvm_lapic_switch_to_sw_timer(struct kvm_vcpu *vcpu);
215void kvm_lapic_switch_to_hv_timer(struct kvm_vcpu *vcpu);
216void kvm_lapic_expired_hv_timer(struct kvm_vcpu *vcpu);
217bool kvm_lapic_hv_timer_in_use(struct kvm_vcpu *vcpu);
Paolo Bonzinia749e242017-06-29 17:14:50 +0200218void kvm_lapic_restart_hv_timer(struct kvm_vcpu *vcpu);
Zhang Xiantao82470192007-12-17 13:59:56 +0800219#endif