Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 1 | /* |
| 2 | * Driver for the Conexant CX23885/7/8 PCIe bridge |
| 3 | * |
| 4 | * Infrared remote control input device |
| 5 | * |
| 6 | * Most of this file is |
| 7 | * |
Andy Walls | 6afdeaf | 2010-05-23 18:53:35 -0300 | [diff] [blame] | 8 | * Copyright (C) 2009 Andy Walls <awalls@md.metrocast.net> |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 9 | * |
| 10 | * However, the cx23885_input_{init,fini} functions contained herein are |
| 11 | * derived from Linux kernel files linux/media/video/.../...-input.c marked as: |
| 12 | * |
| 13 | * Copyright (C) 2008 <srinivasa.deevi at conexant dot com> |
| 14 | * Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it> |
| 15 | * Markus Rechberger <mrechberger@gmail.com> |
| 16 | * Mauro Carvalho Chehab <mchehab@infradead.org> |
| 17 | * Sascha Sommer <saschasommer@freenet.de> |
| 18 | * Copyright (C) 2004, 2005 Chris Pascoe |
| 19 | * Copyright (C) 2003, 2004 Gerd Knorr |
| 20 | * Copyright (C) 2003 Pavel Machek |
| 21 | * |
| 22 | * This program is free software; you can redistribute it and/or |
| 23 | * modify it under the terms of the GNU General Public License |
| 24 | * as published by the Free Software Foundation; either version 2 |
| 25 | * of the License, or (at your option) any later version. |
| 26 | * |
| 27 | * This program is distributed in the hope that it will be useful, |
| 28 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 29 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 30 | * GNU General Public License for more details. |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 31 | */ |
| 32 | |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 33 | #include <linux/slab.h> |
Mauro Carvalho Chehab | 6bda964 | 2010-11-17 13:28:38 -0300 | [diff] [blame] | 34 | #include <media/rc-core.h> |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 35 | #include <media/v4l2-subdev.h> |
| 36 | |
| 37 | #include "cx23885.h" |
Mauro Carvalho Chehab | ada73ee | 2012-10-27 11:29:23 -0300 | [diff] [blame] | 38 | #include "cx23885-input.h" |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 39 | |
Mauro Carvalho Chehab | 727e625 | 2010-03-12 21:18:14 -0300 | [diff] [blame] | 40 | #define MODULE_NAME "cx23885" |
| 41 | |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 42 | static void cx23885_input_process_measurements(struct cx23885_dev *dev, |
| 43 | bool overrun) |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 44 | { |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 45 | struct cx23885_kernel_ir *kernel_ir = dev->kernel_ir; |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 46 | |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 47 | ssize_t num; |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 48 | int count, i; |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 49 | bool handle = false; |
Andy Walls | c02e0d1 | 2010-08-01 02:18:13 -0300 | [diff] [blame] | 50 | struct ir_raw_event ir_core_event[64]; |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 51 | |
| 52 | do { |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 53 | num = 0; |
Andy Walls | c02e0d1 | 2010-08-01 02:18:13 -0300 | [diff] [blame] | 54 | v4l2_subdev_call(dev->sd_ir, ir, rx_read, (u8 *) ir_core_event, |
| 55 | sizeof(ir_core_event), &num); |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 56 | |
Andy Walls | c02e0d1 | 2010-08-01 02:18:13 -0300 | [diff] [blame] | 57 | count = num / sizeof(struct ir_raw_event); |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 58 | |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 59 | for (i = 0; i < count; i++) { |
David Härdeman | d8b4b58 | 2010-10-29 16:08:23 -0300 | [diff] [blame] | 60 | ir_raw_event_store(kernel_ir->rc, |
Andy Walls | c02e0d1 | 2010-08-01 02:18:13 -0300 | [diff] [blame] | 61 | &ir_core_event[i]); |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 62 | handle = true; |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 63 | } |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 64 | } while (num != 0); |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 65 | |
| 66 | if (overrun) |
David Härdeman | d8b4b58 | 2010-10-29 16:08:23 -0300 | [diff] [blame] | 67 | ir_raw_event_reset(kernel_ir->rc); |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 68 | else if (handle) |
David Härdeman | d8b4b58 | 2010-10-29 16:08:23 -0300 | [diff] [blame] | 69 | ir_raw_event_handle(kernel_ir->rc); |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 70 | } |
| 71 | |
| 72 | void cx23885_input_rx_work_handler(struct cx23885_dev *dev, u32 events) |
| 73 | { |
| 74 | struct v4l2_subdev_ir_parameters params; |
| 75 | int overrun, data_available; |
| 76 | |
| 77 | if (dev->sd_ir == NULL || events == 0) |
| 78 | return; |
| 79 | |
| 80 | switch (dev->board) { |
Andy Walls | 9b3d8ec | 2011-06-08 21:24:25 -0300 | [diff] [blame] | 81 | case CX23885_BOARD_HAUPPAUGE_HVR1270: |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 82 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
Michael Krufky | 7fec6fe | 2009-11-11 15:46:09 -0300 | [diff] [blame] | 83 | case CX23885_BOARD_HAUPPAUGE_HVR1290: |
Djuri Baars | 076f0e3 | 2012-07-28 09:01:38 -0300 | [diff] [blame] | 84 | case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: |
Andy Walls | 98d109f | 2010-07-19 00:41:41 -0300 | [diff] [blame] | 85 | case CX23885_BOARD_TEVII_S470: |
| 86 | case CX23885_BOARD_HAUPPAUGE_HVR1250: |
Alfredo Jesús Delaiti | e5f670b | 2012-11-08 15:50:25 -0300 | [diff] [blame] | 87 | case CX23885_BOARD_MYGICA_X8507: |
Luis Alves | e600148 | 2013-10-01 22:11:35 -0300 | [diff] [blame] | 88 | case CX23885_BOARD_TBS_6980: |
| 89 | case CX23885_BOARD_TBS_6981: |
nibble.max | d11a383 | 2014-09-29 11:17:36 -0300 | [diff] [blame] | 90 | case CX23885_BOARD_DVBSKY_T9580: |
nibble.max | 070e666 | 2014-10-23 07:02:16 -0300 | [diff] [blame] | 91 | case CX23885_BOARD_DVBSKY_T980C: |
| 92 | case CX23885_BOARD_DVBSKY_S950C: |
Olli Salonen | 61b103e | 2014-10-30 17:48:27 -0300 | [diff] [blame] | 93 | case CX23885_BOARD_TT_CT2_4500_CI: |
nibble.max | cba5480 | 2014-11-05 11:58:07 -0300 | [diff] [blame] | 94 | case CX23885_BOARD_DVBSKY_S950: |
nibble.max | c29d6a8 | 2014-11-05 11:58:38 -0300 | [diff] [blame] | 95 | case CX23885_BOARD_DVBSKY_S952: |
Nibble Max | c02ef64 | 2014-11-12 01:23:12 -0300 | [diff] [blame] | 96 | case CX23885_BOARD_DVBSKY_T982: |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 97 | /* |
Andy Walls | 98d109f | 2010-07-19 00:41:41 -0300 | [diff] [blame] | 98 | * The only boards we handle right now. However other boards |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 99 | * using the CX2388x integrated IR controller should be similar |
| 100 | */ |
| 101 | break; |
| 102 | default: |
| 103 | return; |
| 104 | } |
| 105 | |
| 106 | overrun = events & (V4L2_SUBDEV_IR_RX_SW_FIFO_OVERRUN | |
| 107 | V4L2_SUBDEV_IR_RX_HW_FIFO_OVERRUN); |
| 108 | |
| 109 | data_available = events & (V4L2_SUBDEV_IR_RX_END_OF_RX_DETECTED | |
| 110 | V4L2_SUBDEV_IR_RX_FIFO_SERVICE_REQ); |
| 111 | |
| 112 | if (overrun) { |
| 113 | /* If there was a FIFO overrun, stop the device */ |
| 114 | v4l2_subdev_call(dev->sd_ir, ir, rx_g_parameters, ¶ms); |
| 115 | params.enable = false; |
| 116 | /* Mitigate race with cx23885_input_ir_stop() */ |
| 117 | params.shutdown = atomic_read(&dev->ir_input_stopping); |
| 118 | v4l2_subdev_call(dev->sd_ir, ir, rx_s_parameters, ¶ms); |
| 119 | } |
| 120 | |
| 121 | if (data_available) |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 122 | cx23885_input_process_measurements(dev, overrun); |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 123 | |
| 124 | if (overrun) { |
| 125 | /* If there was a FIFO overrun, clear & restart the device */ |
| 126 | params.enable = true; |
| 127 | /* Mitigate race with cx23885_input_ir_stop() */ |
| 128 | params.shutdown = atomic_read(&dev->ir_input_stopping); |
| 129 | v4l2_subdev_call(dev->sd_ir, ir, rx_s_parameters, ¶ms); |
| 130 | } |
| 131 | } |
| 132 | |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 133 | static int cx23885_input_ir_start(struct cx23885_dev *dev) |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 134 | { |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 135 | struct v4l2_subdev_ir_parameters params; |
| 136 | |
| 137 | if (dev->sd_ir == NULL) |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 138 | return -ENODEV; |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 139 | |
| 140 | atomic_set(&dev->ir_input_stopping, 0); |
| 141 | |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 142 | v4l2_subdev_call(dev->sd_ir, ir, rx_g_parameters, ¶ms); |
| 143 | switch (dev->board) { |
Andy Walls | 9b3d8ec | 2011-06-08 21:24:25 -0300 | [diff] [blame] | 144 | case CX23885_BOARD_HAUPPAUGE_HVR1270: |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 145 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
Michael Krufky | 7fec6fe | 2009-11-11 15:46:09 -0300 | [diff] [blame] | 146 | case CX23885_BOARD_HAUPPAUGE_HVR1290: |
Andy Walls | 98d109f | 2010-07-19 00:41:41 -0300 | [diff] [blame] | 147 | case CX23885_BOARD_HAUPPAUGE_HVR1250: |
Alfredo Jesús Delaiti | e5f670b | 2012-11-08 15:50:25 -0300 | [diff] [blame] | 148 | case CX23885_BOARD_MYGICA_X8507: |
nibble.max | d11a383 | 2014-09-29 11:17:36 -0300 | [diff] [blame] | 149 | case CX23885_BOARD_DVBSKY_T9580: |
nibble.max | 070e666 | 2014-10-23 07:02:16 -0300 | [diff] [blame] | 150 | case CX23885_BOARD_DVBSKY_T980C: |
| 151 | case CX23885_BOARD_DVBSKY_S950C: |
Olli Salonen | 61b103e | 2014-10-30 17:48:27 -0300 | [diff] [blame] | 152 | case CX23885_BOARD_TT_CT2_4500_CI: |
nibble.max | cba5480 | 2014-11-05 11:58:07 -0300 | [diff] [blame] | 153 | case CX23885_BOARD_DVBSKY_S950: |
nibble.max | c29d6a8 | 2014-11-05 11:58:38 -0300 | [diff] [blame] | 154 | case CX23885_BOARD_DVBSKY_S952: |
Nibble Max | c02ef64 | 2014-11-12 01:23:12 -0300 | [diff] [blame] | 155 | case CX23885_BOARD_DVBSKY_T982: |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 156 | /* |
| 157 | * The IR controller on this board only returns pulse widths. |
| 158 | * Any other mode setting will fail to set up the device. |
| 159 | */ |
| 160 | params.mode = V4L2_SUBDEV_IR_MODE_PULSE_WIDTH; |
| 161 | params.enable = true; |
| 162 | params.interrupt_enable = true; |
| 163 | params.shutdown = false; |
| 164 | |
| 165 | /* Setup for baseband compatible with both RC-5 and RC-6A */ |
| 166 | params.modulation = false; |
| 167 | /* RC-5: 2,222,222 ns = 1/36 kHz * 32 cycles * 2 marks * 1.25*/ |
| 168 | /* RC-6A: 3,333,333 ns = 1/36 kHz * 16 cycles * 6 marks * 1.25*/ |
| 169 | params.max_pulse_width = 3333333; /* ns */ |
| 170 | /* RC-5: 666,667 ns = 1/36 kHz * 32 cycles * 1 mark * 0.75 */ |
| 171 | /* RC-6A: 333,333 ns = 1/36 kHz * 16 cycles * 1 mark * 0.75 */ |
| 172 | params.noise_filter_min_width = 333333; /* ns */ |
| 173 | /* |
| 174 | * This board has inverted receive sense: |
| 175 | * mark is received as low logic level; |
| 176 | * falling edges are detected as rising edges; etc. |
| 177 | */ |
Andy Walls | 5a28d9a | 2010-07-18 19:57:25 -0300 | [diff] [blame] | 178 | params.invert_level = true; |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 179 | break; |
Djuri Baars | 076f0e3 | 2012-07-28 09:01:38 -0300 | [diff] [blame] | 180 | case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: |
Andy Walls | 98d109f | 2010-07-19 00:41:41 -0300 | [diff] [blame] | 181 | case CX23885_BOARD_TEVII_S470: |
Luis Alves | e600148 | 2013-10-01 22:11:35 -0300 | [diff] [blame] | 182 | case CX23885_BOARD_TBS_6980: |
| 183 | case CX23885_BOARD_TBS_6981: |
Andy Walls | 98d109f | 2010-07-19 00:41:41 -0300 | [diff] [blame] | 184 | /* |
| 185 | * The IR controller on this board only returns pulse widths. |
| 186 | * Any other mode setting will fail to set up the device. |
| 187 | */ |
| 188 | params.mode = V4L2_SUBDEV_IR_MODE_PULSE_WIDTH; |
| 189 | params.enable = true; |
| 190 | params.interrupt_enable = true; |
| 191 | params.shutdown = false; |
| 192 | |
| 193 | /* Setup for a standard NEC protocol */ |
| 194 | params.carrier_freq = 37917; /* Hz, 455 kHz/12 for NEC */ |
| 195 | params.carrier_range_lower = 33000; /* Hz */ |
| 196 | params.carrier_range_upper = 43000; /* Hz */ |
| 197 | params.duty_cycle = 33; /* percent, 33 percent for NEC */ |
| 198 | |
| 199 | /* |
| 200 | * NEC max pulse width: (64/3)/(455 kHz/12) * 16 nec_units |
| 201 | * (64/3)/(455 kHz/12) * 16 nec_units * 1.375 = 12378022 ns |
| 202 | */ |
| 203 | params.max_pulse_width = 12378022; /* ns */ |
| 204 | |
| 205 | /* |
| 206 | * NEC noise filter min width: (64/3)/(455 kHz/12) * 1 nec_unit |
| 207 | * (64/3)/(455 kHz/12) * 1 nec_units * 0.625 = 351648 ns |
| 208 | */ |
| 209 | params.noise_filter_min_width = 351648; /* ns */ |
| 210 | |
| 211 | params.modulation = false; |
| 212 | params.invert_level = true; |
| 213 | break; |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 214 | } |
| 215 | v4l2_subdev_call(dev->sd_ir, ir, rx_s_parameters, ¶ms); |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 216 | return 0; |
| 217 | } |
| 218 | |
David Härdeman | d8b4b58 | 2010-10-29 16:08:23 -0300 | [diff] [blame] | 219 | static int cx23885_input_ir_open(struct rc_dev *rc) |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 220 | { |
David Härdeman | d8b4b58 | 2010-10-29 16:08:23 -0300 | [diff] [blame] | 221 | struct cx23885_kernel_ir *kernel_ir = rc->priv; |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 222 | |
| 223 | if (kernel_ir->cx == NULL) |
| 224 | return -ENODEV; |
| 225 | |
| 226 | return cx23885_input_ir_start(kernel_ir->cx); |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 227 | } |
| 228 | |
| 229 | static void cx23885_input_ir_stop(struct cx23885_dev *dev) |
| 230 | { |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 231 | struct v4l2_subdev_ir_parameters params; |
| 232 | |
| 233 | if (dev->sd_ir == NULL) |
| 234 | return; |
| 235 | |
| 236 | /* |
| 237 | * Stop the sd_ir subdevice from generating notifications and |
| 238 | * scheduling work. |
| 239 | * It is shutdown this way in order to mitigate a race with |
| 240 | * cx23885_input_rx_work_handler() in the overrun case, which could |
| 241 | * re-enable the subdevice. |
| 242 | */ |
| 243 | atomic_set(&dev->ir_input_stopping, 1); |
| 244 | v4l2_subdev_call(dev->sd_ir, ir, rx_g_parameters, ¶ms); |
| 245 | while (params.shutdown == false) { |
| 246 | params.enable = false; |
| 247 | params.interrupt_enable = false; |
| 248 | params.shutdown = true; |
| 249 | v4l2_subdev_call(dev->sd_ir, ir, rx_s_parameters, ¶ms); |
| 250 | v4l2_subdev_call(dev->sd_ir, ir, rx_g_parameters, ¶ms); |
| 251 | } |
Linus Torvalds | 0b8e74c | 2012-10-07 17:49:05 +0900 | [diff] [blame] | 252 | flush_work(&dev->cx25840_work); |
| 253 | flush_work(&dev->ir_rx_work); |
| 254 | flush_work(&dev->ir_tx_work); |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 255 | } |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 256 | |
David Härdeman | d8b4b58 | 2010-10-29 16:08:23 -0300 | [diff] [blame] | 257 | static void cx23885_input_ir_close(struct rc_dev *rc) |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 258 | { |
David Härdeman | d8b4b58 | 2010-10-29 16:08:23 -0300 | [diff] [blame] | 259 | struct cx23885_kernel_ir *kernel_ir = rc->priv; |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 260 | |
| 261 | if (kernel_ir->cx != NULL) |
| 262 | cx23885_input_ir_stop(kernel_ir->cx); |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 263 | } |
| 264 | |
| 265 | int cx23885_input_init(struct cx23885_dev *dev) |
| 266 | { |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 267 | struct cx23885_kernel_ir *kernel_ir; |
David Härdeman | d8b4b58 | 2010-10-29 16:08:23 -0300 | [diff] [blame] | 268 | struct rc_dev *rc; |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 269 | char *rc_map; |
| 270 | enum rc_driver_type driver_type; |
| 271 | unsigned long allowed_protos; |
| 272 | |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 273 | int ret; |
| 274 | |
| 275 | /* |
| 276 | * If the IR device (hardware registers, chip, GPIO lines, etc.) isn't |
| 277 | * encapsulated in a v4l2_subdev, then I'm not going to deal with it. |
| 278 | */ |
| 279 | if (dev->sd_ir == NULL) |
| 280 | return -ENODEV; |
| 281 | |
| 282 | switch (dev->board) { |
Andy Walls | 9b3d8ec | 2011-06-08 21:24:25 -0300 | [diff] [blame] | 283 | case CX23885_BOARD_HAUPPAUGE_HVR1270: |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 284 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
Michael Krufky | 7fec6fe | 2009-11-11 15:46:09 -0300 | [diff] [blame] | 285 | case CX23885_BOARD_HAUPPAUGE_HVR1290: |
Andy Walls | 98d109f | 2010-07-19 00:41:41 -0300 | [diff] [blame] | 286 | case CX23885_BOARD_HAUPPAUGE_HVR1250: |
| 287 | /* Integrated CX2388[58] IR controller */ |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 288 | driver_type = RC_DRIVER_IR_RAW; |
David Härdeman | c003ab1 | 2012-10-11 19:11:54 -0300 | [diff] [blame] | 289 | allowed_protos = RC_BIT_ALL; |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 290 | /* The grey Hauppauge RC-5 remote */ |
Mauro Carvalho Chehab | 15195d3 | 2011-01-24 12:18:47 -0300 | [diff] [blame] | 291 | rc_map = RC_MAP_HAUPPAUGE; |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 292 | break; |
Djuri Baars | 076f0e3 | 2012-07-28 09:01:38 -0300 | [diff] [blame] | 293 | case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: |
| 294 | /* Integrated CX23885 IR controller */ |
| 295 | driver_type = RC_DRIVER_IR_RAW; |
David Härdeman | c003ab1 | 2012-10-11 19:11:54 -0300 | [diff] [blame] | 296 | allowed_protos = RC_BIT_NEC; |
Djuri Baars | 076f0e3 | 2012-07-28 09:01:38 -0300 | [diff] [blame] | 297 | /* The grey Terratec remote with orange buttons */ |
| 298 | rc_map = RC_MAP_NEC_TERRATEC_CINERGY_XS; |
| 299 | break; |
Andy Walls | 98d109f | 2010-07-19 00:41:41 -0300 | [diff] [blame] | 300 | case CX23885_BOARD_TEVII_S470: |
| 301 | /* Integrated CX23885 IR controller */ |
| 302 | driver_type = RC_DRIVER_IR_RAW; |
David Härdeman | c003ab1 | 2012-10-11 19:11:54 -0300 | [diff] [blame] | 303 | allowed_protos = RC_BIT_ALL; |
Andy Walls | 98d109f | 2010-07-19 00:41:41 -0300 | [diff] [blame] | 304 | /* A guess at the remote */ |
| 305 | rc_map = RC_MAP_TEVII_NEC; |
| 306 | break; |
Alfredo Jesús Delaiti | e5f670b | 2012-11-08 15:50:25 -0300 | [diff] [blame] | 307 | case CX23885_BOARD_MYGICA_X8507: |
| 308 | /* Integrated CX23885 IR controller */ |
| 309 | driver_type = RC_DRIVER_IR_RAW; |
| 310 | allowed_protos = RC_BIT_ALL; |
| 311 | /* A guess at the remote */ |
| 312 | rc_map = RC_MAP_TOTAL_MEDIA_IN_HAND_02; |
| 313 | break; |
Luis Alves | e600148 | 2013-10-01 22:11:35 -0300 | [diff] [blame] | 314 | case CX23885_BOARD_TBS_6980: |
| 315 | case CX23885_BOARD_TBS_6981: |
| 316 | /* Integrated CX23885 IR controller */ |
| 317 | driver_type = RC_DRIVER_IR_RAW; |
| 318 | allowed_protos = RC_BIT_ALL; |
| 319 | /* A guess at the remote */ |
| 320 | rc_map = RC_MAP_TBS_NEC; |
| 321 | break; |
nibble.max | d11a383 | 2014-09-29 11:17:36 -0300 | [diff] [blame] | 322 | case CX23885_BOARD_DVBSKY_T9580: |
nibble.max | 070e666 | 2014-10-23 07:02:16 -0300 | [diff] [blame] | 323 | case CX23885_BOARD_DVBSKY_T980C: |
| 324 | case CX23885_BOARD_DVBSKY_S950C: |
nibble.max | cba5480 | 2014-11-05 11:58:07 -0300 | [diff] [blame] | 325 | case CX23885_BOARD_DVBSKY_S950: |
nibble.max | c29d6a8 | 2014-11-05 11:58:38 -0300 | [diff] [blame] | 326 | case CX23885_BOARD_DVBSKY_S952: |
Nibble Max | c02ef64 | 2014-11-12 01:23:12 -0300 | [diff] [blame] | 327 | case CX23885_BOARD_DVBSKY_T982: |
nibble.max | d11a383 | 2014-09-29 11:17:36 -0300 | [diff] [blame] | 328 | /* Integrated CX23885 IR controller */ |
| 329 | driver_type = RC_DRIVER_IR_RAW; |
| 330 | allowed_protos = RC_BIT_ALL; |
| 331 | rc_map = RC_MAP_DVBSKY; |
| 332 | break; |
Olli Salonen | 61b103e | 2014-10-30 17:48:27 -0300 | [diff] [blame] | 333 | case CX23885_BOARD_TT_CT2_4500_CI: |
| 334 | /* Integrated CX23885 IR controller */ |
| 335 | driver_type = RC_DRIVER_IR_RAW; |
| 336 | allowed_protos = RC_BIT_ALL; |
| 337 | rc_map = RC_MAP_TT_1500; |
| 338 | break; |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 339 | default: |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 340 | return -ENODEV; |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 341 | } |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 342 | |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 343 | /* cx23885 board instance kernel IR state */ |
| 344 | kernel_ir = kzalloc(sizeof(struct cx23885_kernel_ir), GFP_KERNEL); |
| 345 | if (kernel_ir == NULL) |
| 346 | return -ENOMEM; |
| 347 | |
| 348 | kernel_ir->cx = dev; |
| 349 | kernel_ir->name = kasprintf(GFP_KERNEL, "cx23885 IR (%s)", |
| 350 | cx23885_boards[dev->board].name); |
| 351 | kernel_ir->phys = kasprintf(GFP_KERNEL, "pci-%s/ir0", |
| 352 | pci_name(dev->pci)); |
| 353 | |
| 354 | /* input device */ |
David Härdeman | d8b4b58 | 2010-10-29 16:08:23 -0300 | [diff] [blame] | 355 | rc = rc_allocate_device(); |
| 356 | if (!rc) { |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 357 | ret = -ENOMEM; |
| 358 | goto err_out_free; |
| 359 | } |
| 360 | |
David Härdeman | d8b4b58 | 2010-10-29 16:08:23 -0300 | [diff] [blame] | 361 | kernel_ir->rc = rc; |
| 362 | rc->input_name = kernel_ir->name; |
| 363 | rc->input_phys = kernel_ir->phys; |
| 364 | rc->input_id.bustype = BUS_PCI; |
| 365 | rc->input_id.version = 1; |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 366 | if (dev->pci->subsystem_vendor) { |
David Härdeman | d8b4b58 | 2010-10-29 16:08:23 -0300 | [diff] [blame] | 367 | rc->input_id.vendor = dev->pci->subsystem_vendor; |
| 368 | rc->input_id.product = dev->pci->subsystem_device; |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 369 | } else { |
David Härdeman | d8b4b58 | 2010-10-29 16:08:23 -0300 | [diff] [blame] | 370 | rc->input_id.vendor = dev->pci->vendor; |
| 371 | rc->input_id.product = dev->pci->device; |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 372 | } |
David Härdeman | d8b4b58 | 2010-10-29 16:08:23 -0300 | [diff] [blame] | 373 | rc->dev.parent = &dev->pci->dev; |
| 374 | rc->driver_type = driver_type; |
David Härdeman | c5540fb | 2014-04-03 20:32:21 -0300 | [diff] [blame] | 375 | rc->allowed_protocols = allowed_protos; |
David Härdeman | d8b4b58 | 2010-10-29 16:08:23 -0300 | [diff] [blame] | 376 | rc->priv = kernel_ir; |
| 377 | rc->open = cx23885_input_ir_open; |
| 378 | rc->close = cx23885_input_ir_close; |
| 379 | rc->map_name = rc_map; |
| 380 | rc->driver_name = MODULE_NAME; |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 381 | |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 382 | /* Go */ |
| 383 | dev->kernel_ir = kernel_ir; |
David Härdeman | d8b4b58 | 2010-10-29 16:08:23 -0300 | [diff] [blame] | 384 | ret = rc_register_device(rc); |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 385 | if (ret) |
| 386 | goto err_out_stop; |
| 387 | |
| 388 | return 0; |
| 389 | |
| 390 | err_out_stop: |
| 391 | cx23885_input_ir_stop(dev); |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 392 | dev->kernel_ir = NULL; |
David Härdeman | d8b4b58 | 2010-10-29 16:08:23 -0300 | [diff] [blame] | 393 | rc_free_device(rc); |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 394 | err_out_free: |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 395 | kfree(kernel_ir->phys); |
| 396 | kfree(kernel_ir->name); |
| 397 | kfree(kernel_ir); |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 398 | return ret; |
| 399 | } |
| 400 | |
| 401 | void cx23885_input_fini(struct cx23885_dev *dev) |
| 402 | { |
| 403 | /* Always stop the IR hardware from generating interrupts */ |
| 404 | cx23885_input_ir_stop(dev); |
| 405 | |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 406 | if (dev->kernel_ir == NULL) |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 407 | return; |
David Härdeman | d8b4b58 | 2010-10-29 16:08:23 -0300 | [diff] [blame] | 408 | rc_unregister_device(dev->kernel_ir->rc); |
Andy Walls | 43c2407 | 2010-06-27 23:15:35 -0300 | [diff] [blame] | 409 | kfree(dev->kernel_ir->phys); |
| 410 | kfree(dev->kernel_ir->name); |
| 411 | kfree(dev->kernel_ir); |
| 412 | dev->kernel_ir = NULL; |
Andy Walls | dbda8f7 | 2009-09-27 20:55:41 -0300 | [diff] [blame] | 413 | } |