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Maxime Riparddb84c032012-08-31 16:00:41 +02001/*
2 * Copyright 2012 Free Electrons
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/*
13 * The CFA-10049 is an expansion board for the CFA-10036 module, thus we
14 * need to include the CFA-10036 DTS.
15 */
Lothar Waßmannbc3875f2013-09-19 08:59:48 +020016#include "imx28-cfa10036.dts"
Maxime Riparddb84c032012-08-31 16:00:41 +020017
18/ {
19 model = "Crystalfontz CFA-10049 Board";
20 compatible = "crystalfontz,cfa10049", "crystalfontz,cfa10036", "fsl,imx28";
21
22 apb@80000000 {
Maxime Ripard223d1f92012-09-04 10:44:03 +020023 apbh@80000000 {
24 pinctrl@80018000 {
Alexandre Bellonidac63a52013-07-01 15:23:26 +020025 usb_pins_cfa10049: usb-10049@0 {
Maxime Ripard24196d52012-11-03 16:59:08 +010026 reg = <0>;
27 fsl,pinmux-ids = <
Lothar Waßmannbc3875f2013-09-19 08:59:48 +020028 MX28_PAD_GPMI_D07__GPIO_0_7
Maxime Ripard24196d52012-11-03 16:59:08 +010029 >;
Lothar Waßmann4191c342013-09-22 14:02:59 +080030 fsl,drive-strength = <MXS_DRIVE_4mA>;
31 fsl,voltage = <MXS_VOLTAGE_HIGH>;
32 fsl,pull-up = <MXS_PULL_DISABLE>;
Maxime Ripard24196d52012-11-03 16:59:08 +010033 };
34
Alexandre Bellonidac63a52013-07-01 15:23:26 +020035 i2cmux_pins_cfa10049: i2cmux-10049@0 {
36 reg = <0>;
37 fsl,pinmux-ids = <
Lothar Waßmannbc3875f2013-09-19 08:59:48 +020038 MX28_PAD_LCD_D22__GPIO_1_22
39 MX28_PAD_LCD_D23__GPIO_1_23
Alexandre Bellonidac63a52013-07-01 15:23:26 +020040 >;
Lothar Waßmann4191c342013-09-22 14:02:59 +080041 fsl,drive-strength = <MXS_DRIVE_4mA>;
42 fsl,voltage = <MXS_VOLTAGE_HIGH>;
43 fsl,pull-up = <MXS_PULL_DISABLE>;
Alexandre Bellonidac63a52013-07-01 15:23:26 +020044 };
45
46 mac0_pins_cfa10049: mac0-10049@0 {
47 reg = <0>;
48 fsl,pinmux-ids = <
Lothar Waßmannbc3875f2013-09-19 08:59:48 +020049 MX28_PAD_SSP2_SS2__GPIO_2_21
Alexandre Bellonidac63a52013-07-01 15:23:26 +020050 >;
Lothar Waßmann4191c342013-09-22 14:02:59 +080051 fsl,drive-strength = <MXS_DRIVE_4mA>;
52 fsl,voltage = <MXS_VOLTAGE_HIGH>;
53 fsl,pull-up = <MXS_PULL_DISABLE>;
Alexandre Bellonidac63a52013-07-01 15:23:26 +020054 };
55
56 pca_pins_cfa10049: pca-10049@0 {
Maxime Ripard5b615fb2012-11-20 15:33:35 +010057 reg = <0>;
58 fsl,pinmux-ids = <
Lothar Waßmannbc3875f2013-09-19 08:59:48 +020059 MX28_PAD_SSP2_SS0__GPIO_2_19
Alexandre Bellonidac63a52013-07-01 15:23:26 +020060 >;
Lothar Waßmann4191c342013-09-22 14:02:59 +080061 fsl,drive-strength = <MXS_DRIVE_4mA>;
62 fsl,voltage = <MXS_VOLTAGE_HIGH>;
63 fsl,pull-up = <MXS_PULL_ENABLE>;
Alexandre Bellonidac63a52013-07-01 15:23:26 +020064 };
65
66 rotary_pins_cfa10049: rotary-10049@0 {
67 reg = <0>;
68 fsl,pinmux-ids = <
Lothar Waßmannbc3875f2013-09-19 08:59:48 +020069 MX28_PAD_I2C0_SCL__GPIO_3_24
70 MX28_PAD_I2C0_SDA__GPIO_3_25
Alexandre Bellonidac63a52013-07-01 15:23:26 +020071 >;
Lothar Waßmann4191c342013-09-22 14:02:59 +080072 fsl,drive-strength = <MXS_DRIVE_4mA>;
73 fsl,voltage = <MXS_VOLTAGE_HIGH>;
74 fsl,pull-up = <MXS_PULL_ENABLE>;
Alexandre Bellonidac63a52013-07-01 15:23:26 +020075 };
76
77 rotary_btn_pins_cfa10049: rotary-btn-10049@0 {
78 reg = <0>;
79 fsl,pinmux-ids = <
Lothar Waßmannbc3875f2013-09-19 08:59:48 +020080 MX28_PAD_SAIF1_SDATA0__GPIO_3_26
Maxime Ripard5b615fb2012-11-20 15:33:35 +010081 >;
Lothar Waßmann4191c342013-09-22 14:02:59 +080082 fsl,drive-strength = <MXS_DRIVE_4mA>;
83 fsl,voltage = <MXS_VOLTAGE_HIGH>;
84 fsl,pull-up = <MXS_PULL_ENABLE>;
Maxime Ripard5b615fb2012-11-20 15:33:35 +010085 };
86
Maxime Ripard1fe42742013-01-25 09:54:07 +010087 spi2_pins_cfa10049: spi2-cfa10049@0 {
88 reg = <0>;
89 fsl,pinmux-ids = <
Lothar Waßmannbc3875f2013-09-19 08:59:48 +020090 MX28_PAD_SSP2_SCK__GPIO_2_16
91 MX28_PAD_SSP2_MOSI__GPIO_2_17
92 MX28_PAD_SSP2_MISO__GPIO_2_18
93 MX28_PAD_AUART1_TX__GPIO_3_5
Maxime Ripard1fe42742013-01-25 09:54:07 +010094 >;
Lothar Waßmann4191c342013-09-22 14:02:59 +080095 fsl,drive-strength = <MXS_DRIVE_8mA>;
96 fsl,voltage = <MXS_VOLTAGE_HIGH>;
97 fsl,pull-up = <MXS_PULL_ENABLE>;
Maxime Ripard1fe42742013-01-25 09:54:07 +010098 };
99
Maxime Ripard223d1f92012-09-04 10:44:03 +0200100 spi3_pins_cfa10049: spi3-cfa10049@0 {
101 reg = <0>;
102 fsl,pinmux-ids = <
Lothar Waßmannbc3875f2013-09-19 08:59:48 +0200103 MX28_PAD_GPMI_RDN__GPIO_0_24
104 MX28_PAD_GPMI_RESETN__GPIO_0_28
105 MX28_PAD_GPMI_CE1N__GPIO_0_17
106 MX28_PAD_GPMI_ALE__GPIO_0_26
107 MX28_PAD_GPMI_CLE__GPIO_0_27
Maxime Ripard223d1f92012-09-04 10:44:03 +0200108 >;
Lothar Waßmann4191c342013-09-22 14:02:59 +0800109 fsl,drive-strength = <MXS_DRIVE_8mA>;
110 fsl,voltage = <MXS_VOLTAGE_HIGH>;
111 fsl,pull-up = <MXS_PULL_ENABLE>;
Maxime Ripard223d1f92012-09-04 10:44:03 +0200112 };
Maxime Ripard1fe42742013-01-25 09:54:07 +0100113
114 lcdif_18bit_pins_cfa10049: lcdif-18bit@0 {
115 reg = <0>;
116 fsl,pinmux-ids = <
Lothar Waßmannbc3875f2013-09-19 08:59:48 +0200117 MX28_PAD_LCD_D00__LCD_D0
118 MX28_PAD_LCD_D01__LCD_D1
119 MX28_PAD_LCD_D02__LCD_D2
120 MX28_PAD_LCD_D03__LCD_D3
121 MX28_PAD_LCD_D04__LCD_D4
122 MX28_PAD_LCD_D05__LCD_D5
123 MX28_PAD_LCD_D06__LCD_D6
124 MX28_PAD_LCD_D07__LCD_D7
125 MX28_PAD_LCD_D08__LCD_D8
126 MX28_PAD_LCD_D09__LCD_D9
127 MX28_PAD_LCD_D10__LCD_D10
128 MX28_PAD_LCD_D11__LCD_D11
129 MX28_PAD_LCD_D12__LCD_D12
130 MX28_PAD_LCD_D13__LCD_D13
131 MX28_PAD_LCD_D14__LCD_D14
132 MX28_PAD_LCD_D15__LCD_D15
133 MX28_PAD_LCD_D16__LCD_D16
134 MX28_PAD_LCD_D17__LCD_D17
Maxime Ripard1fe42742013-01-25 09:54:07 +0100135 >;
Lothar Waßmann4191c342013-09-22 14:02:59 +0800136 fsl,drive-strength = <MXS_DRIVE_4mA>;
137 fsl,voltage = <MXS_VOLTAGE_HIGH>;
138 fsl,pull-up = <MXS_PULL_DISABLE>;
Maxime Ripard1fe42742013-01-25 09:54:07 +0100139 };
140
141 lcdif_pins_cfa10049: lcdif-evk@0 {
142 reg = <0>;
143 fsl,pinmux-ids = <
Lothar Waßmannbc3875f2013-09-19 08:59:48 +0200144 MX28_PAD_LCD_RD_E__LCD_VSYNC
145 MX28_PAD_LCD_WR_RWN__LCD_HSYNC
146 MX28_PAD_LCD_RS__LCD_DOTCLK
147 MX28_PAD_LCD_CS__LCD_ENABLE
Maxime Ripard1fe42742013-01-25 09:54:07 +0100148 >;
Lothar Waßmann4191c342013-09-22 14:02:59 +0800149 fsl,drive-strength = <MXS_DRIVE_4mA>;
150 fsl,voltage = <MXS_VOLTAGE_HIGH>;
151 fsl,pull-up = <MXS_PULL_DISABLE>;
Maxime Ripard1fe42742013-01-25 09:54:07 +0100152 };
Alexandre Belloni7d403402013-03-29 19:46:41 +0100153
Alexandre Bellonidac63a52013-07-01 15:23:26 +0200154 lcdif_pins_cfa10049_pullup: lcdif-10049-pullup@0 {
155 reg = <0>;
156 fsl,pinmux-ids = <
Lothar Waßmannbc3875f2013-09-19 08:59:48 +0200157 MX28_PAD_LCD_RESET__GPIO_3_30
Alexandre Bellonidac63a52013-07-01 15:23:26 +0200158 >;
Lothar Waßmann4191c342013-09-22 14:02:59 +0800159 fsl,drive-strength = <MXS_DRIVE_4mA>;
160 fsl,voltage = <MXS_VOLTAGE_HIGH>;
161 fsl,pull-up = <MXS_PULL_ENABLE>;
Alexandre Bellonidac63a52013-07-01 15:23:26 +0200162 };
163
Alexandre Belloni7d403402013-03-29 19:46:41 +0100164 w1_gpio_pins: w1-gpio@0 {
165 reg = <0>;
166 fsl,pinmux-ids = <
Lothar Waßmannbc3875f2013-09-19 08:59:48 +0200167 MX28_PAD_LCD_D21__GPIO_1_21
Alexandre Belloni7d403402013-03-29 19:46:41 +0100168 >;
Lothar Waßmann4191c342013-09-22 14:02:59 +0800169 fsl,drive-strength = <MXS_DRIVE_8mA>;
170 fsl,voltage = <MXS_VOLTAGE_HIGH>;
171 fsl,pull-up = <MXS_PULL_DISABLE>; /* 0 will enable the keeper */
Alexandre Belloni7d403402013-03-29 19:46:41 +0100172 };
Maxime Ripard1fe42742013-01-25 09:54:07 +0100173 };
174
175 lcdif@80030000 {
176 pinctrl-names = "default";
177 pinctrl-0 = <&lcdif_18bit_pins_cfa10049
Alexandre Bellonidac63a52013-07-01 15:23:26 +0200178 &lcdif_pins_cfa10049
179 &lcdif_pins_cfa10049_pullup>;
Shawn Guo0d9f8212013-03-14 11:37:15 +0800180 display = <&display>;
Maxime Ripard1fe42742013-01-25 09:54:07 +0100181 status = "okay";
Shawn Guo0d9f8212013-03-14 11:37:15 +0800182
183 display: display {
184 bits-per-pixel = <32>;
185 bus-width = <18>;
186
187 display-timings {
188 native-mode = <&timing0>;
189 timing0: timing0 {
190 clock-frequency = <9216000>;
191 hactive = <320>;
192 vactive = <480>;
193 hback-porch = <2>;
194 hfront-porch = <2>;
195 vback-porch = <2>;
196 vfront-porch = <2>;
197 hsync-len = <15>;
198 vsync-len = <15>;
199 hsync-active = <0>;
200 vsync-active = <0>;
201 de-active = <1>;
202 pixelclk-active = <1>;
203 };
204 };
205 };
Maxime Ripard223d1f92012-09-04 10:44:03 +0200206 };
Maxime Ripard223d1f92012-09-04 10:44:03 +0200207 };
208
Maxime Riparddb84c032012-08-31 16:00:41 +0200209 apbx@80040000 {
Maxime Ripard1fe42742013-01-25 09:54:07 +0100210 pwm: pwm@80064000 {
Maxime Ripardb4009322013-04-22 11:55:55 +0200211 pinctrl-names = "default";
212 pinctrl-0 = <&pwm3_pins_b>;
Maxime Ripard1fe42742013-01-25 09:54:07 +0100213 status = "okay";
214 };
215
Maxime Riparddb84c032012-08-31 16:00:41 +0200216 i2c1: i2c@8005a000 {
217 pinctrl-names = "default";
218 pinctrl-0 = <&i2c1_pins_a>;
219 status = "okay";
220 };
Maxime Ripard186e3d92012-09-03 16:15:25 +0200221
Maxime Ripard06e9eff2012-10-25 18:23:54 +0200222 i2cmux {
223 compatible = "i2c-mux-gpio";
224 #address-cells = <1>;
225 #size-cells = <0>;
Alexandre Bellonidac63a52013-07-01 15:23:26 +0200226 pinctrl-names = "default";
227 pinctrl-0 = <&i2cmux_pins_cfa10049>;
Maxime Ripard06e9eff2012-10-25 18:23:54 +0200228 mux-gpios = <&gpio1 22 0 &gpio1 23 0>;
229 i2c-parent = <&i2c1>;
230
231 i2c@0 {
Maxime Ripard433bdb62013-11-18 15:37:52 +0100232 #address-cells = <1>;
233 #size-cells = <0>;
Maxime Ripard06e9eff2012-10-25 18:23:54 +0200234 reg = <0>;
Maxime Ripard433bdb62013-11-18 15:37:52 +0100235
236 adc0: nau7802@2a {
237 compatible = "nuvoton,nau7802";
238 reg = <0x2a>;
239 nuvoton,vldo = <3000>;
240 };
Maxime Ripard06e9eff2012-10-25 18:23:54 +0200241 };
242
243 i2c@1 {
Maxime Ripard433bdb62013-11-18 15:37:52 +0100244 #address-cells = <1>;
245 #size-cells = <0>;
Maxime Ripard06e9eff2012-10-25 18:23:54 +0200246 reg = <1>;
Maxime Ripard433bdb62013-11-18 15:37:52 +0100247
248 adc1: nau7802@2a {
249 compatible = "nuvoton,nau7802";
250 reg = <0x2a>;
251 nuvoton,vldo = <3000>;
252 };
Maxime Ripard06e9eff2012-10-25 18:23:54 +0200253 };
254
255 i2c@2 {
Maxime Ripard433bdb62013-11-18 15:37:52 +0100256 #address-cells = <1>;
257 #size-cells = <0>;
Maxime Ripard06e9eff2012-10-25 18:23:54 +0200258 reg = <2>;
Maxime Ripard433bdb62013-11-18 15:37:52 +0100259
260 adc2: nau7802@2a {
261 compatible = "nuvoton,nau7802";
262 reg = <0x2a>;
263 nuvoton,vldo = <3000>;
264 };
Maxime Ripard06e9eff2012-10-25 18:23:54 +0200265 };
266
267 i2c@3 {
268 reg = <3>;
Maxime Ripard5b615fb2012-11-20 15:33:35 +0100269 #address-cells = <1>;
270 #size-cells = <0>;
271
272 pca9555: pca9555@20 {
273 compatible = "nxp,pca9555";
Alexandre Bellonidac63a52013-07-01 15:23:26 +0200274 pinctrl-names = "default";
275 pinctrl-0 = <&pca_pins_cfa10049>;
Maxime Ripard5b615fb2012-11-20 15:33:35 +0100276 interrupt-parent = <&gpio2>;
277 interrupts = <19 0x2>;
278 gpio-controller;
279 #gpio-cells = <2>;
280 interrupt-controller;
281 #interrupt-cells = <2>;
282 reg = <0x20>;
283 };
Maxime Ripard06e9eff2012-10-25 18:23:54 +0200284 };
285 };
286
Maxime Ripard186e3d92012-09-03 16:15:25 +0200287 usbphy1: usbphy@8007e000 {
288 status = "okay";
289 };
Alexandre Belloniac77bc22013-04-05 14:33:02 +0200290
291 lradc@80050000 {
292 status = "okay";
293 fsl,lradc-touchscreen-wires = <4>;
294 };
Maxime Ripard186e3d92012-09-03 16:15:25 +0200295 };
296 };
297
298 ahb@80080000 {
299 usb1: usb@80090000 {
300 vbus-supply = <&reg_usb1_vbus>;
301 pinctrl-0 = <&usbphy1_pins_a>;
302 pinctrl-names = "default";
303 status = "okay";
304 };
305 };
306
307 regulators {
308 compatible = "simple-bus";
Shawn Guo352d3182014-02-07 23:18:30 +0800309 #address-cells = <1>;
310 #size-cells = <0>;
Maxime Ripard186e3d92012-09-03 16:15:25 +0200311
Shawn Guo352d3182014-02-07 23:18:30 +0800312 reg_usb1_vbus: regulator@0 {
Maxime Ripard186e3d92012-09-03 16:15:25 +0200313 compatible = "regulator-fixed";
Shawn Guo352d3182014-02-07 23:18:30 +0800314 reg = <0>;
Alexandre Bellonidac63a52013-07-01 15:23:26 +0200315 pinctrl-names = "default";
316 pinctrl-0 = <&usb_pins_cfa10049>;
Maxime Ripard186e3d92012-09-03 16:15:25 +0200317 regulator-name = "usb1_vbus";
318 regulator-min-microvolt = <5000000>;
319 regulator-max-microvolt = <5000000>;
320 gpio = <&gpio0 7 1>;
Maxime Riparddb84c032012-08-31 16:00:41 +0200321 };
322 };
Maxime Ripard8eec4b32012-10-07 10:36:28 +0800323
324 ahb@80080000 {
325 mac0: ethernet@800f0000 {
326 phy-mode = "rmii";
327 pinctrl-names = "default";
Alexandre Bellonidac63a52013-07-01 15:23:26 +0200328 pinctrl-0 = <&mac0_pins_a
329 &mac0_pins_cfa10049>;
Maxime Ripard8eec4b32012-10-07 10:36:28 +0800330 phy-reset-gpios = <&gpio2 21 0>;
331 phy-reset-duration = <100>;
332 status = "okay";
333 };
334 };
Maxime Ripard7ecc70a2013-01-25 09:39:35 +0100335
Maxime Ripard1fe42742013-01-25 09:54:07 +0100336 spi2 {
337 compatible = "spi-gpio";
338 pinctrl-names = "default";
339 pinctrl-0 = <&spi2_pins_cfa10049>;
340 status = "okay";
341 gpio-sck = <&gpio2 16 0>;
342 gpio-mosi = <&gpio2 17 0>;
343 gpio-miso = <&gpio2 18 0>;
Brian Lilly65bc6422013-06-13 15:43:43 +0200344 cs-gpios = <&gpio3 5 0>;
Maxime Ripard1fe42742013-01-25 09:54:07 +0100345 num-chipselects = <1>;
346 #address-cells = <1>;
347 #size-cells = <0>;
348
349 hx8357: hx8357@0 {
350 compatible = "himax,hx8357b", "himax,hx8357";
351 reg = <0>;
352 spi-max-frequency = <100000>;
353 spi-cpol;
354 spi-cpha;
355 gpios-reset = <&gpio3 30 0>;
356 im-gpios = <&gpio5 4 0 &gpio5 5 0 &gpio5 6 0>;
357 };
358 };
359
Maxime Ripard7ecc70a2013-01-25 09:39:35 +0100360 spi3 {
361 compatible = "spi-gpio";
362 pinctrl-names = "default";
363 pinctrl-0 = <&spi3_pins_cfa10049>;
364 status = "okay";
365 gpio-sck = <&gpio0 24 0>;
366 gpio-mosi = <&gpio0 28 0>;
367 cs-gpios = <&gpio0 17 0 &gpio0 26 0 &gpio0 27 0>;
368 num-chipselects = <3>;
369 #address-cells = <1>;
370 #size-cells = <0>;
371
372 gpio5: gpio5@0 {
373 compatible = "fairchild,74hc595";
374 gpio-controller;
375 #gpio-cells = <2>;
376 reg = <0>;
377 registers-number = <2>;
378 spi-max-frequency = <100000>;
379 };
380
381 gpio6: gpio6@1 {
382 compatible = "fairchild,74hc595";
383 gpio-controller;
384 #gpio-cells = <2>;
385 reg = <1>;
386 registers-number = <4>;
387 spi-max-frequency = <100000>;
388 };
389
390 dac0: dh2228@2 {
391 compatible = "rohm,dh2228fv";
392 reg = <2>;
393 spi-max-frequency = <100000>;
394 };
395 };
Maxime Ripard1fe42742013-01-25 09:54:07 +0100396
Maxime Riparda640cf62013-01-31 11:00:23 +0100397 gpio_keys {
398 compatible = "gpio-keys";
Alexandre Bellonidac63a52013-07-01 15:23:26 +0200399 pinctrl-names = "default";
400 pinctrl-0 = <&rotary_btn_pins_cfa10049>;
Maxime Riparda640cf62013-01-31 11:00:23 +0100401 #address-cells = <1>;
402 #size-cells = <0>;
403
404 rotary_button {
405 label = "rotary_button";
406 gpios = <&gpio3 26 1>;
407 debounce-interval = <10>;
408 linux,code = <28>;
409 };
410 };
411
Maxime Ripard0943b962013-01-31 11:00:24 +0100412 rotary {
413 compatible = "rotary-encoder";
Alexandre Bellonidac63a52013-07-01 15:23:26 +0200414 pinctrl-names = "default";
415 pinctrl-0 = <&rotary_pins_cfa10049>;
Maxime Ripard0943b962013-01-31 11:00:24 +0100416 gpios = <&gpio3 24 1>, <&gpio3 25 1>;
417 linux,axis = <1>; /* REL_Y */
418 rotary-encoder,relative-axis;
419 };
420
Maxime Ripard1fe42742013-01-25 09:54:07 +0100421 backlight {
422 compatible = "pwm-backlight";
423 pwms = <&pwm 3 5000000>;
424 brightness-levels = <0 4 8 16 32 64 128 255>;
425 default-brightness-level = <6>;
Alexandre Belloni7d403402013-03-29 19:46:41 +0100426
427 };
428
429 onewire@0 {
430 compatible = "w1-gpio";
431 pinctrl-names = "default";
432 pinctrl-0 = <&w1_gpio_pins>;
433 status = "okay";
434 gpios = <&gpio1 21 0>;
Maxime Ripard1fe42742013-01-25 09:54:07 +0100435 };
Maxime Riparddb84c032012-08-31 16:00:41 +0200436};