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Srinidhi Kasagaraa44ef42009-11-28 08:17:18 +01001/*
Linus Walleijc15def12011-12-15 13:38:40 +01002 * Copyright (C) 2008-2009 ST-Ericsson SA
Srinidhi Kasagaraa44ef42009-11-28 08:17:18 +01003 *
4 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2, as
8 * published by the Free Software Foundation.
9 *
10 */
11#include <linux/types.h>
12#include <linux/init.h>
13#include <linux/device.h>
14#include <linux/amba/bus.h>
Rabin Vincentaa90eb92011-02-08 09:24:37 +053015#include <linux/interrupt.h>
Srinidhi Kasagaraa44ef42009-11-28 08:17:18 +010016#include <linux/irq.h>
17#include <linux/platform_device.h>
Rabin Vincentcc2c1332010-03-01 05:03:31 +010018#include <linux/io.h>
Lee Jones3a8e39c2012-07-06 12:46:23 +020019#include <linux/mfd/abx500/ab8500.h>
Lee Jones661c6af2012-10-08 14:20:10 +010020#include <linux/mfd/dbx500-prcmu.h>
Lee Jonesfa86a762012-09-27 10:17:36 +010021#include <linux/of.h>
22#include <linux/of_platform.h>
23#include <linux/regulator/machine.h>
Srinidhi Kasagaraa44ef42009-11-28 08:17:18 +010024
Axel Lin5caecb42012-09-02 20:25:47 +080025#include <asm/pmu.h>
Srinidhi Kasagaraa44ef42009-11-28 08:17:18 +010026#include <asm/mach/map.h>
Lee Jonesfa86a762012-09-27 10:17:36 +010027#include <asm/mach/arch.h>
28#include <asm/hardware/gic.h>
Linus Walleij0f332862011-08-22 08:33:30 +010029#include <plat/gpio-nomadik.h>
Srinidhi Kasagaraa44ef42009-11-28 08:17:18 +010030#include <mach/hardware.h>
Rabin Vincentcc2c1332010-03-01 05:03:31 +010031#include <mach/setup.h>
Rabin Vincent5b1f7dd2010-05-03 08:25:52 +010032#include <mach/devices.h>
Arnd Bergmanndb298da2012-08-24 15:19:33 +020033#include <linux/platform_data/usb-musb-ux500.h>
Lee Joneseda413c2012-02-06 11:22:24 -080034#include <mach/db8500-regs.h>
Rabin Vincent94bdc0e2010-03-03 04:54:37 +010035
Rabin Vincentfbf1ead2010-09-29 19:46:32 +053036#include "devices-db8500.h"
Mian Yousaf Kaukab6f3f3c3f2011-01-21 18:21:50 +010037#include "ste-dma40-db8500.h"
Lee Jonesfa86a762012-09-27 10:17:36 +010038#include "board-mop500.h"
Rabin Vincentfbf1ead2010-09-29 19:46:32 +053039
Srinidhi Kasagaraa44ef42009-11-28 08:17:18 +010040/* minimum static i/o mapping required to boot U8500 platforms */
Rabin Vincentabf12d72010-12-08 11:07:59 +053041static struct map_desc u8500_uart_io_desc[] __initdata = {
Rabin Vincent92389ca2010-12-08 11:07:57 +053042 __IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),
43 __IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
Rabin Vincentabf12d72010-12-08 11:07:59 +053044};
Linus Walleijbc71c092012-01-23 11:54:44 +010045/* U8500 and U9540 common io_desc */
46static struct map_desc u8500_common_io_desc[] __initdata = {
Linus Walleij215e83d2011-12-14 18:15:42 +010047 /* SCU base also covers GIC CPU BASE and TWD with its 4K page */
48 __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
Rabin Vincent92389ca2010-12-08 11:07:57 +053049 __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
50 __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
Rabin Vincent92389ca2010-12-08 11:07:57 +053051 __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
Rabin Vincent92389ca2010-12-08 11:07:57 +053052 __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
53
54 __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
55 __IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
56 __IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
57 __IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
58 __IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),
59
Rabin Vincentc9c09572010-05-03 07:34:53 +010060 __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
Rabin Vincent94bdc0e2010-03-03 04:54:37 +010061 __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
62 __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
63 __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
Michel Jaouenee9581d2012-02-01 10:30:53 +010064};
65
66/* U8500 IO map specific description */
67static struct map_desc u8500_io_desc[] __initdata = {
68 __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
Mattias Wallinfcbd4582010-12-02 16:20:42 +010069 __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),
Michel Jaouenee9581d2012-02-01 10:30:53 +010070
71};
72
73/* U9540 IO map specific description */
74static struct map_desc u9540_io_desc[] __initdata = {
75 __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K),
76 __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K),
Rabin Vincent75a36ee2010-03-01 05:05:56 +010077};
78
Srinidhi Kasagaraa44ef42009-11-28 08:17:18 +010079void __init u8500_map_io(void)
80{
Rabin Vincentabf12d72010-12-08 11:07:59 +053081 /*
82 * Map the UARTs early so that the DEBUG_LL stuff continues to work.
83 */
84 iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc));
85
86 ux500_map_io();
87
Linus Walleijbc71c092012-01-23 11:54:44 +010088 iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc));
Rabin Vincent75a36ee2010-03-01 05:05:56 +010089
Linus Walleije1bbb552012-08-09 17:10:36 +020090 if (cpu_is_ux540_family())
Michel Jaouenee9581d2012-02-01 10:30:53 +010091 iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc));
92 else
93 iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
Rabin Vincent75a36ee2010-03-01 05:05:56 +010094
Linus Walleij11871892011-03-29 16:53:29 +020095 _PRCMU_BASE = __io_address(U8500_PRCMU_BASE);
Srinidhi Kasagaraa44ef42009-11-28 08:17:18 +010096}
97
Rabin Vincentaa90eb92011-02-08 09:24:37 +053098static struct resource db8500_pmu_resources[] = {
99 [0] = {
100 .start = IRQ_DB8500_PMU,
101 .end = IRQ_DB8500_PMU,
102 .flags = IORESOURCE_IRQ,
103 },
104};
105
106/*
107 * The PMU IRQ lines of two cores are wired together into a single interrupt.
108 * Bounce the interrupt to the other core if it's not ours.
109 */
110static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
111{
112 irqreturn_t ret = handler(irq, dev);
113 int other = !smp_processor_id();
114
115 if (ret == IRQ_NONE && cpu_online(other))
116 irq_set_affinity(irq, cpumask_of(other));
117
118 /*
119 * We should be able to get away with the amount of IRQ_NONEs we give,
120 * while still having the spurious IRQ detection code kick in if the
121 * interrupt really starts hitting spuriously.
122 */
123 return ret;
124}
125
Lee Jones3a8e39c2012-07-06 12:46:23 +0200126struct arm_pmu_platdata db8500_pmu_platdata = {
Rabin Vincentaa90eb92011-02-08 09:24:37 +0530127 .handle_irq = db8500_pmu_handler,
128};
129
130static struct platform_device db8500_pmu_device = {
131 .name = "arm-pmu",
Sudeep KarkadaNageshadf3d17e2012-07-19 09:50:21 +0100132 .id = -1,
Rabin Vincentaa90eb92011-02-08 09:24:37 +0530133 .num_resources = ARRAY_SIZE(db8500_pmu_resources),
134 .resource = db8500_pmu_resources,
135 .dev.platform_data = &db8500_pmu_platdata,
136};
137
Mattias Nilsson3df57bc2011-05-16 00:15:05 +0200138static struct platform_device db8500_prcmu_device = {
139 .name = "db8500-prcmu",
140};
141
Rabin Vincentaa90eb92011-02-08 09:24:37 +0530142static struct platform_device *platform_devs[] __initdata = {
143 &u8500_dma40_device,
144 &db8500_pmu_device,
Mattias Nilsson3df57bc2011-05-16 00:15:05 +0200145 &db8500_prcmu_device,
Rabin Vincentaa90eb92011-02-08 09:24:37 +0530146};
147
Rabin Vincent01afdd12010-12-08 11:07:55 +0530148static resource_size_t __initdata db8500_gpio_base[] = {
149 U8500_GPIOBANK0_BASE,
150 U8500_GPIOBANK1_BASE,
151 U8500_GPIOBANK2_BASE,
152 U8500_GPIOBANK3_BASE,
153 U8500_GPIOBANK4_BASE,
154 U8500_GPIOBANK5_BASE,
155 U8500_GPIOBANK6_BASE,
156 U8500_GPIOBANK7_BASE,
157 U8500_GPIOBANK8_BASE,
158};
159
Lee Jones18403422012-02-06 11:22:21 -0800160static void __init db8500_add_gpios(struct device *parent)
Rabin Vincent01afdd12010-12-08 11:07:55 +0530161{
162 struct nmk_gpio_platform_data pdata = {
Linus Walleijc15def12011-12-15 13:38:40 +0100163 .supports_sleepmode = true,
Rabin Vincent01afdd12010-12-08 11:07:55 +0530164 };
165
Lee Jones18403422012-02-06 11:22:21 -0800166 dbx500_add_gpios(parent, ARRAY_AND_SIZE(db8500_gpio_base),
Rabin Vincent01afdd12010-12-08 11:07:55 +0530167 IRQ_DB8500_GPIO0, &pdata);
Linus Walleije98ea772012-04-26 23:57:25 +0200168 dbx500_add_pinctrl(parent, "pinctrl-db8500");
Rabin Vincent01afdd12010-12-08 11:07:55 +0530169}
170
Mian Yousaf Kaukab6f3f3c3f2011-01-21 18:21:50 +0100171static int usb_db8500_rx_dma_cfg[] = {
172 DB8500_DMA_DEV38_USB_OTG_IEP_1_9,
173 DB8500_DMA_DEV37_USB_OTG_IEP_2_10,
174 DB8500_DMA_DEV36_USB_OTG_IEP_3_11,
175 DB8500_DMA_DEV19_USB_OTG_IEP_4_12,
176 DB8500_DMA_DEV18_USB_OTG_IEP_5_13,
177 DB8500_DMA_DEV17_USB_OTG_IEP_6_14,
178 DB8500_DMA_DEV16_USB_OTG_IEP_7_15,
179 DB8500_DMA_DEV39_USB_OTG_IEP_8
180};
181
182static int usb_db8500_tx_dma_cfg[] = {
183 DB8500_DMA_DEV38_USB_OTG_OEP_1_9,
184 DB8500_DMA_DEV37_USB_OTG_OEP_2_10,
185 DB8500_DMA_DEV36_USB_OTG_OEP_3_11,
186 DB8500_DMA_DEV19_USB_OTG_OEP_4_12,
187 DB8500_DMA_DEV18_USB_OTG_OEP_5_13,
188 DB8500_DMA_DEV17_USB_OTG_OEP_6_14,
189 DB8500_DMA_DEV16_USB_OTG_OEP_7_15,
190 DB8500_DMA_DEV39_USB_OTG_OEP_8
191};
192
Lee Joneseda413c2012-02-06 11:22:24 -0800193static const char *db8500_read_soc_id(void)
194{
195 void __iomem *uid = __io_address(U8500_BB_UID_BASE);
196
197 return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
198 readl((u32 *)uid+1),
199 readl((u32 *)uid+1), readl((u32 *)uid+2),
200 readl((u32 *)uid+3), readl((u32 *)uid+4));
201}
202
203static struct device * __init db8500_soc_device_init(void)
204{
205 const char *soc_id = db8500_read_soc_id();
206
207 return ux500_soc_device_init(soc_id);
208}
209
Srinidhi Kasagaraa44ef42009-11-28 08:17:18 +0100210/*
211 * This function is called from the board init
212 */
Lee Jones3a8e39c2012-07-06 12:46:23 +0200213struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500)
Srinidhi Kasagaraa44ef42009-11-28 08:17:18 +0100214{
Lee Joneseda413c2012-02-06 11:22:24 -0800215 struct device *parent;
Lee Jonesb024a0c2012-02-06 11:22:25 -0800216 int i;
Lee Joneseda413c2012-02-06 11:22:24 -0800217
218 parent = db8500_soc_device_init();
219
220 db8500_add_rtc(parent);
221 db8500_add_gpios(parent);
222 db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
Rabin Vincentfbf1ead2010-09-29 19:46:32 +0530223
Lee Jonesb024a0c2012-02-06 11:22:25 -0800224 platform_device_register_data(parent,
225 "cpufreq-u8500", -1, NULL, 0);
226
Lee Jonesf65c1982012-05-29 10:03:09 +0800227 for (i = 0; i < ARRAY_SIZE(platform_devs); i++)
228 platform_devs[i]->dev.parent = parent;
229
Lee Jones3a8e39c2012-07-06 12:46:23 +0200230 db8500_prcmu_device.dev.platform_data = ab8500;
231
Lee Jonesf65c1982012-05-29 10:03:09 +0800232 platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
233
234 return parent;
235}
236
Lee Jonesfa86a762012-09-27 10:17:36 +0100237#ifdef CONFIG_MACH_UX500_DT
Lee Jonesf65c1982012-05-29 10:03:09 +0800238
Lee Jonesfa86a762012-09-27 10:17:36 +0100239/* TODO: Once all pieces are DT:ed, remove completely. */
240static struct device * __init u8500_of_init_devices(void)
241{
242 struct device *parent = db8500_soc_device_init();
Lee Jonesf65c1982012-05-29 10:03:09 +0800243
Lee Jonesf65c1982012-05-29 10:03:09 +0800244 db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
245
246 platform_device_register_data(parent,
247 "cpufreq-u8500", -1, NULL, 0);
248
Lee Jones38cd8c52012-06-27 08:42:08 +0100249 u8500_dma40_device.dev.parent = parent;
Lee Jonesb024a0c2012-02-06 11:22:25 -0800250
Lee Jones08d05022012-04-19 21:36:42 +0100251 /*
252 * Devices to be DT:ed:
253 * u8500_dma40_device = todo
Lee Jonesda384872012-06-15 17:37:44 +0100254 * db8500_pmu_device = done
Lee Jonesdee42eb2012-05-28 16:47:15 +0800255 * db8500_prcmu_device = done
Lee Jones08d05022012-04-19 21:36:42 +0100256 */
Lee Jones38cd8c52012-06-27 08:42:08 +0100257 platform_device_register(&u8500_dma40_device);
Srinidhi Kasagaraa44ef42009-11-28 08:17:18 +0100258
Lee Joneseda413c2012-02-06 11:22:24 -0800259 return parent;
Srinidhi Kasagaraa44ef42009-11-28 08:17:18 +0100260}
Lee Jonesfa86a762012-09-27 10:17:36 +0100261
262static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
263 /* Requires call-back bindings. */
264 OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
265 /* Requires DMA and call-back bindings. */
266 OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
267 OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
268 OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
269 /* Requires DMA bindings. */
270 OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat),
271 OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0", &mop500_sdi0_data),
272 OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1", &mop500_sdi1_data),
273 OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2", &mop500_sdi2_data),
274 OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4", &mop500_sdi4_data),
275 /* Requires clock name bindings. */
276 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL),
277 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL),
278 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL),
279 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL),
280 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL),
281 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL),
282 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL),
283 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL),
284 OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL),
285 OF_DEV_AUXDATA("st,nomadik-i2c", 0x80004000, "nmk-i2c.0", NULL),
286 OF_DEV_AUXDATA("st,nomadik-i2c", 0x80122000, "nmk-i2c.1", NULL),
287 OF_DEV_AUXDATA("st,nomadik-i2c", 0x80128000, "nmk-i2c.2", NULL),
288 OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL),
289 OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),
290 /* Requires device name bindings. */
291 OF_DEV_AUXDATA("stericsson,nmk_pinctrl", 0, "pinctrl-db8500", NULL),
292 /* Requires clock name and DMA bindings. */
293 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
294 "ux500-msp-i2s.0", &msp0_platform_data),
295 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
296 "ux500-msp-i2s.1", &msp1_platform_data),
297 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
298 "ux500-msp-i2s.2", &msp2_platform_data),
299 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
300 "ux500-msp-i2s.3", &msp3_platform_data),
301 {},
302};
303
304static const struct of_device_id u8500_local_bus_nodes[] = {
305 /* only create devices below soc node */
306 { .compatible = "stericsson,db8500", },
307 { .compatible = "stericsson,db8500-prcmu", },
308 { .compatible = "simple-bus"},
309 { },
310};
311
312static void __init u8500_init_machine(void)
313{
314 struct device *parent = NULL;
315
316 /* Pinmaps must be in place before devices register */
317 if (of_machine_is_compatible("st-ericsson,mop500"))
318 mop500_pinmaps_init();
319 else if (of_machine_is_compatible("calaosystems,snowball-a9500"))
320 snowball_pinmaps_init();
321 else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
322 hrefv60_pinmaps_init();
Lee Jones58e5b9e2012-10-15 08:49:33 +0100323 else if (of_machine_is_compatible("st-ericsson,ccu9540")) {}
324 /* TODO: Add pinmaps for ccu9540 board. */
Lee Jonesfa86a762012-09-27 10:17:36 +0100325
326 /* TODO: Export SoC, USB, cpu-freq and DMA40 */
327 parent = u8500_of_init_devices();
328
329 /* automatically probe child nodes of db8500 device */
330 of_platform_populate(NULL, u8500_local_bus_nodes, u8500_auxdata_lookup, parent);
Lee Jonesfa86a762012-09-27 10:17:36 +0100331}
332
333static const char * u8500_dt_board_compat[] = {
334 "calaosystems,snowball-a9500",
335 "st-ericsson,hrefv60+",
Lee Jonesfa86a762012-09-27 10:17:36 +0100336 "st-ericsson,mop500",
Lee Jones58e5b9e2012-10-15 08:49:33 +0100337 "st-ericsson,ccu9540",
Lee Jonesfa86a762012-09-27 10:17:36 +0100338 NULL,
339};
340
Lee Jones46c1bf82012-10-15 08:55:17 +0100341DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
Lee Jonesfa86a762012-09-27 10:17:36 +0100342 .map_io = u8500_map_io,
343 .init_irq = ux500_init_irq,
344 /* we re-use nomadik timer here */
345 .timer = &ux500_timer,
346 .handle_irq = gic_handle_irq,
347 .init_machine = u8500_init_machine,
Lee Jones74a1c9a2012-09-28 14:20:03 +0100348 .init_late = NULL,
Lee Jonesfa86a762012-09-27 10:17:36 +0100349 .dt_compat = u8500_dt_board_compat,
350MACHINE_END
351
352#endif