Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Pierre Ossman | 70f1048 | 2007-07-11 20:04:50 +0200 | [diff] [blame] | 2 | * linux/drivers/mmc/host/mmci.c - ARM PrimeCell MMCI PL180/1 driver |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved. |
Linus Walleij | 64de028 | 2010-02-19 01:09:10 +0100 | [diff] [blame] | 5 | * Copyright (C) 2010 ST-Ericsson AB. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | #include <linux/module.h> |
| 12 | #include <linux/moduleparam.h> |
| 13 | #include <linux/init.h> |
| 14 | #include <linux/ioport.h> |
| 15 | #include <linux/device.h> |
| 16 | #include <linux/interrupt.h> |
| 17 | #include <linux/delay.h> |
| 18 | #include <linux/err.h> |
| 19 | #include <linux/highmem.h> |
Nicolas Pitre | 019a5f5 | 2007-10-11 01:06:03 -0400 | [diff] [blame] | 20 | #include <linux/log2.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | #include <linux/mmc/host.h> |
Russell King | a62c80e | 2006-01-07 13:52:45 +0000 | [diff] [blame] | 22 | #include <linux/amba/bus.h> |
Russell King | f8ce254 | 2006-01-07 16:15:52 +0000 | [diff] [blame] | 23 | #include <linux/clk.h> |
Jens Axboe | bd6dee6 | 2007-10-24 09:01:09 +0200 | [diff] [blame] | 24 | #include <linux/scatterlist.h> |
Russell King | 8900144 | 2009-07-09 15:16:07 +0100 | [diff] [blame] | 25 | #include <linux/gpio.h> |
Linus Walleij | 6ef297f | 2009-09-22 14:29:36 +0100 | [diff] [blame] | 26 | #include <linux/amba/mmci.h> |
Linus Walleij | 34e84f3 | 2009-09-22 14:41:40 +0100 | [diff] [blame] | 27 | #include <linux/regulator/consumer.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | |
Russell King | 7b09cda | 2005-07-01 12:02:59 +0100 | [diff] [blame] | 29 | #include <asm/div64.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | #include <asm/io.h> |
Russell King | c6b8fda | 2005-10-28 14:05:16 +0100 | [diff] [blame] | 31 | #include <asm/sizes.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | |
| 33 | #include "mmci.h" |
| 34 | |
| 35 | #define DRIVER_NAME "mmci-pl18x" |
| 36 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 37 | static unsigned int fmax = 515633; |
| 38 | |
Rabin Vincent | 4956e10 | 2010-07-21 12:54:40 +0100 | [diff] [blame^] | 39 | /** |
| 40 | * struct variant_data - MMCI variant-specific quirks |
| 41 | * @clkreg: default value for MCICLOCK register |
| 42 | */ |
| 43 | struct variant_data { |
| 44 | unsigned int clkreg; |
| 45 | }; |
| 46 | |
| 47 | static struct variant_data variant_arm = { |
| 48 | }; |
| 49 | |
| 50 | static struct variant_data variant_u300 = { |
| 51 | }; |
| 52 | |
| 53 | static struct variant_data variant_ux500 = { |
| 54 | .clkreg = MCI_CLK_ENABLE, |
| 55 | }; |
Linus Walleij | a6a6464 | 2009-09-14 12:56:14 +0100 | [diff] [blame] | 56 | /* |
| 57 | * This must be called with host->lock held |
| 58 | */ |
| 59 | static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired) |
| 60 | { |
Rabin Vincent | 4956e10 | 2010-07-21 12:54:40 +0100 | [diff] [blame^] | 61 | struct variant_data *variant = host->variant; |
| 62 | u32 clk = variant->clkreg; |
Linus Walleij | a6a6464 | 2009-09-14 12:56:14 +0100 | [diff] [blame] | 63 | |
| 64 | if (desired) { |
| 65 | if (desired >= host->mclk) { |
| 66 | clk = MCI_CLK_BYPASS; |
| 67 | host->cclk = host->mclk; |
| 68 | } else { |
| 69 | clk = host->mclk / (2 * desired) - 1; |
| 70 | if (clk >= 256) |
| 71 | clk = 255; |
| 72 | host->cclk = host->mclk / (2 * (clk + 1)); |
| 73 | } |
Linus Walleij | b43149c | 2009-11-10 08:33:01 +0100 | [diff] [blame] | 74 | if (host->hw_designer == AMBA_VENDOR_ST) |
Linus Walleij | 771dc15 | 2010-04-08 07:38:52 +0100 | [diff] [blame] | 75 | clk |= MCI_ST_FCEN; /* Bug fix in ST IP block */ |
Linus Walleij | a6a6464 | 2009-09-14 12:56:14 +0100 | [diff] [blame] | 76 | clk |= MCI_CLK_ENABLE; |
| 77 | /* This hasn't proven to be worthwhile */ |
| 78 | /* clk |= MCI_CLK_PWRSAVE; */ |
| 79 | } |
| 80 | |
Linus Walleij | 9e6c82c | 2009-09-14 12:57:11 +0100 | [diff] [blame] | 81 | if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) |
Linus Walleij | 771dc15 | 2010-04-08 07:38:52 +0100 | [diff] [blame] | 82 | clk |= MCI_4BIT_BUS; |
| 83 | if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) |
| 84 | clk |= MCI_ST_8BIT_BUS; |
Linus Walleij | 9e6c82c | 2009-09-14 12:57:11 +0100 | [diff] [blame] | 85 | |
Linus Walleij | a6a6464 | 2009-09-14 12:56:14 +0100 | [diff] [blame] | 86 | writel(clk, host->base + MMCICLOCK); |
| 87 | } |
| 88 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 89 | static void |
| 90 | mmci_request_end(struct mmci_host *host, struct mmc_request *mrq) |
| 91 | { |
| 92 | writel(0, host->base + MMCICOMMAND); |
| 93 | |
Russell King | e47c222 | 2007-01-08 16:42:51 +0000 | [diff] [blame] | 94 | BUG_ON(host->data); |
| 95 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 96 | host->mrq = NULL; |
| 97 | host->cmd = NULL; |
| 98 | |
| 99 | if (mrq->data) |
| 100 | mrq->data->bytes_xfered = host->data_xfered; |
| 101 | |
| 102 | /* |
| 103 | * Need to drop the host lock here; mmc_request_done may call |
| 104 | * back into the driver... |
| 105 | */ |
| 106 | spin_unlock(&host->lock); |
| 107 | mmc_request_done(host->mmc, mrq); |
| 108 | spin_lock(&host->lock); |
| 109 | } |
| 110 | |
| 111 | static void mmci_stop_data(struct mmci_host *host) |
| 112 | { |
| 113 | writel(0, host->base + MMCIDATACTRL); |
| 114 | writel(0, host->base + MMCIMASK1); |
| 115 | host->data = NULL; |
| 116 | } |
| 117 | |
Rabin Vincent | 4ce1d6c | 2010-07-21 12:44:58 +0100 | [diff] [blame] | 118 | static void mmci_init_sg(struct mmci_host *host, struct mmc_data *data) |
| 119 | { |
| 120 | unsigned int flags = SG_MITER_ATOMIC; |
| 121 | |
| 122 | if (data->flags & MMC_DATA_READ) |
| 123 | flags |= SG_MITER_TO_SG; |
| 124 | else |
| 125 | flags |= SG_MITER_FROM_SG; |
| 126 | |
| 127 | sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); |
| 128 | } |
| 129 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 130 | static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) |
| 131 | { |
| 132 | unsigned int datactrl, timeout, irqmask; |
Russell King | 7b09cda | 2005-07-01 12:02:59 +0100 | [diff] [blame] | 133 | unsigned long long clks; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 134 | void __iomem *base; |
Russell King | 3bc87f2 | 2006-08-27 13:51:28 +0100 | [diff] [blame] | 135 | int blksz_bits; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 136 | |
Linus Walleij | 64de028 | 2010-02-19 01:09:10 +0100 | [diff] [blame] | 137 | dev_dbg(mmc_dev(host->mmc), "blksz %04x blks %04x flags %08x\n", |
| 138 | data->blksz, data->blocks, data->flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 139 | |
| 140 | host->data = data; |
Rabin Vincent | 528320d | 2010-07-21 12:49:49 +0100 | [diff] [blame] | 141 | host->size = data->blksz * data->blocks; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 142 | host->data_xfered = 0; |
| 143 | |
| 144 | mmci_init_sg(host, data); |
| 145 | |
Russell King | 7b09cda | 2005-07-01 12:02:59 +0100 | [diff] [blame] | 146 | clks = (unsigned long long)data->timeout_ns * host->cclk; |
| 147 | do_div(clks, 1000000000UL); |
| 148 | |
| 149 | timeout = data->timeout_clks + (unsigned int)clks; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 150 | |
| 151 | base = host->base; |
| 152 | writel(timeout, base + MMCIDATATIMER); |
| 153 | writel(host->size, base + MMCIDATALENGTH); |
| 154 | |
Russell King | 3bc87f2 | 2006-08-27 13:51:28 +0100 | [diff] [blame] | 155 | blksz_bits = ffs(data->blksz) - 1; |
| 156 | BUG_ON(1 << blksz_bits != data->blksz); |
| 157 | |
| 158 | datactrl = MCI_DPSM_ENABLE | blksz_bits << 4; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 159 | if (data->flags & MMC_DATA_READ) { |
| 160 | datactrl |= MCI_DPSM_DIRECTION; |
| 161 | irqmask = MCI_RXFIFOHALFFULLMASK; |
Russell King | 0425a14 | 2006-02-16 16:48:31 +0000 | [diff] [blame] | 162 | |
| 163 | /* |
| 164 | * If we have less than a FIFOSIZE of bytes to transfer, |
| 165 | * trigger a PIO interrupt as soon as any data is available. |
| 166 | */ |
| 167 | if (host->size < MCI_FIFOSIZE) |
| 168 | irqmask |= MCI_RXDATAAVLBLMASK; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 169 | } else { |
| 170 | /* |
| 171 | * We don't actually need to include "FIFO empty" here |
| 172 | * since its implicit in "FIFO half empty". |
| 173 | */ |
| 174 | irqmask = MCI_TXFIFOHALFEMPTYMASK; |
| 175 | } |
| 176 | |
| 177 | writel(datactrl, base + MMCIDATACTRL); |
| 178 | writel(readl(base + MMCIMASK0) & ~MCI_DATAENDMASK, base + MMCIMASK0); |
| 179 | writel(irqmask, base + MMCIMASK1); |
| 180 | } |
| 181 | |
| 182 | static void |
| 183 | mmci_start_command(struct mmci_host *host, struct mmc_command *cmd, u32 c) |
| 184 | { |
| 185 | void __iomem *base = host->base; |
| 186 | |
Linus Walleij | 64de028 | 2010-02-19 01:09:10 +0100 | [diff] [blame] | 187 | dev_dbg(mmc_dev(host->mmc), "op %02x arg %08x flags %08x\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 188 | cmd->opcode, cmd->arg, cmd->flags); |
| 189 | |
| 190 | if (readl(base + MMCICOMMAND) & MCI_CPSM_ENABLE) { |
| 191 | writel(0, base + MMCICOMMAND); |
| 192 | udelay(1); |
| 193 | } |
| 194 | |
| 195 | c |= cmd->opcode | MCI_CPSM_ENABLE; |
Russell King | e922517 | 2006-02-02 12:23:12 +0000 | [diff] [blame] | 196 | if (cmd->flags & MMC_RSP_PRESENT) { |
| 197 | if (cmd->flags & MMC_RSP_136) |
| 198 | c |= MCI_CPSM_LONGRSP; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 199 | c |= MCI_CPSM_RESPONSE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 200 | } |
| 201 | if (/*interrupt*/0) |
| 202 | c |= MCI_CPSM_INTERRUPT; |
| 203 | |
| 204 | host->cmd = cmd; |
| 205 | |
| 206 | writel(cmd->arg, base + MMCIARGUMENT); |
| 207 | writel(c, base + MMCICOMMAND); |
| 208 | } |
| 209 | |
| 210 | static void |
| 211 | mmci_data_irq(struct mmci_host *host, struct mmc_data *data, |
| 212 | unsigned int status) |
| 213 | { |
| 214 | if (status & MCI_DATABLOCKEND) { |
Russell King | 3bc87f2 | 2006-08-27 13:51:28 +0100 | [diff] [blame] | 215 | host->data_xfered += data->blksz; |
Linus Walleij | f28e8a4 | 2010-01-25 07:14:46 +0100 | [diff] [blame] | 216 | #ifdef CONFIG_ARCH_U300 |
| 217 | /* |
| 218 | * On the U300 some signal or other is |
| 219 | * badly routed so that a data write does |
| 220 | * not properly terminate with a MCI_DATAEND |
| 221 | * status flag. This quirk will make writes |
| 222 | * work again. |
| 223 | */ |
| 224 | if (data->flags & MMC_DATA_WRITE) |
| 225 | status |= MCI_DATAEND; |
| 226 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 227 | } |
| 228 | if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|MCI_RXOVERRUN)) { |
Linus Walleij | 64de028 | 2010-02-19 01:09:10 +0100 | [diff] [blame] | 229 | dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ (status %08x)\n", status); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 230 | if (status & MCI_DATACRCFAIL) |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 231 | data->error = -EILSEQ; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 232 | else if (status & MCI_DATATIMEOUT) |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 233 | data->error = -ETIMEDOUT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 234 | else if (status & (MCI_TXUNDERRUN|MCI_RXOVERRUN)) |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 235 | data->error = -EIO; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 236 | status |= MCI_DATAEND; |
Russell King | e9c091b | 2006-01-04 16:24:05 +0000 | [diff] [blame] | 237 | |
| 238 | /* |
| 239 | * We hit an error condition. Ensure that any data |
| 240 | * partially written to a page is properly coherent. |
| 241 | */ |
Rabin Vincent | 4ce1d6c | 2010-07-21 12:44:58 +0100 | [diff] [blame] | 242 | if (data->flags & MMC_DATA_READ) { |
| 243 | struct sg_mapping_iter *sg_miter = &host->sg_miter; |
| 244 | unsigned long flags; |
| 245 | |
| 246 | local_irq_save(flags); |
| 247 | if (sg_miter_next(sg_miter)) { |
| 248 | flush_dcache_page(sg_miter->page); |
| 249 | sg_miter_stop(sg_miter); |
| 250 | } |
| 251 | local_irq_restore(flags); |
| 252 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 253 | } |
| 254 | if (status & MCI_DATAEND) { |
| 255 | mmci_stop_data(host); |
| 256 | |
| 257 | if (!data->stop) { |
| 258 | mmci_request_end(host, data->mrq); |
| 259 | } else { |
| 260 | mmci_start_command(host, data->stop, 0); |
| 261 | } |
| 262 | } |
| 263 | } |
| 264 | |
| 265 | static void |
| 266 | mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd, |
| 267 | unsigned int status) |
| 268 | { |
| 269 | void __iomem *base = host->base; |
| 270 | |
| 271 | host->cmd = NULL; |
| 272 | |
| 273 | cmd->resp[0] = readl(base + MMCIRESPONSE0); |
| 274 | cmd->resp[1] = readl(base + MMCIRESPONSE1); |
| 275 | cmd->resp[2] = readl(base + MMCIRESPONSE2); |
| 276 | cmd->resp[3] = readl(base + MMCIRESPONSE3); |
| 277 | |
| 278 | if (status & MCI_CMDTIMEOUT) { |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 279 | cmd->error = -ETIMEDOUT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 280 | } else if (status & MCI_CMDCRCFAIL && cmd->flags & MMC_RSP_CRC) { |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 281 | cmd->error = -EILSEQ; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 282 | } |
| 283 | |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 284 | if (!cmd->data || cmd->error) { |
Russell King | e47c222 | 2007-01-08 16:42:51 +0000 | [diff] [blame] | 285 | if (host->data) |
| 286 | mmci_stop_data(host); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 287 | mmci_request_end(host, cmd->mrq); |
| 288 | } else if (!(cmd->data->flags & MMC_DATA_READ)) { |
| 289 | mmci_start_data(host, cmd->data); |
| 290 | } |
| 291 | } |
| 292 | |
| 293 | static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int remain) |
| 294 | { |
| 295 | void __iomem *base = host->base; |
| 296 | char *ptr = buffer; |
| 297 | u32 status; |
Linus Walleij | 26eed9a | 2008-04-26 23:39:44 +0100 | [diff] [blame] | 298 | int host_remain = host->size; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 299 | |
| 300 | do { |
Linus Walleij | 26eed9a | 2008-04-26 23:39:44 +0100 | [diff] [blame] | 301 | int count = host_remain - (readl(base + MMCIFIFOCNT) << 2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 302 | |
| 303 | if (count > remain) |
| 304 | count = remain; |
| 305 | |
| 306 | if (count <= 0) |
| 307 | break; |
| 308 | |
| 309 | readsl(base + MMCIFIFO, ptr, count >> 2); |
| 310 | |
| 311 | ptr += count; |
| 312 | remain -= count; |
Linus Walleij | 26eed9a | 2008-04-26 23:39:44 +0100 | [diff] [blame] | 313 | host_remain -= count; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 314 | |
| 315 | if (remain == 0) |
| 316 | break; |
| 317 | |
| 318 | status = readl(base + MMCISTATUS); |
| 319 | } while (status & MCI_RXDATAAVLBL); |
| 320 | |
| 321 | return ptr - buffer; |
| 322 | } |
| 323 | |
| 324 | static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int remain, u32 status) |
| 325 | { |
| 326 | void __iomem *base = host->base; |
| 327 | char *ptr = buffer; |
| 328 | |
| 329 | do { |
| 330 | unsigned int count, maxcnt; |
| 331 | |
| 332 | maxcnt = status & MCI_TXFIFOEMPTY ? MCI_FIFOSIZE : MCI_FIFOHALFSIZE; |
| 333 | count = min(remain, maxcnt); |
| 334 | |
| 335 | writesl(base + MMCIFIFO, ptr, count >> 2); |
| 336 | |
| 337 | ptr += count; |
| 338 | remain -= count; |
| 339 | |
| 340 | if (remain == 0) |
| 341 | break; |
| 342 | |
| 343 | status = readl(base + MMCISTATUS); |
| 344 | } while (status & MCI_TXFIFOHALFEMPTY); |
| 345 | |
| 346 | return ptr - buffer; |
| 347 | } |
| 348 | |
| 349 | /* |
| 350 | * PIO data transfer IRQ handler. |
| 351 | */ |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 352 | static irqreturn_t mmci_pio_irq(int irq, void *dev_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 353 | { |
| 354 | struct mmci_host *host = dev_id; |
Rabin Vincent | 4ce1d6c | 2010-07-21 12:44:58 +0100 | [diff] [blame] | 355 | struct sg_mapping_iter *sg_miter = &host->sg_miter; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 356 | void __iomem *base = host->base; |
Rabin Vincent | 4ce1d6c | 2010-07-21 12:44:58 +0100 | [diff] [blame] | 357 | unsigned long flags; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 358 | u32 status; |
| 359 | |
| 360 | status = readl(base + MMCISTATUS); |
| 361 | |
Linus Walleij | 64de028 | 2010-02-19 01:09:10 +0100 | [diff] [blame] | 362 | dev_dbg(mmc_dev(host->mmc), "irq1 (pio) %08x\n", status); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 363 | |
Rabin Vincent | 4ce1d6c | 2010-07-21 12:44:58 +0100 | [diff] [blame] | 364 | local_irq_save(flags); |
| 365 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 366 | do { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 367 | unsigned int remain, len; |
| 368 | char *buffer; |
| 369 | |
| 370 | /* |
| 371 | * For write, we only need to test the half-empty flag |
| 372 | * here - if the FIFO is completely empty, then by |
| 373 | * definition it is more than half empty. |
| 374 | * |
| 375 | * For read, check for data available. |
| 376 | */ |
| 377 | if (!(status & (MCI_TXFIFOHALFEMPTY|MCI_RXDATAAVLBL))) |
| 378 | break; |
| 379 | |
Rabin Vincent | 4ce1d6c | 2010-07-21 12:44:58 +0100 | [diff] [blame] | 380 | if (!sg_miter_next(sg_miter)) |
| 381 | break; |
| 382 | |
| 383 | buffer = sg_miter->addr; |
| 384 | remain = sg_miter->length; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 385 | |
| 386 | len = 0; |
| 387 | if (status & MCI_RXACTIVE) |
| 388 | len = mmci_pio_read(host, buffer, remain); |
| 389 | if (status & MCI_TXACTIVE) |
| 390 | len = mmci_pio_write(host, buffer, remain, status); |
| 391 | |
Rabin Vincent | 4ce1d6c | 2010-07-21 12:44:58 +0100 | [diff] [blame] | 392 | sg_miter->consumed = len; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 393 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 394 | host->size -= len; |
| 395 | remain -= len; |
| 396 | |
| 397 | if (remain) |
| 398 | break; |
| 399 | |
Russell King | e9c091b | 2006-01-04 16:24:05 +0000 | [diff] [blame] | 400 | if (status & MCI_RXACTIVE) |
Rabin Vincent | 4ce1d6c | 2010-07-21 12:44:58 +0100 | [diff] [blame] | 401 | flush_dcache_page(sg_miter->page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 402 | |
| 403 | status = readl(base + MMCISTATUS); |
| 404 | } while (1); |
| 405 | |
Rabin Vincent | 4ce1d6c | 2010-07-21 12:44:58 +0100 | [diff] [blame] | 406 | sg_miter_stop(sg_miter); |
| 407 | |
| 408 | local_irq_restore(flags); |
| 409 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 410 | /* |
| 411 | * If we're nearing the end of the read, switch to |
| 412 | * "any data available" mode. |
| 413 | */ |
| 414 | if (status & MCI_RXACTIVE && host->size < MCI_FIFOSIZE) |
| 415 | writel(MCI_RXDATAAVLBLMASK, base + MMCIMASK1); |
| 416 | |
| 417 | /* |
| 418 | * If we run out of data, disable the data IRQs; this |
| 419 | * prevents a race where the FIFO becomes empty before |
| 420 | * the chip itself has disabled the data path, and |
| 421 | * stops us racing with our data end IRQ. |
| 422 | */ |
| 423 | if (host->size == 0) { |
| 424 | writel(0, base + MMCIMASK1); |
| 425 | writel(readl(base + MMCIMASK0) | MCI_DATAENDMASK, base + MMCIMASK0); |
| 426 | } |
| 427 | |
| 428 | return IRQ_HANDLED; |
| 429 | } |
| 430 | |
| 431 | /* |
| 432 | * Handle completion of command and data transfers. |
| 433 | */ |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 434 | static irqreturn_t mmci_irq(int irq, void *dev_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 435 | { |
| 436 | struct mmci_host *host = dev_id; |
| 437 | u32 status; |
| 438 | int ret = 0; |
| 439 | |
| 440 | spin_lock(&host->lock); |
| 441 | |
| 442 | do { |
| 443 | struct mmc_command *cmd; |
| 444 | struct mmc_data *data; |
| 445 | |
| 446 | status = readl(host->base + MMCISTATUS); |
| 447 | status &= readl(host->base + MMCIMASK0); |
| 448 | writel(status, host->base + MMCICLEAR); |
| 449 | |
Linus Walleij | 64de028 | 2010-02-19 01:09:10 +0100 | [diff] [blame] | 450 | dev_dbg(mmc_dev(host->mmc), "irq0 (data+cmd) %08x\n", status); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 451 | |
| 452 | data = host->data; |
| 453 | if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN| |
| 454 | MCI_RXOVERRUN|MCI_DATAEND|MCI_DATABLOCKEND) && data) |
| 455 | mmci_data_irq(host, data, status); |
| 456 | |
| 457 | cmd = host->cmd; |
| 458 | if (status & (MCI_CMDCRCFAIL|MCI_CMDTIMEOUT|MCI_CMDSENT|MCI_CMDRESPEND) && cmd) |
| 459 | mmci_cmd_irq(host, cmd, status); |
| 460 | |
| 461 | ret = 1; |
| 462 | } while (status); |
| 463 | |
| 464 | spin_unlock(&host->lock); |
| 465 | |
| 466 | return IRQ_RETVAL(ret); |
| 467 | } |
| 468 | |
| 469 | static void mmci_request(struct mmc_host *mmc, struct mmc_request *mrq) |
| 470 | { |
| 471 | struct mmci_host *host = mmc_priv(mmc); |
Linus Walleij | 9e94302 | 2008-10-24 21:17:50 +0100 | [diff] [blame] | 472 | unsigned long flags; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 473 | |
| 474 | WARN_ON(host->mrq != NULL); |
| 475 | |
Nicolas Pitre | 019a5f5 | 2007-10-11 01:06:03 -0400 | [diff] [blame] | 476 | if (mrq->data && !is_power_of_2(mrq->data->blksz)) { |
Linus Walleij | 64de028 | 2010-02-19 01:09:10 +0100 | [diff] [blame] | 477 | dev_err(mmc_dev(mmc), "unsupported block size (%d bytes)\n", |
| 478 | mrq->data->blksz); |
Pierre Ossman | 255d01a | 2007-07-24 20:38:53 +0200 | [diff] [blame] | 479 | mrq->cmd->error = -EINVAL; |
| 480 | mmc_request_done(mmc, mrq); |
| 481 | return; |
| 482 | } |
| 483 | |
Linus Walleij | 9e94302 | 2008-10-24 21:17:50 +0100 | [diff] [blame] | 484 | spin_lock_irqsave(&host->lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 485 | |
| 486 | host->mrq = mrq; |
| 487 | |
| 488 | if (mrq->data && mrq->data->flags & MMC_DATA_READ) |
| 489 | mmci_start_data(host, mrq->data); |
| 490 | |
| 491 | mmci_start_command(host, mrq->cmd, 0); |
| 492 | |
Linus Walleij | 9e94302 | 2008-10-24 21:17:50 +0100 | [diff] [blame] | 493 | spin_unlock_irqrestore(&host->lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 494 | } |
| 495 | |
| 496 | static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) |
| 497 | { |
| 498 | struct mmci_host *host = mmc_priv(mmc); |
Linus Walleij | a6a6464 | 2009-09-14 12:56:14 +0100 | [diff] [blame] | 499 | u32 pwr = 0; |
| 500 | unsigned long flags; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 501 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 502 | switch (ios->power_mode) { |
| 503 | case MMC_POWER_OFF: |
Linus Walleij | 34e84f3 | 2009-09-22 14:41:40 +0100 | [diff] [blame] | 504 | if(host->vcc && |
| 505 | regulator_is_enabled(host->vcc)) |
| 506 | regulator_disable(host->vcc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 507 | break; |
| 508 | case MMC_POWER_UP: |
Linus Walleij | 34e84f3 | 2009-09-22 14:41:40 +0100 | [diff] [blame] | 509 | #ifdef CONFIG_REGULATOR |
| 510 | if (host->vcc) |
| 511 | /* This implicitly enables the regulator */ |
| 512 | mmc_regulator_set_ocr(host->vcc, ios->vdd); |
| 513 | #endif |
Rabin Vincent | bb8f563 | 2010-07-21 12:53:57 +0100 | [diff] [blame] | 514 | if (host->plat->vdd_handler) |
| 515 | pwr |= host->plat->vdd_handler(mmc_dev(mmc), ios->vdd, |
| 516 | ios->power_mode); |
Linus Walleij | cc30d60 | 2009-01-04 15:18:54 +0100 | [diff] [blame] | 517 | /* The ST version does not have this, fall through to POWER_ON */ |
Linus Walleij | f17a1f0 | 2009-08-04 01:01:02 +0100 | [diff] [blame] | 518 | if (host->hw_designer != AMBA_VENDOR_ST) { |
Linus Walleij | cc30d60 | 2009-01-04 15:18:54 +0100 | [diff] [blame] | 519 | pwr |= MCI_PWR_UP; |
| 520 | break; |
| 521 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 522 | case MMC_POWER_ON: |
| 523 | pwr |= MCI_PWR_ON; |
| 524 | break; |
| 525 | } |
| 526 | |
Linus Walleij | cc30d60 | 2009-01-04 15:18:54 +0100 | [diff] [blame] | 527 | if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) { |
Linus Walleij | f17a1f0 | 2009-08-04 01:01:02 +0100 | [diff] [blame] | 528 | if (host->hw_designer != AMBA_VENDOR_ST) |
Linus Walleij | cc30d60 | 2009-01-04 15:18:54 +0100 | [diff] [blame] | 529 | pwr |= MCI_ROD; |
| 530 | else { |
| 531 | /* |
| 532 | * The ST Micro variant use the ROD bit for something |
| 533 | * else and only has OD (Open Drain). |
| 534 | */ |
| 535 | pwr |= MCI_OD; |
| 536 | } |
| 537 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 538 | |
Linus Walleij | a6a6464 | 2009-09-14 12:56:14 +0100 | [diff] [blame] | 539 | spin_lock_irqsave(&host->lock, flags); |
| 540 | |
| 541 | mmci_set_clkreg(host, ios->clock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 542 | |
| 543 | if (host->pwr != pwr) { |
| 544 | host->pwr = pwr; |
| 545 | writel(pwr, host->base + MMCIPOWER); |
| 546 | } |
Linus Walleij | a6a6464 | 2009-09-14 12:56:14 +0100 | [diff] [blame] | 547 | |
| 548 | spin_unlock_irqrestore(&host->lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 549 | } |
| 550 | |
Russell King | 8900144 | 2009-07-09 15:16:07 +0100 | [diff] [blame] | 551 | static int mmci_get_ro(struct mmc_host *mmc) |
| 552 | { |
| 553 | struct mmci_host *host = mmc_priv(mmc); |
| 554 | |
| 555 | if (host->gpio_wp == -ENOSYS) |
| 556 | return -ENOSYS; |
| 557 | |
| 558 | return gpio_get_value(host->gpio_wp); |
| 559 | } |
| 560 | |
| 561 | static int mmci_get_cd(struct mmc_host *mmc) |
| 562 | { |
| 563 | struct mmci_host *host = mmc_priv(mmc); |
| 564 | unsigned int status; |
| 565 | |
| 566 | if (host->gpio_cd == -ENOSYS) |
| 567 | status = host->plat->status(mmc_dev(host->mmc)); |
| 568 | else |
| 569 | status = gpio_get_value(host->gpio_cd); |
| 570 | |
| 571 | return !status; |
| 572 | } |
| 573 | |
David Brownell | ab7aefd | 2006-11-12 17:55:30 -0800 | [diff] [blame] | 574 | static const struct mmc_host_ops mmci_ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 575 | .request = mmci_request, |
| 576 | .set_ios = mmci_set_ios, |
Russell King | 8900144 | 2009-07-09 15:16:07 +0100 | [diff] [blame] | 577 | .get_ro = mmci_get_ro, |
| 578 | .get_cd = mmci_get_cd, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 579 | }; |
| 580 | |
Alessandro Rubini | 03fbdb1 | 2009-05-20 22:39:08 +0100 | [diff] [blame] | 581 | static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 582 | { |
Linus Walleij | 6ef297f | 2009-09-22 14:29:36 +0100 | [diff] [blame] | 583 | struct mmci_platform_data *plat = dev->dev.platform_data; |
Rabin Vincent | 4956e10 | 2010-07-21 12:54:40 +0100 | [diff] [blame^] | 584 | struct variant_data *variant = id->data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 585 | struct mmci_host *host; |
| 586 | struct mmc_host *mmc; |
| 587 | int ret; |
| 588 | |
| 589 | /* must have platform data */ |
| 590 | if (!plat) { |
| 591 | ret = -EINVAL; |
| 592 | goto out; |
| 593 | } |
| 594 | |
| 595 | ret = amba_request_regions(dev, DRIVER_NAME); |
| 596 | if (ret) |
| 597 | goto out; |
| 598 | |
| 599 | mmc = mmc_alloc_host(sizeof(struct mmci_host), &dev->dev); |
| 600 | if (!mmc) { |
| 601 | ret = -ENOMEM; |
| 602 | goto rel_regions; |
| 603 | } |
| 604 | |
| 605 | host = mmc_priv(mmc); |
Rabin Vincent | 4ea580f | 2009-04-17 08:44:19 +0530 | [diff] [blame] | 606 | host->mmc = mmc; |
Russell King | 012b7d3 | 2009-07-09 15:13:56 +0100 | [diff] [blame] | 607 | |
Russell King | 8900144 | 2009-07-09 15:16:07 +0100 | [diff] [blame] | 608 | host->gpio_wp = -ENOSYS; |
| 609 | host->gpio_cd = -ENOSYS; |
| 610 | |
Russell King | 012b7d3 | 2009-07-09 15:13:56 +0100 | [diff] [blame] | 611 | host->hw_designer = amba_manf(dev); |
| 612 | host->hw_revision = amba_rev(dev); |
Linus Walleij | 64de028 | 2010-02-19 01:09:10 +0100 | [diff] [blame] | 613 | dev_dbg(mmc_dev(mmc), "designer ID = 0x%02x\n", host->hw_designer); |
| 614 | dev_dbg(mmc_dev(mmc), "revision = 0x%01x\n", host->hw_revision); |
Russell King | 012b7d3 | 2009-07-09 15:13:56 +0100 | [diff] [blame] | 615 | |
Russell King | ee569c4 | 2008-11-30 17:38:14 +0000 | [diff] [blame] | 616 | host->clk = clk_get(&dev->dev, NULL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 617 | if (IS_ERR(host->clk)) { |
| 618 | ret = PTR_ERR(host->clk); |
| 619 | host->clk = NULL; |
| 620 | goto host_free; |
| 621 | } |
| 622 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 623 | ret = clk_enable(host->clk); |
| 624 | if (ret) |
Russell King | a8d3584 | 2006-01-03 18:41:37 +0000 | [diff] [blame] | 625 | goto clk_free; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 626 | |
| 627 | host->plat = plat; |
Rabin Vincent | 4956e10 | 2010-07-21 12:54:40 +0100 | [diff] [blame^] | 628 | host->variant = variant; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 629 | host->mclk = clk_get_rate(host->clk); |
Linus Walleij | c8df9a5 | 2008-04-29 09:34:07 +0100 | [diff] [blame] | 630 | /* |
| 631 | * According to the spec, mclk is max 100 MHz, |
| 632 | * so we try to adjust the clock down to this, |
| 633 | * (if possible). |
| 634 | */ |
| 635 | if (host->mclk > 100000000) { |
| 636 | ret = clk_set_rate(host->clk, 100000000); |
| 637 | if (ret < 0) |
| 638 | goto clk_disable; |
| 639 | host->mclk = clk_get_rate(host->clk); |
Linus Walleij | 64de028 | 2010-02-19 01:09:10 +0100 | [diff] [blame] | 640 | dev_dbg(mmc_dev(mmc), "eventual mclk rate: %u Hz\n", |
| 641 | host->mclk); |
Linus Walleij | c8df9a5 | 2008-04-29 09:34:07 +0100 | [diff] [blame] | 642 | } |
Linus Walleij | dc890c2 | 2009-06-07 23:27:31 +0100 | [diff] [blame] | 643 | host->base = ioremap(dev->res.start, resource_size(&dev->res)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 644 | if (!host->base) { |
| 645 | ret = -ENOMEM; |
| 646 | goto clk_disable; |
| 647 | } |
| 648 | |
| 649 | mmc->ops = &mmci_ops; |
| 650 | mmc->f_min = (host->mclk + 511) / 512; |
Linus Walleij | 808d97c | 2010-04-08 07:39:38 +0100 | [diff] [blame] | 651 | /* |
| 652 | * If the platform data supplies a maximum operating |
| 653 | * frequency, this takes precedence. Else, we fall back |
| 654 | * to using the module parameter, which has a (low) |
| 655 | * default value in case it is not specified. Either |
| 656 | * value must not exceed the clock rate into the block, |
| 657 | * of course. |
| 658 | */ |
| 659 | if (plat->f_max) |
| 660 | mmc->f_max = min(host->mclk, plat->f_max); |
| 661 | else |
| 662 | mmc->f_max = min(host->mclk, fmax); |
Linus Walleij | 64de028 | 2010-02-19 01:09:10 +0100 | [diff] [blame] | 663 | dev_dbg(mmc_dev(mmc), "clocking block at %u Hz\n", mmc->f_max); |
| 664 | |
Linus Walleij | 34e84f3 | 2009-09-22 14:41:40 +0100 | [diff] [blame] | 665 | #ifdef CONFIG_REGULATOR |
| 666 | /* If we're using the regulator framework, try to fetch a regulator */ |
| 667 | host->vcc = regulator_get(&dev->dev, "vmmc"); |
| 668 | if (IS_ERR(host->vcc)) |
| 669 | host->vcc = NULL; |
| 670 | else { |
| 671 | int mask = mmc_regulator_get_ocrmask(host->vcc); |
| 672 | |
| 673 | if (mask < 0) |
| 674 | dev_err(&dev->dev, "error getting OCR mask (%d)\n", |
| 675 | mask); |
| 676 | else { |
| 677 | host->mmc->ocr_avail = (u32) mask; |
| 678 | if (plat->ocr_mask) |
| 679 | dev_warn(&dev->dev, |
| 680 | "Provided ocr_mask/setpower will not be used " |
| 681 | "(using regulator instead)\n"); |
| 682 | } |
| 683 | } |
| 684 | #endif |
| 685 | /* Fall back to platform data if no regulator is found */ |
| 686 | if (host->vcc == NULL) |
| 687 | mmc->ocr_avail = plat->ocr_mask; |
Linus Walleij | 9e6c82c | 2009-09-14 12:57:11 +0100 | [diff] [blame] | 688 | mmc->caps = plat->capabilities; |
Rabin Vincent | f5e2574 | 2010-07-21 12:50:31 +0100 | [diff] [blame] | 689 | mmc->caps |= MMC_CAP_NEEDS_POLL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 690 | |
| 691 | /* |
| 692 | * We can do SGIO |
| 693 | */ |
| 694 | mmc->max_hw_segs = 16; |
| 695 | mmc->max_phys_segs = NR_SG; |
| 696 | |
| 697 | /* |
| 698 | * Since we only have a 16-bit data length register, we must |
| 699 | * ensure that we don't exceed 2^16-1 bytes in a single request. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 700 | */ |
Pierre Ossman | 55db890 | 2006-11-21 17:55:45 +0100 | [diff] [blame] | 701 | mmc->max_req_size = 65535; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 702 | |
| 703 | /* |
| 704 | * Set the maximum segment size. Since we aren't doing DMA |
| 705 | * (yet) we are only limited by the data length register. |
| 706 | */ |
Pierre Ossman | 55db890 | 2006-11-21 17:55:45 +0100 | [diff] [blame] | 707 | mmc->max_seg_size = mmc->max_req_size; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 708 | |
Pierre Ossman | fe4a3c7 | 2006-11-21 17:54:23 +0100 | [diff] [blame] | 709 | /* |
| 710 | * Block size can be up to 2048 bytes, but must be a power of two. |
| 711 | */ |
| 712 | mmc->max_blk_size = 2048; |
| 713 | |
Pierre Ossman | 55db890 | 2006-11-21 17:55:45 +0100 | [diff] [blame] | 714 | /* |
| 715 | * No limit on the number of blocks transferred. |
| 716 | */ |
| 717 | mmc->max_blk_count = mmc->max_req_size; |
| 718 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 719 | spin_lock_init(&host->lock); |
| 720 | |
| 721 | writel(0, host->base + MMCIMASK0); |
| 722 | writel(0, host->base + MMCIMASK1); |
| 723 | writel(0xfff, host->base + MMCICLEAR); |
| 724 | |
Russell King | 8900144 | 2009-07-09 15:16:07 +0100 | [diff] [blame] | 725 | if (gpio_is_valid(plat->gpio_cd)) { |
| 726 | ret = gpio_request(plat->gpio_cd, DRIVER_NAME " (cd)"); |
| 727 | if (ret == 0) |
| 728 | ret = gpio_direction_input(plat->gpio_cd); |
| 729 | if (ret == 0) |
| 730 | host->gpio_cd = plat->gpio_cd; |
| 731 | else if (ret != -ENOSYS) |
| 732 | goto err_gpio_cd; |
| 733 | } |
| 734 | if (gpio_is_valid(plat->gpio_wp)) { |
| 735 | ret = gpio_request(plat->gpio_wp, DRIVER_NAME " (wp)"); |
| 736 | if (ret == 0) |
| 737 | ret = gpio_direction_input(plat->gpio_wp); |
| 738 | if (ret == 0) |
| 739 | host->gpio_wp = plat->gpio_wp; |
| 740 | else if (ret != -ENOSYS) |
| 741 | goto err_gpio_wp; |
| 742 | } |
| 743 | |
Thomas Gleixner | dace145 | 2006-07-01 19:29:38 -0700 | [diff] [blame] | 744 | ret = request_irq(dev->irq[0], mmci_irq, IRQF_SHARED, DRIVER_NAME " (cmd)", host); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 745 | if (ret) |
| 746 | goto unmap; |
| 747 | |
Thomas Gleixner | dace145 | 2006-07-01 19:29:38 -0700 | [diff] [blame] | 748 | ret = request_irq(dev->irq[1], mmci_pio_irq, IRQF_SHARED, DRIVER_NAME " (pio)", host); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 749 | if (ret) |
| 750 | goto irq0_free; |
| 751 | |
| 752 | writel(MCI_IRQENABLE, host->base + MMCIMASK0); |
| 753 | |
| 754 | amba_set_drvdata(dev, mmc); |
| 755 | |
| 756 | mmc_add_host(mmc); |
| 757 | |
Linus Walleij | 64de028 | 2010-02-19 01:09:10 +0100 | [diff] [blame] | 758 | dev_info(&dev->dev, "%s: MMCI rev %x cfg %02x at 0x%016llx irq %d,%d\n", |
Russell King | d366b64 | 2005-08-19 09:40:08 +0100 | [diff] [blame] | 759 | mmc_hostname(mmc), amba_rev(dev), amba_config(dev), |
Greg Kroah-Hartman | e29419f | 2006-06-12 15:20:16 -0700 | [diff] [blame] | 760 | (unsigned long long)dev->res.start, dev->irq[0], dev->irq[1]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 761 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 762 | return 0; |
| 763 | |
| 764 | irq0_free: |
| 765 | free_irq(dev->irq[0], host); |
| 766 | unmap: |
Russell King | 8900144 | 2009-07-09 15:16:07 +0100 | [diff] [blame] | 767 | if (host->gpio_wp != -ENOSYS) |
| 768 | gpio_free(host->gpio_wp); |
| 769 | err_gpio_wp: |
| 770 | if (host->gpio_cd != -ENOSYS) |
| 771 | gpio_free(host->gpio_cd); |
| 772 | err_gpio_cd: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 773 | iounmap(host->base); |
| 774 | clk_disable: |
| 775 | clk_disable(host->clk); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 776 | clk_free: |
| 777 | clk_put(host->clk); |
| 778 | host_free: |
| 779 | mmc_free_host(mmc); |
| 780 | rel_regions: |
| 781 | amba_release_regions(dev); |
| 782 | out: |
| 783 | return ret; |
| 784 | } |
| 785 | |
Linus Walleij | 6dc4a47 | 2009-03-07 00:23:52 +0100 | [diff] [blame] | 786 | static int __devexit mmci_remove(struct amba_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 787 | { |
| 788 | struct mmc_host *mmc = amba_get_drvdata(dev); |
| 789 | |
| 790 | amba_set_drvdata(dev, NULL); |
| 791 | |
| 792 | if (mmc) { |
| 793 | struct mmci_host *host = mmc_priv(mmc); |
| 794 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 795 | mmc_remove_host(mmc); |
| 796 | |
| 797 | writel(0, host->base + MMCIMASK0); |
| 798 | writel(0, host->base + MMCIMASK1); |
| 799 | |
| 800 | writel(0, host->base + MMCICOMMAND); |
| 801 | writel(0, host->base + MMCIDATACTRL); |
| 802 | |
| 803 | free_irq(dev->irq[0], host); |
| 804 | free_irq(dev->irq[1], host); |
| 805 | |
Russell King | 8900144 | 2009-07-09 15:16:07 +0100 | [diff] [blame] | 806 | if (host->gpio_wp != -ENOSYS) |
| 807 | gpio_free(host->gpio_wp); |
| 808 | if (host->gpio_cd != -ENOSYS) |
| 809 | gpio_free(host->gpio_cd); |
| 810 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 811 | iounmap(host->base); |
| 812 | clk_disable(host->clk); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 813 | clk_put(host->clk); |
| 814 | |
Linus Walleij | 34e84f3 | 2009-09-22 14:41:40 +0100 | [diff] [blame] | 815 | if (regulator_is_enabled(host->vcc)) |
| 816 | regulator_disable(host->vcc); |
| 817 | regulator_put(host->vcc); |
| 818 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 819 | mmc_free_host(mmc); |
| 820 | |
| 821 | amba_release_regions(dev); |
| 822 | } |
| 823 | |
| 824 | return 0; |
| 825 | } |
| 826 | |
| 827 | #ifdef CONFIG_PM |
Pavel Machek | e5378ca | 2005-04-16 15:25:29 -0700 | [diff] [blame] | 828 | static int mmci_suspend(struct amba_device *dev, pm_message_t state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 829 | { |
| 830 | struct mmc_host *mmc = amba_get_drvdata(dev); |
| 831 | int ret = 0; |
| 832 | |
| 833 | if (mmc) { |
| 834 | struct mmci_host *host = mmc_priv(mmc); |
| 835 | |
Matt Fleming | 1a13f8f | 2010-05-26 14:42:08 -0700 | [diff] [blame] | 836 | ret = mmc_suspend_host(mmc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 837 | if (ret == 0) |
| 838 | writel(0, host->base + MMCIMASK0); |
| 839 | } |
| 840 | |
| 841 | return ret; |
| 842 | } |
| 843 | |
| 844 | static int mmci_resume(struct amba_device *dev) |
| 845 | { |
| 846 | struct mmc_host *mmc = amba_get_drvdata(dev); |
| 847 | int ret = 0; |
| 848 | |
| 849 | if (mmc) { |
| 850 | struct mmci_host *host = mmc_priv(mmc); |
| 851 | |
| 852 | writel(MCI_IRQENABLE, host->base + MMCIMASK0); |
| 853 | |
| 854 | ret = mmc_resume_host(mmc); |
| 855 | } |
| 856 | |
| 857 | return ret; |
| 858 | } |
| 859 | #else |
| 860 | #define mmci_suspend NULL |
| 861 | #define mmci_resume NULL |
| 862 | #endif |
| 863 | |
| 864 | static struct amba_id mmci_ids[] = { |
| 865 | { |
| 866 | .id = 0x00041180, |
| 867 | .mask = 0x000fffff, |
Rabin Vincent | 4956e10 | 2010-07-21 12:54:40 +0100 | [diff] [blame^] | 868 | .data = &variant_arm, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 869 | }, |
| 870 | { |
| 871 | .id = 0x00041181, |
| 872 | .mask = 0x000fffff, |
Rabin Vincent | 4956e10 | 2010-07-21 12:54:40 +0100 | [diff] [blame^] | 873 | .data = &variant_arm, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 874 | }, |
Linus Walleij | cc30d60 | 2009-01-04 15:18:54 +0100 | [diff] [blame] | 875 | /* ST Micro variants */ |
| 876 | { |
| 877 | .id = 0x00180180, |
| 878 | .mask = 0x00ffffff, |
Rabin Vincent | 4956e10 | 2010-07-21 12:54:40 +0100 | [diff] [blame^] | 879 | .data = &variant_u300, |
Linus Walleij | cc30d60 | 2009-01-04 15:18:54 +0100 | [diff] [blame] | 880 | }, |
| 881 | { |
| 882 | .id = 0x00280180, |
| 883 | .mask = 0x00ffffff, |
Rabin Vincent | 4956e10 | 2010-07-21 12:54:40 +0100 | [diff] [blame^] | 884 | .data = &variant_u300, |
| 885 | }, |
| 886 | { |
| 887 | .id = 0x00480180, |
| 888 | .mask = 0x00ffffff, |
| 889 | .data = &variant_ux500, |
Linus Walleij | cc30d60 | 2009-01-04 15:18:54 +0100 | [diff] [blame] | 890 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 891 | { 0, 0 }, |
| 892 | }; |
| 893 | |
| 894 | static struct amba_driver mmci_driver = { |
| 895 | .drv = { |
| 896 | .name = DRIVER_NAME, |
| 897 | }, |
| 898 | .probe = mmci_probe, |
Linus Walleij | 6dc4a47 | 2009-03-07 00:23:52 +0100 | [diff] [blame] | 899 | .remove = __devexit_p(mmci_remove), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 900 | .suspend = mmci_suspend, |
| 901 | .resume = mmci_resume, |
| 902 | .id_table = mmci_ids, |
| 903 | }; |
| 904 | |
| 905 | static int __init mmci_init(void) |
| 906 | { |
| 907 | return amba_driver_register(&mmci_driver); |
| 908 | } |
| 909 | |
| 910 | static void __exit mmci_exit(void) |
| 911 | { |
| 912 | amba_driver_unregister(&mmci_driver); |
| 913 | } |
| 914 | |
| 915 | module_init(mmci_init); |
| 916 | module_exit(mmci_exit); |
| 917 | module_param(fmax, uint, 0444); |
| 918 | |
| 919 | MODULE_DESCRIPTION("ARM PrimeCell PL180/181 Multimedia Card Interface driver"); |
| 920 | MODULE_LICENSE("GPL"); |