Wolfram Sang | cdbfaf6 | 2018-06-11 23:49:36 +0900 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Magnus Damm | eccf060 | 2013-03-26 10:34:24 +0900 | [diff] [blame] | 2 | /* |
| 3 | * Device Tree Source for the r8a73a4 SoC |
| 4 | * |
| 5 | * Copyright (C) 2013 Renesas Solutions Corp. |
| 6 | * Copyright (C) 2013 Magnus Damm |
Magnus Damm | eccf060 | 2013-03-26 10:34:24 +0900 | [diff] [blame] | 7 | */ |
| 8 | |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 9 | #include <dt-bindings/clock/r8a73a4-clock.h> |
Laurent Pinchart | 5f75e73 | 2013-11-19 03:18:25 +0100 | [diff] [blame] | 10 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 11 | #include <dt-bindings/interrupt-controller/irq.h> |
| 12 | |
Magnus Damm | eccf060 | 2013-03-26 10:34:24 +0900 | [diff] [blame] | 13 | / { |
| 14 | compatible = "renesas,r8a73a4"; |
| 15 | interrupt-parent = <&gic>; |
Takashi Yoshii | 26a0d2d | 2013-03-29 16:45:56 +0900 | [diff] [blame] | 16 | #address-cells = <2>; |
| 17 | #size-cells = <2>; |
Magnus Damm | eccf060 | 2013-03-26 10:34:24 +0900 | [diff] [blame] | 18 | |
| 19 | cpus { |
| 20 | #address-cells = <1>; |
| 21 | #size-cells = <0>; |
| 22 | |
| 23 | cpu0: cpu@0 { |
| 24 | device_type = "cpu"; |
| 25 | compatible = "arm,cortex-a15"; |
| 26 | reg = <0>; |
Geert Uytterhoeven | a7869a5 | 2017-10-12 11:35:06 +0200 | [diff] [blame] | 27 | clocks = <&cpg_clocks R8A73A4_CLK_Z>; |
Magnus Damm | eccf060 | 2013-03-26 10:34:24 +0900 | [diff] [blame] | 28 | clock-frequency = <1500000000>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 29 | power-domains = <&pd_a2sl>; |
Geert Uytterhoeven | c86a4b6 | 2016-02-15 21:38:29 +0100 | [diff] [blame] | 30 | next-level-cache = <&L2_CA15>; |
Magnus Damm | eccf060 | 2013-03-26 10:34:24 +0900 | [diff] [blame] | 31 | }; |
Geert Uytterhoeven | b0da45c | 2016-05-20 09:09:53 +0200 | [diff] [blame] | 32 | |
Geert Uytterhoeven | cdaf641 | 2017-03-06 17:40:36 +0100 | [diff] [blame] | 33 | L2_CA15: cache-controller-0 { |
Geert Uytterhoeven | b0da45c | 2016-05-20 09:09:53 +0200 | [diff] [blame] | 34 | compatible = "cache"; |
Geert Uytterhoeven | b0da45c | 2016-05-20 09:09:53 +0200 | [diff] [blame] | 35 | clocks = <&cpg_clocks R8A73A4_CLK_Z>; |
| 36 | power-domains = <&pd_a3sm>; |
| 37 | cache-unified; |
| 38 | cache-level = <2>; |
| 39 | }; |
| 40 | |
Geert Uytterhoeven | cdaf641 | 2017-03-06 17:40:36 +0100 | [diff] [blame] | 41 | L2_CA7: cache-controller-1 { |
Geert Uytterhoeven | b0da45c | 2016-05-20 09:09:53 +0200 | [diff] [blame] | 42 | compatible = "cache"; |
Geert Uytterhoeven | b0da45c | 2016-05-20 09:09:53 +0200 | [diff] [blame] | 43 | clocks = <&cpg_clocks R8A73A4_CLK_Z2>; |
| 44 | power-domains = <&pd_a3km>; |
| 45 | cache-unified; |
| 46 | cache-level = <2>; |
| 47 | }; |
Magnus Damm | eccf060 | 2013-03-26 10:34:24 +0900 | [diff] [blame] | 48 | }; |
| 49 | |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 50 | ptm { |
| 51 | compatible = "arm,coresight-etm3x"; |
| 52 | power-domains = <&pd_d4>; |
| 53 | }; |
| 54 | |
Magnus Damm | eccf060 | 2013-03-26 10:34:24 +0900 | [diff] [blame] | 55 | timer { |
| 56 | compatible = "arm,armv7-timer"; |
Geert Uytterhoeven | 45e75c4 | 2018-05-07 15:19:53 +0200 | [diff] [blame] | 57 | interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, |
| 58 | <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, |
| 59 | <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, |
| 60 | <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; |
Magnus Damm | eccf060 | 2013-03-26 10:34:24 +0900 | [diff] [blame] | 61 | }; |
Magnus Damm | 984ca29 | 2013-03-26 10:34:42 +0900 | [diff] [blame] | 62 | |
Geert Uytterhoeven | 35dd549 | 2015-01-14 12:13:00 +0100 | [diff] [blame] | 63 | dbsc1: memory-controller@e6790000 { |
| 64 | compatible = "renesas,dbsc-r8a73a4"; |
| 65 | reg = <0 0xe6790000 0 0x10000>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 66 | power-domains = <&pd_a3bc>; |
Geert Uytterhoeven | 35dd549 | 2015-01-14 12:13:00 +0100 | [diff] [blame] | 67 | }; |
| 68 | |
| 69 | dbsc2: memory-controller@e67a0000 { |
| 70 | compatible = "renesas,dbsc-r8a73a4"; |
| 71 | reg = <0 0xe67a0000 0 0x10000>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 72 | power-domains = <&pd_a3bc>; |
Geert Uytterhoeven | 35dd549 | 2015-01-14 12:13:00 +0100 | [diff] [blame] | 73 | }; |
| 74 | |
Ulrich Hecht | 7300505 | 2014-09-25 10:32:14 +0900 | [diff] [blame] | 75 | dmac: dma-multiplexer { |
| 76 | compatible = "renesas,shdma-mux"; |
| 77 | #dma-cells = <1>; |
| 78 | dma-channels = <20>; |
| 79 | dma-requests = <256>; |
| 80 | #address-cells = <2>; |
| 81 | #size-cells = <2>; |
| 82 | ranges; |
| 83 | |
| 84 | dma0: dma-controller@e6700020 { |
| 85 | compatible = "renesas,shdma-r8a73a4"; |
| 86 | reg = <0 0xe6700020 0 0x89e0>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 87 | interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH |
| 88 | GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH |
| 89 | GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH |
| 90 | GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH |
| 91 | GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH |
| 92 | GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH |
| 93 | GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH |
| 94 | GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH |
| 95 | GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH |
| 96 | GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH |
| 97 | GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH |
| 98 | GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH |
| 99 | GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH |
| 100 | GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH |
| 101 | GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH |
| 102 | GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH |
| 103 | GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH |
| 104 | GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH |
| 105 | GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH |
| 106 | GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH |
| 107 | GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 7300505 | 2014-09-25 10:32:14 +0900 | [diff] [blame] | 108 | interrupt-names = "error", |
| 109 | "ch0", "ch1", "ch2", "ch3", |
| 110 | "ch4", "ch5", "ch6", "ch7", |
| 111 | "ch8", "ch9", "ch10", "ch11", |
| 112 | "ch12", "ch13", "ch14", "ch15", |
| 113 | "ch16", "ch17", "ch18", "ch19"; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 114 | clocks = <&mstp2_clks R8A73A4_CLK_DMAC>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 115 | power-domains = <&pd_a3sp>; |
Ulrich Hecht | 7300505 | 2014-09-25 10:32:14 +0900 | [diff] [blame] | 116 | }; |
| 117 | }; |
| 118 | |
Ulrich Hecht | 7300505 | 2014-09-25 10:32:14 +0900 | [diff] [blame] | 119 | i2c5: i2c@e60b0000 { |
| 120 | #address-cells = <1>; |
| 121 | #size-cells = <0>; |
Geert Uytterhoeven | 7e9ad4d | 2014-11-06 12:52:10 +0100 | [diff] [blame] | 122 | compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; |
Ulrich Hecht | 7300505 | 2014-09-25 10:32:14 +0900 | [diff] [blame] | 123 | reg = <0 0xe60b0000 0 0x428>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 124 | interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 125 | clocks = <&mstp4_clks R8A73A4_CLK_IIC5>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 126 | power-domains = <&pd_a3sp>; |
Simon Horman | f7b6523 | 2014-07-07 09:54:36 +0200 | [diff] [blame] | 127 | |
| 128 | status = "disabled"; |
| 129 | }; |
| 130 | |
| 131 | cmt1: timer@e6130000 { |
Magnus Damm | 86656e9 | 2017-11-28 14:47:25 +0100 | [diff] [blame] | 132 | compatible = "renesas,r8a73a4-cmt1", "renesas,rcar-gen2-cmt1"; |
Simon Horman | f7b6523 | 2014-07-07 09:54:36 +0200 | [diff] [blame] | 133 | reg = <0 0xe6130000 0 0x1004>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 134 | interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 135 | clocks = <&mstp3_clks R8A73A4_CLK_CMT1>; |
| 136 | clock-names = "fck"; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 137 | power-domains = <&pd_c5>; |
Ulrich Hecht | 7300505 | 2014-09-25 10:32:14 +0900 | [diff] [blame] | 138 | status = "disabled"; |
| 139 | }; |
| 140 | |
Magnus Damm | 984ca29 | 2013-03-26 10:34:42 +0900 | [diff] [blame] | 141 | irqc0: interrupt-controller@e61c0000 { |
Geert Uytterhoeven | 34abee3 | 2014-09-15 12:21:17 +0200 | [diff] [blame] | 142 | compatible = "renesas,irqc-r8a73a4", "renesas,irqc"; |
Magnus Damm | 984ca29 | 2013-03-26 10:34:42 +0900 | [diff] [blame] | 143 | #interrupt-cells = <2>; |
| 144 | interrupt-controller; |
Takashi Yoshii | 26a0d2d | 2013-03-29 16:45:56 +0900 | [diff] [blame] | 145 | reg = <0 0xe61c0000 0 0x200>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 146 | interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, |
| 147 | <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, |
| 148 | <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, |
| 149 | <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, |
| 150 | <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, |
| 151 | <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, |
| 152 | <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, |
| 153 | <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, |
| 154 | <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, |
| 155 | <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, |
| 156 | <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, |
| 157 | <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, |
| 158 | <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, |
| 159 | <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, |
| 160 | <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, |
| 161 | <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, |
| 162 | <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, |
| 163 | <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, |
| 164 | <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, |
| 165 | <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, |
| 166 | <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, |
| 167 | <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, |
| 168 | <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, |
| 169 | <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>, |
| 170 | <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, |
| 171 | <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, |
| 172 | <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, |
| 173 | <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, |
| 174 | <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, |
| 175 | <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, |
| 176 | <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, |
| 177 | <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 1c2a7eb | 2015-03-18 19:55:58 +0100 | [diff] [blame] | 178 | clocks = <&mstp4_clks R8A73A4_CLK_IRQC>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 179 | power-domains = <&pd_c4>; |
Magnus Damm | 984ca29 | 2013-03-26 10:34:42 +0900 | [diff] [blame] | 180 | }; |
| 181 | |
| 182 | irqc1: interrupt-controller@e61c0200 { |
Geert Uytterhoeven | 34abee3 | 2014-09-15 12:21:17 +0200 | [diff] [blame] | 183 | compatible = "renesas,irqc-r8a73a4", "renesas,irqc"; |
Magnus Damm | 984ca29 | 2013-03-26 10:34:42 +0900 | [diff] [blame] | 184 | #interrupt-cells = <2>; |
| 185 | interrupt-controller; |
Takashi Yoshii | 26a0d2d | 2013-03-29 16:45:56 +0900 | [diff] [blame] | 186 | reg = <0 0xe61c0200 0 0x200>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 187 | interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, |
| 188 | <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, |
| 189 | <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, |
| 190 | <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, |
| 191 | <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, |
| 192 | <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, |
| 193 | <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, |
| 194 | <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, |
| 195 | <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, |
| 196 | <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, |
| 197 | <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, |
| 198 | <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, |
| 199 | <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, |
| 200 | <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, |
| 201 | <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, |
| 202 | <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, |
| 203 | <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, |
| 204 | <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, |
| 205 | <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, |
| 206 | <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, |
| 207 | <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, |
| 208 | <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, |
| 209 | <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, |
| 210 | <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, |
| 211 | <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, |
| 212 | <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 1c2a7eb | 2015-03-18 19:55:58 +0100 | [diff] [blame] | 213 | clocks = <&mstp4_clks R8A73A4_CLK_IRQC>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 214 | power-domains = <&pd_c4>; |
Magnus Damm | 984ca29 | 2013-03-26 10:34:42 +0900 | [diff] [blame] | 215 | }; |
| 216 | |
Simon Horman | 5b9906c | 2017-04-26 12:05:31 +0200 | [diff] [blame] | 217 | pfc: pin-controller@e6050000 { |
Geert Uytterhoeven | e4ba0a9 | 2015-02-17 16:04:43 +0100 | [diff] [blame] | 218 | compatible = "renesas,pfc-r8a73a4"; |
| 219 | reg = <0 0xe6050000 0 0x9000>; |
| 220 | gpio-controller; |
| 221 | #gpio-cells = <2>; |
Geert Uytterhoeven | 17ccec5 | 2015-08-04 15:55:14 +0200 | [diff] [blame] | 222 | gpio-ranges = |
| 223 | <&pfc 0 0 31>, <&pfc 32 32 9>, |
| 224 | <&pfc 64 64 22>, <&pfc 96 96 31>, |
| 225 | <&pfc 128 128 7>, <&pfc 160 160 19>, |
| 226 | <&pfc 192 192 31>, <&pfc 224 224 27>, |
| 227 | <&pfc 256 256 28>, <&pfc 288 288 21>, |
| 228 | <&pfc 320 320 10>; |
Geert Uytterhoeven | e4ba0a9 | 2015-02-17 16:04:43 +0100 | [diff] [blame] | 229 | interrupts-extended = |
| 230 | <&irqc0 0 0>, <&irqc0 1 0>, <&irqc0 2 0>, <&irqc0 3 0>, |
| 231 | <&irqc0 4 0>, <&irqc0 5 0>, <&irqc0 6 0>, <&irqc0 7 0>, |
| 232 | <&irqc0 8 0>, <&irqc0 9 0>, <&irqc0 10 0>, <&irqc0 11 0>, |
| 233 | <&irqc0 12 0>, <&irqc0 13 0>, <&irqc0 14 0>, <&irqc0 15 0>, |
| 234 | <&irqc0 16 0>, <&irqc0 17 0>, <&irqc0 18 0>, <&irqc0 19 0>, |
| 235 | <&irqc0 20 0>, <&irqc0 21 0>, <&irqc0 22 0>, <&irqc0 23 0>, |
| 236 | <&irqc0 24 0>, <&irqc0 25 0>, <&irqc0 26 0>, <&irqc0 27 0>, |
| 237 | <&irqc0 28 0>, <&irqc0 29 0>, <&irqc0 30 0>, <&irqc0 31 0>, |
| 238 | <&irqc1 0 0>, <&irqc1 1 0>, <&irqc1 2 0>, <&irqc1 3 0>, |
| 239 | <&irqc1 4 0>, <&irqc1 5 0>, <&irqc1 6 0>, <&irqc1 7 0>, |
| 240 | <&irqc1 8 0>, <&irqc1 9 0>, <&irqc1 10 0>, <&irqc1 11 0>, |
| 241 | <&irqc1 12 0>, <&irqc1 13 0>, <&irqc1 14 0>, <&irqc1 15 0>, |
| 242 | <&irqc1 16 0>, <&irqc1 17 0>, <&irqc1 18 0>, <&irqc1 19 0>, |
| 243 | <&irqc1 20 0>, <&irqc1 21 0>, <&irqc1 22 0>, <&irqc1 23 0>, |
| 244 | <&irqc1 24 0>, <&irqc1 25 0>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 245 | power-domains = <&pd_c5>; |
Geert Uytterhoeven | e4ba0a9 | 2015-02-17 16:04:43 +0100 | [diff] [blame] | 246 | }; |
| 247 | |
Kuninori Morimoto | c91cf2f | 2013-03-25 23:18:15 -0700 | [diff] [blame] | 248 | thermal@e61f0000 { |
Geert Uytterhoeven | a2cfaa7 | 2014-08-28 10:20:39 +0200 | [diff] [blame] | 249 | compatible = "renesas,thermal-r8a73a4", "renesas,rcar-thermal"; |
Takashi Yoshii | 26a0d2d | 2013-03-29 16:45:56 +0900 | [diff] [blame] | 250 | reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>, |
| 251 | <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 252 | interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 253 | clocks = <&mstp5_clks R8A73A4_CLK_THERMAL>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 254 | power-domains = <&pd_c5>; |
Kuninori Morimoto | c91cf2f | 2013-03-25 23:18:15 -0700 | [diff] [blame] | 255 | }; |
Guennadi Liakhovetski | f98c106 | 2013-06-27 11:47:57 +0200 | [diff] [blame] | 256 | |
| 257 | i2c0: i2c@e6500000 { |
| 258 | #address-cells = <1>; |
| 259 | #size-cells = <0>; |
Geert Uytterhoeven | 7e9ad4d | 2014-11-06 12:52:10 +0100 | [diff] [blame] | 260 | compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; |
Guennadi Liakhovetski | f98c106 | 2013-06-27 11:47:57 +0200 | [diff] [blame] | 261 | reg = <0 0xe6500000 0 0x428>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 262 | interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 263 | clocks = <&mstp3_clks R8A73A4_CLK_IIC0>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 264 | power-domains = <&pd_a3sp>; |
Guennadi Liakhovetski | eda3a4f | 2013-09-26 13:06:01 +0200 | [diff] [blame] | 265 | status = "disabled"; |
Guennadi Liakhovetski | f98c106 | 2013-06-27 11:47:57 +0200 | [diff] [blame] | 266 | }; |
| 267 | |
| 268 | i2c1: i2c@e6510000 { |
| 269 | #address-cells = <1>; |
| 270 | #size-cells = <0>; |
Geert Uytterhoeven | 7e9ad4d | 2014-11-06 12:52:10 +0100 | [diff] [blame] | 271 | compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; |
Guennadi Liakhovetski | f98c106 | 2013-06-27 11:47:57 +0200 | [diff] [blame] | 272 | reg = <0 0xe6510000 0 0x428>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 273 | interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 274 | clocks = <&mstp3_clks R8A73A4_CLK_IIC1>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 275 | power-domains = <&pd_a3sp>; |
Guennadi Liakhovetski | eda3a4f | 2013-09-26 13:06:01 +0200 | [diff] [blame] | 276 | status = "disabled"; |
Guennadi Liakhovetski | f98c106 | 2013-06-27 11:47:57 +0200 | [diff] [blame] | 277 | }; |
| 278 | |
| 279 | i2c2: i2c@e6520000 { |
| 280 | #address-cells = <1>; |
| 281 | #size-cells = <0>; |
Geert Uytterhoeven | 7e9ad4d | 2014-11-06 12:52:10 +0100 | [diff] [blame] | 282 | compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; |
Guennadi Liakhovetski | f98c106 | 2013-06-27 11:47:57 +0200 | [diff] [blame] | 283 | reg = <0 0xe6520000 0 0x428>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 284 | interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 285 | clocks = <&mstp3_clks R8A73A4_CLK_IIC2>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 286 | power-domains = <&pd_a3sp>; |
Guennadi Liakhovetski | eda3a4f | 2013-09-26 13:06:01 +0200 | [diff] [blame] | 287 | status = "disabled"; |
Guennadi Liakhovetski | f98c106 | 2013-06-27 11:47:57 +0200 | [diff] [blame] | 288 | }; |
| 289 | |
| 290 | i2c3: i2c@e6530000 { |
| 291 | #address-cells = <1>; |
| 292 | #size-cells = <0>; |
Geert Uytterhoeven | 7e9ad4d | 2014-11-06 12:52:10 +0100 | [diff] [blame] | 293 | compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; |
Guennadi Liakhovetski | f98c106 | 2013-06-27 11:47:57 +0200 | [diff] [blame] | 294 | reg = <0 0xe6530000 0 0x428>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 295 | interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 296 | clocks = <&mstp4_clks R8A73A4_CLK_IIC3>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 297 | power-domains = <&pd_a3sp>; |
Guennadi Liakhovetski | eda3a4f | 2013-09-26 13:06:01 +0200 | [diff] [blame] | 298 | status = "disabled"; |
Guennadi Liakhovetski | f98c106 | 2013-06-27 11:47:57 +0200 | [diff] [blame] | 299 | }; |
| 300 | |
| 301 | i2c4: i2c@e6540000 { |
| 302 | #address-cells = <1>; |
| 303 | #size-cells = <0>; |
Geert Uytterhoeven | 7e9ad4d | 2014-11-06 12:52:10 +0100 | [diff] [blame] | 304 | compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; |
Guennadi Liakhovetski | f98c106 | 2013-06-27 11:47:57 +0200 | [diff] [blame] | 305 | reg = <0 0xe6540000 0 0x428>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 306 | interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 307 | clocks = <&mstp4_clks R8A73A4_CLK_IIC4>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 308 | power-domains = <&pd_a3sp>; |
Guennadi Liakhovetski | eda3a4f | 2013-09-26 13:06:01 +0200 | [diff] [blame] | 309 | status = "disabled"; |
Guennadi Liakhovetski | f98c106 | 2013-06-27 11:47:57 +0200 | [diff] [blame] | 310 | }; |
| 311 | |
Guennadi Liakhovetski | f98c106 | 2013-06-27 11:47:57 +0200 | [diff] [blame] | 312 | i2c6: i2c@e6550000 { |
| 313 | #address-cells = <1>; |
| 314 | #size-cells = <0>; |
Geert Uytterhoeven | 7e9ad4d | 2014-11-06 12:52:10 +0100 | [diff] [blame] | 315 | compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; |
Guennadi Liakhovetski | f98c106 | 2013-06-27 11:47:57 +0200 | [diff] [blame] | 316 | reg = <0 0xe6550000 0 0x428>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 317 | interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 318 | clocks = <&mstp3_clks R8A73A4_CLK_IIC6>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 319 | power-domains = <&pd_a3sp>; |
Guennadi Liakhovetski | eda3a4f | 2013-09-26 13:06:01 +0200 | [diff] [blame] | 320 | status = "disabled"; |
Guennadi Liakhovetski | f98c106 | 2013-06-27 11:47:57 +0200 | [diff] [blame] | 321 | }; |
| 322 | |
| 323 | i2c7: i2c@e6560000 { |
| 324 | #address-cells = <1>; |
| 325 | #size-cells = <0>; |
Geert Uytterhoeven | 7e9ad4d | 2014-11-06 12:52:10 +0100 | [diff] [blame] | 326 | compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; |
Guennadi Liakhovetski | f98c106 | 2013-06-27 11:47:57 +0200 | [diff] [blame] | 327 | reg = <0 0xe6560000 0 0x428>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 328 | interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 329 | clocks = <&mstp3_clks R8A73A4_CLK_IIC7>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 330 | power-domains = <&pd_a3sp>; |
Guennadi Liakhovetski | eda3a4f | 2013-09-26 13:06:01 +0200 | [diff] [blame] | 331 | status = "disabled"; |
Guennadi Liakhovetski | f98c106 | 2013-06-27 11:47:57 +0200 | [diff] [blame] | 332 | }; |
| 333 | |
| 334 | i2c8: i2c@e6570000 { |
| 335 | #address-cells = <1>; |
| 336 | #size-cells = <0>; |
Geert Uytterhoeven | 7e9ad4d | 2014-11-06 12:52:10 +0100 | [diff] [blame] | 337 | compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; |
Guennadi Liakhovetski | f98c106 | 2013-06-27 11:47:57 +0200 | [diff] [blame] | 338 | reg = <0 0xe6570000 0 0x428>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 339 | interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 340 | clocks = <&mstp5_clks R8A73A4_CLK_IIC8>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 341 | power-domains = <&pd_a3sp>; |
Guennadi Liakhovetski | eda3a4f | 2013-09-26 13:06:01 +0200 | [diff] [blame] | 342 | status = "disabled"; |
Guennadi Liakhovetski | f98c106 | 2013-06-27 11:47:57 +0200 | [diff] [blame] | 343 | }; |
Guennadi Liakhovetski | 369ee2d | 2013-07-08 17:54:45 +0200 | [diff] [blame] | 344 | |
Ulrich Hecht | 0b3a0ef | 2014-11-04 17:21:24 +0100 | [diff] [blame] | 345 | scifb0: serial@e6c20000 { |
Simon Horman | 94f1a03 | 2014-07-07 09:54:33 +0200 | [diff] [blame] | 346 | compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; |
| 347 | reg = <0 0xe6c20000 0 0x100>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 348 | interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 349 | clocks = <&mstp2_clks R8A73A4_CLK_SCIFB0>; |
Laurent Pinchart | d4be2f1 | 2016-01-29 10:47:33 +0100 | [diff] [blame] | 350 | clock-names = "fck"; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 351 | power-domains = <&pd_a3sp>; |
Simon Horman | 94f1a03 | 2014-07-07 09:54:33 +0200 | [diff] [blame] | 352 | status = "disabled"; |
| 353 | }; |
| 354 | |
Ulrich Hecht | 0b3a0ef | 2014-11-04 17:21:24 +0100 | [diff] [blame] | 355 | scifb1: serial@e6c30000 { |
Simon Horman | 94f1a03 | 2014-07-07 09:54:33 +0200 | [diff] [blame] | 356 | compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; |
| 357 | reg = <0 0xe6c30000 0 0x100>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 358 | interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 359 | clocks = <&mstp2_clks R8A73A4_CLK_SCIFB1>; |
Laurent Pinchart | d4be2f1 | 2016-01-29 10:47:33 +0100 | [diff] [blame] | 360 | clock-names = "fck"; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 361 | power-domains = <&pd_a3sp>; |
Simon Horman | 94f1a03 | 2014-07-07 09:54:33 +0200 | [diff] [blame] | 362 | status = "disabled"; |
| 363 | }; |
| 364 | |
Ulrich Hecht | 7300505 | 2014-09-25 10:32:14 +0900 | [diff] [blame] | 365 | scifa0: serial@e6c40000 { |
| 366 | compatible = "renesas,scifa-r8a73a4", "renesas,scifa"; |
| 367 | reg = <0 0xe6c40000 0 0x100>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 368 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 369 | clocks = <&mstp2_clks R8A73A4_CLK_SCIFA0>; |
Laurent Pinchart | d4be2f1 | 2016-01-29 10:47:33 +0100 | [diff] [blame] | 370 | clock-names = "fck"; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 371 | power-domains = <&pd_a3sp>; |
Ulrich Hecht | 7300505 | 2014-09-25 10:32:14 +0900 | [diff] [blame] | 372 | status = "disabled"; |
| 373 | }; |
| 374 | |
| 375 | scifa1: serial@e6c50000 { |
| 376 | compatible = "renesas,scifa-r8a73a4", "renesas,scifa"; |
| 377 | reg = <0 0xe6c50000 0 0x100>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 378 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 379 | clocks = <&mstp2_clks R8A73A4_CLK_SCIFA1>; |
Laurent Pinchart | d4be2f1 | 2016-01-29 10:47:33 +0100 | [diff] [blame] | 380 | clock-names = "fck"; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 381 | power-domains = <&pd_a3sp>; |
Ulrich Hecht | 7300505 | 2014-09-25 10:32:14 +0900 | [diff] [blame] | 382 | status = "disabled"; |
| 383 | }; |
| 384 | |
Ulrich Hecht | 0b3a0ef | 2014-11-04 17:21:24 +0100 | [diff] [blame] | 385 | scifb2: serial@e6ce0000 { |
Simon Horman | 94f1a03 | 2014-07-07 09:54:33 +0200 | [diff] [blame] | 386 | compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; |
| 387 | reg = <0 0xe6ce0000 0 0x100>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 388 | interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 389 | clocks = <&mstp2_clks R8A73A4_CLK_SCIFB2>; |
Laurent Pinchart | d4be2f1 | 2016-01-29 10:47:33 +0100 | [diff] [blame] | 390 | clock-names = "fck"; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 391 | power-domains = <&pd_a3sp>; |
Simon Horman | 94f1a03 | 2014-07-07 09:54:33 +0200 | [diff] [blame] | 392 | status = "disabled"; |
| 393 | }; |
| 394 | |
Ulrich Hecht | 0b3a0ef | 2014-11-04 17:21:24 +0100 | [diff] [blame] | 395 | scifb3: serial@e6cf0000 { |
Simon Horman | 94f1a03 | 2014-07-07 09:54:33 +0200 | [diff] [blame] | 396 | compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; |
| 397 | reg = <0 0xe6cf0000 0 0x100>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 398 | interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 399 | clocks = <&mstp2_clks R8A73A4_CLK_SCIFB3>; |
Laurent Pinchart | d4be2f1 | 2016-01-29 10:47:33 +0100 | [diff] [blame] | 400 | clock-names = "fck"; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 401 | power-domains = <&pd_c4>; |
Simon Horman | 94f1a03 | 2014-07-07 09:54:33 +0200 | [diff] [blame] | 402 | status = "disabled"; |
| 403 | }; |
| 404 | |
Kuninori Morimoto | 43304a5 | 2013-10-21 19:35:31 -0700 | [diff] [blame] | 405 | sdhi0: sd@ee100000 { |
Guennadi Liakhovetski | df1d058 | 2013-08-29 17:14:49 +0200 | [diff] [blame] | 406 | compatible = "renesas,sdhi-r8a73a4"; |
Guennadi Liakhovetski | 369ee2d | 2013-07-08 17:54:45 +0200 | [diff] [blame] | 407 | reg = <0 0xee100000 0 0x100>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 408 | interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 409 | clocks = <&mstp3_clks R8A73A4_CLK_SDHI0>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 410 | power-domains = <&pd_a3sp>; |
Guennadi Liakhovetski | 369ee2d | 2013-07-08 17:54:45 +0200 | [diff] [blame] | 411 | cap-sd-highspeed; |
| 412 | status = "disabled"; |
| 413 | }; |
| 414 | |
Kuninori Morimoto | 43304a5 | 2013-10-21 19:35:31 -0700 | [diff] [blame] | 415 | sdhi1: sd@ee120000 { |
Guennadi Liakhovetski | df1d058 | 2013-08-29 17:14:49 +0200 | [diff] [blame] | 416 | compatible = "renesas,sdhi-r8a73a4"; |
Guennadi Liakhovetski | 369ee2d | 2013-07-08 17:54:45 +0200 | [diff] [blame] | 417 | reg = <0 0xee120000 0 0x100>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 418 | interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 419 | clocks = <&mstp3_clks R8A73A4_CLK_SDHI1>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 420 | power-domains = <&pd_a3sp>; |
Guennadi Liakhovetski | 369ee2d | 2013-07-08 17:54:45 +0200 | [diff] [blame] | 421 | cap-sd-highspeed; |
| 422 | status = "disabled"; |
| 423 | }; |
| 424 | |
Kuninori Morimoto | 43304a5 | 2013-10-21 19:35:31 -0700 | [diff] [blame] | 425 | sdhi2: sd@ee140000 { |
Guennadi Liakhovetski | df1d058 | 2013-08-29 17:14:49 +0200 | [diff] [blame] | 426 | compatible = "renesas,sdhi-r8a73a4"; |
Guennadi Liakhovetski | 369ee2d | 2013-07-08 17:54:45 +0200 | [diff] [blame] | 427 | reg = <0 0xee140000 0 0x100>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 428 | interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 429 | clocks = <&mstp3_clks R8A73A4_CLK_SDHI2>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 430 | power-domains = <&pd_a3sp>; |
Guennadi Liakhovetski | 369ee2d | 2013-07-08 17:54:45 +0200 | [diff] [blame] | 431 | cap-sd-highspeed; |
| 432 | status = "disabled"; |
| 433 | }; |
Ulrich Hecht | 7300505 | 2014-09-25 10:32:14 +0900 | [diff] [blame] | 434 | |
| 435 | mmcif0: mmc@ee200000 { |
Simon Horman | 5b01617 | 2016-11-24 21:15:12 +0100 | [diff] [blame] | 436 | compatible = "renesas,mmcif-r8a73a4", "renesas,sh-mmcif"; |
Ulrich Hecht | 7300505 | 2014-09-25 10:32:14 +0900 | [diff] [blame] | 437 | reg = <0 0xee200000 0 0x80>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 438 | interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 439 | clocks = <&mstp3_clks R8A73A4_CLK_MMCIF0>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 440 | power-domains = <&pd_a3sp>; |
Ulrich Hecht | 7300505 | 2014-09-25 10:32:14 +0900 | [diff] [blame] | 441 | reg-io-width = <4>; |
| 442 | status = "disabled"; |
| 443 | }; |
| 444 | |
| 445 | mmcif1: mmc@ee220000 { |
Simon Horman | 5b01617 | 2016-11-24 21:15:12 +0100 | [diff] [blame] | 446 | compatible = "renesas,mmcif-r8a73a4", "renesas,sh-mmcif"; |
Ulrich Hecht | 7300505 | 2014-09-25 10:32:14 +0900 | [diff] [blame] | 447 | reg = <0 0xee220000 0 0x80>; |
Simon Horman | 4d5746a | 2016-01-25 09:52:49 +0900 | [diff] [blame] | 448 | interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; |
Ulrich Hecht | 662dd64 | 2015-01-20 13:51:41 +0100 | [diff] [blame] | 449 | clocks = <&mstp3_clks R8A73A4_CLK_MMCIF1>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 450 | power-domains = <&pd_a3sp>; |
Ulrich Hecht | 7300505 | 2014-09-25 10:32:14 +0900 | [diff] [blame] | 451 | reg-io-width = <4>; |
| 452 | status = "disabled"; |
| 453 | }; |
| 454 | |
| 455 | gic: interrupt-controller@f1001000 { |
Geert Uytterhoeven | eaec1d6 | 2015-06-17 15:03:32 +0200 | [diff] [blame] | 456 | compatible = "arm,gic-400"; |
Ulrich Hecht | 7300505 | 2014-09-25 10:32:14 +0900 | [diff] [blame] | 457 | #interrupt-cells = <3>; |
| 458 | #address-cells = <0>; |
| 459 | interrupt-controller; |
| 460 | reg = <0 0xf1001000 0 0x1000>, |
Marc Zyngier | 387720c | 2017-01-18 09:27:28 +0000 | [diff] [blame] | 461 | <0 0xf1002000 0 0x2000>, |
Ulrich Hecht | 7300505 | 2014-09-25 10:32:14 +0900 | [diff] [blame] | 462 | <0 0xf1004000 0 0x2000>, |
| 463 | <0 0xf1006000 0 0x2000>; |
Geert Uytterhoeven | 45e75c4 | 2018-05-07 15:19:53 +0200 | [diff] [blame] | 464 | interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; |
Geert Uytterhoeven | c11333c | 2017-03-06 17:58:06 +0100 | [diff] [blame] | 465 | clocks = <&mstp4_clks R8A73A4_CLK_INTC_SYS>; |
| 466 | clock-names = "clk"; |
| 467 | power-domains = <&pd_c4>; |
Ulrich Hecht | 7300505 | 2014-09-25 10:32:14 +0900 | [diff] [blame] | 468 | }; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 469 | |
Geert Uytterhoeven | 271b3ad | 2015-02-17 16:04:41 +0100 | [diff] [blame] | 470 | bsc: bus@fec10000 { |
| 471 | compatible = "renesas,bsc-r8a73a4", "renesas,bsc", |
| 472 | "simple-pm-bus"; |
| 473 | #address-cells = <1>; |
| 474 | #size-cells = <1>; |
| 475 | ranges = <0 0 0 0x20000000>; |
| 476 | reg = <0 0xfec10000 0 0x400>; |
| 477 | clocks = <&zb_clk>; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 478 | power-domains = <&pd_c4>; |
Geert Uytterhoeven | 271b3ad | 2015-02-17 16:04:41 +0100 | [diff] [blame] | 479 | }; |
| 480 | |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 481 | clocks { |
| 482 | #address-cells = <2>; |
| 483 | #size-cells = <2>; |
| 484 | ranges; |
| 485 | |
| 486 | /* External root clocks */ |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 487 | extalr_clk: extalr { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 488 | compatible = "fixed-clock"; |
| 489 | #clock-cells = <0>; |
| 490 | clock-frequency = <32768>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 491 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 492 | extal1_clk: extal1 { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 493 | compatible = "fixed-clock"; |
| 494 | #clock-cells = <0>; |
| 495 | clock-frequency = <25000000>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 496 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 497 | extal2_clk: extal2 { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 498 | compatible = "fixed-clock"; |
| 499 | #clock-cells = <0>; |
| 500 | clock-frequency = <48000000>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 501 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 502 | fsiack_clk: fsiack { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 503 | compatible = "fixed-clock"; |
| 504 | #clock-cells = <0>; |
| 505 | /* This value must be overridden by the board. */ |
| 506 | clock-frequency = <0>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 507 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 508 | fsibck_clk: fsibck { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 509 | compatible = "fixed-clock"; |
| 510 | #clock-cells = <0>; |
| 511 | /* This value must be overridden by the board. */ |
| 512 | clock-frequency = <0>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 513 | }; |
| 514 | |
| 515 | /* Special CPG clocks */ |
| 516 | cpg_clocks: cpg_clocks@e6150000 { |
| 517 | compatible = "renesas,r8a73a4-cpg-clocks"; |
| 518 | reg = <0 0xe6150000 0 0x10000>; |
| 519 | clocks = <&extal1_clk>, <&extal2_clk>; |
| 520 | #clock-cells = <1>; |
| 521 | clock-output-names = "main", "pll0", "pll1", "pll2", |
| 522 | "pll2s", "pll2h", "z", "z2", |
| 523 | "i", "m3", "b", "m1", "m2", |
| 524 | "zx", "zs", "hp"; |
| 525 | }; |
| 526 | |
| 527 | /* Variable factor clocks (DIV6) */ |
| 528 | zb_clk: zb_clk@e6150010 { |
| 529 | compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; |
| 530 | reg = <0 0xe6150010 0 4>; |
| 531 | clocks = <&pll1_div2_clk>, <0>, |
| 532 | <&cpg_clocks R8A73A4_CLK_PLL2S>, <0>; |
| 533 | #clock-cells = <0>; |
| 534 | clock-output-names = "zb"; |
| 535 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 536 | sdhi0_clk: sdhi0ck@e6150074 { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 537 | compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; |
| 538 | reg = <0 0xe6150074 0 4>; |
| 539 | clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, |
| 540 | <0>, <&extal2_clk>; |
| 541 | #clock-cells = <0>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 542 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 543 | sdhi1_clk: sdhi1ck@e6150078 { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 544 | compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; |
| 545 | reg = <0 0xe6150078 0 4>; |
| 546 | clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, |
| 547 | <0>, <&extal2_clk>; |
| 548 | #clock-cells = <0>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 549 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 550 | sdhi2_clk: sdhi2ck@e615007c { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 551 | compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; |
| 552 | reg = <0 0xe615007c 0 4>; |
| 553 | clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, |
| 554 | <0>, <&extal2_clk>; |
| 555 | #clock-cells = <0>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 556 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 557 | mmc0_clk: mmc0@e6150240 { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 558 | compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; |
| 559 | reg = <0 0xe6150240 0 4>; |
| 560 | clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, |
| 561 | <0>, <&extal2_clk>; |
| 562 | #clock-cells = <0>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 563 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 564 | mmc1_clk: mmc1@e6150244 { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 565 | compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; |
| 566 | reg = <0 0xe6150244 0 4>; |
| 567 | clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, |
| 568 | <0>, <&extal2_clk>; |
| 569 | #clock-cells = <0>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 570 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 571 | vclk1_clk: vclk1@e6150008 { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 572 | compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; |
| 573 | reg = <0 0xe6150008 0 4>; |
| 574 | clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, |
| 575 | <0>, <&extal2_clk>, <&main_div2_clk>, |
| 576 | <&extalr_clk>, <0>, <0>; |
| 577 | #clock-cells = <0>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 578 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 579 | vclk2_clk: vclk2@e615000c { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 580 | compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; |
| 581 | reg = <0 0xe615000c 0 4>; |
| 582 | clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, |
| 583 | <0>, <&extal2_clk>, <&main_div2_clk>, |
| 584 | <&extalr_clk>, <0>, <0>; |
| 585 | #clock-cells = <0>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 586 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 587 | vclk3_clk: vclk3@e615001c { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 588 | compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; |
| 589 | reg = <0 0xe615001c 0 4>; |
| 590 | clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, |
| 591 | <0>, <&extal2_clk>, <&main_div2_clk>, |
| 592 | <&extalr_clk>, <0>, <0>; |
| 593 | #clock-cells = <0>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 594 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 595 | vclk4_clk: vclk4@e6150014 { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 596 | compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; |
| 597 | reg = <0 0xe6150014 0 4>; |
| 598 | clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, |
| 599 | <0>, <&extal2_clk>, <&main_div2_clk>, |
| 600 | <&extalr_clk>, <0>, <0>; |
| 601 | #clock-cells = <0>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 602 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 603 | vclk5_clk: vclk5@e6150034 { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 604 | compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; |
| 605 | reg = <0 0xe6150034 0 4>; |
| 606 | clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, |
| 607 | <0>, <&extal2_clk>, <&main_div2_clk>, |
| 608 | <&extalr_clk>, <0>, <0>; |
| 609 | #clock-cells = <0>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 610 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 611 | fsia_clk: fsia@e6150018 { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 612 | compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; |
| 613 | reg = <0 0xe6150018 0 4>; |
| 614 | clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, |
| 615 | <&fsiack_clk>, <0>; |
| 616 | #clock-cells = <0>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 617 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 618 | fsib_clk: fsib@e6150090 { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 619 | compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; |
| 620 | reg = <0 0xe6150090 0 4>; |
| 621 | clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, |
| 622 | <&fsibck_clk>, <0>; |
| 623 | #clock-cells = <0>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 624 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 625 | mp_clk: mp@e6150080 { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 626 | compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; |
| 627 | reg = <0 0xe6150080 0 4>; |
| 628 | clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, |
| 629 | <&extal2_clk>, <&extal2_clk>; |
| 630 | #clock-cells = <0>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 631 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 632 | m4_clk: m4@e6150098 { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 633 | compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; |
| 634 | reg = <0 0xe6150098 0 4>; |
| 635 | clocks = <&cpg_clocks R8A73A4_CLK_PLL2S>; |
| 636 | #clock-cells = <0>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 637 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 638 | hsi_clk: hsi@e615026c { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 639 | compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; |
| 640 | reg = <0 0xe615026c 0 4>; |
| 641 | clocks = <&cpg_clocks R8A73A4_CLK_PLL2H>, <&pll1_div2_clk>, |
| 642 | <&cpg_clocks R8A73A4_CLK_PLL2S>, <0>; |
| 643 | #clock-cells = <0>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 644 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 645 | spuv_clk: spuv@e6150094 { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 646 | compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; |
| 647 | reg = <0 0xe6150094 0 4>; |
| 648 | clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, |
| 649 | <&extal2_clk>, <&extal2_clk>; |
| 650 | #clock-cells = <0>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 651 | }; |
| 652 | |
| 653 | /* Fixed factor clocks */ |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 654 | main_div2_clk: main_div2 { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 655 | compatible = "fixed-factor-clock"; |
| 656 | clocks = <&cpg_clocks R8A73A4_CLK_MAIN>; |
| 657 | #clock-cells = <0>; |
| 658 | clock-div = <2>; |
| 659 | clock-mult = <1>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 660 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 661 | pll0_div2_clk: pll0_div2 { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 662 | compatible = "fixed-factor-clock"; |
| 663 | clocks = <&cpg_clocks R8A73A4_CLK_PLL0>; |
| 664 | #clock-cells = <0>; |
| 665 | clock-div = <2>; |
| 666 | clock-mult = <1>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 667 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 668 | pll1_div2_clk: pll1_div2 { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 669 | compatible = "fixed-factor-clock"; |
| 670 | clocks = <&cpg_clocks R8A73A4_CLK_PLL1>; |
| 671 | #clock-cells = <0>; |
| 672 | clock-div = <2>; |
| 673 | clock-mult = <1>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 674 | }; |
Simon Horman | 57c75d1 | 2016-03-23 10:06:42 +0900 | [diff] [blame] | 675 | extal1_div2_clk: extal1_div2 { |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 676 | compatible = "fixed-factor-clock"; |
| 677 | clocks = <&extal1_clk>; |
| 678 | #clock-cells = <0>; |
| 679 | clock-div = <2>; |
| 680 | clock-mult = <1>; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 681 | }; |
| 682 | |
| 683 | /* Gate clocks */ |
| 684 | mstp2_clks: mstp2_clks@e6150138 { |
| 685 | compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks"; |
| 686 | reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>; |
| 687 | clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, |
| 688 | <&mp_clk>, <&mp_clk>, <&cpg_clocks R8A73A4_CLK_HP>; |
| 689 | #clock-cells = <1>; |
| 690 | clock-indices = < |
| 691 | R8A73A4_CLK_SCIFA0 R8A73A4_CLK_SCIFA1 |
| 692 | R8A73A4_CLK_SCIFB0 R8A73A4_CLK_SCIFB1 |
| 693 | R8A73A4_CLK_SCIFB2 R8A73A4_CLK_SCIFB3 |
| 694 | R8A73A4_CLK_DMAC |
| 695 | >; |
| 696 | clock-output-names = |
| 697 | "scifa0", "scifa1", "scifb0", "scifb1", |
| 698 | "scifb2", "scifb3", "dmac"; |
| 699 | }; |
| 700 | mstp3_clks: mstp3_clks@e615013c { |
| 701 | compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks"; |
| 702 | reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; |
| 703 | clocks = <&cpg_clocks R8A73A4_CLK_HP>, <&mmc1_clk>, |
| 704 | <&sdhi2_clk>, <&sdhi1_clk>, <&sdhi0_clk>, |
| 705 | <&mmc0_clk>, <&cpg_clocks R8A73A4_CLK_HP>, |
| 706 | <&cpg_clocks R8A73A4_CLK_HP>, <&cpg_clocks |
| 707 | R8A73A4_CLK_HP>, <&cpg_clocks |
| 708 | R8A73A4_CLK_HP>, <&extalr_clk>; |
| 709 | #clock-cells = <1>; |
| 710 | clock-indices = < |
| 711 | R8A73A4_CLK_IIC2 R8A73A4_CLK_MMCIF1 |
| 712 | R8A73A4_CLK_SDHI2 R8A73A4_CLK_SDHI1 |
| 713 | R8A73A4_CLK_SDHI0 R8A73A4_CLK_MMCIF0 |
| 714 | R8A73A4_CLK_IIC6 R8A73A4_CLK_IIC7 |
| 715 | R8A73A4_CLK_IIC0 R8A73A4_CLK_IIC1 |
| 716 | R8A73A4_CLK_CMT1 |
| 717 | >; |
| 718 | clock-output-names = |
| 719 | "iic2", "mmcif1", "sdhi2", "sdhi1", "sdhi0", |
| 720 | "mmcif0", "iic6", "iic7", "iic0", "iic1", |
| 721 | "cmt1"; |
| 722 | }; |
| 723 | mstp4_clks: mstp4_clks@e6150140 { |
| 724 | compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks"; |
| 725 | reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>; |
Geert Uytterhoeven | c11333c | 2017-03-06 17:58:06 +0100 | [diff] [blame] | 726 | clocks = <&main_div2_clk>, <&cpg_clocks R8A73A4_CLK_ZS>, |
| 727 | <&main_div2_clk>, |
Geert Uytterhoeven | 1c2a7eb | 2015-03-18 19:55:58 +0100 | [diff] [blame] | 728 | <&cpg_clocks R8A73A4_CLK_HP>, |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 729 | <&cpg_clocks R8A73A4_CLK_HP>; |
| 730 | #clock-cells = <1>; |
| 731 | clock-indices = < |
Geert Uytterhoeven | c11333c | 2017-03-06 17:58:06 +0100 | [diff] [blame] | 732 | R8A73A4_CLK_IRQC R8A73A4_CLK_INTC_SYS |
| 733 | R8A73A4_CLK_IIC5 R8A73A4_CLK_IIC4 |
| 734 | R8A73A4_CLK_IIC3 |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 735 | >; |
| 736 | clock-output-names = |
Geert Uytterhoeven | c11333c | 2017-03-06 17:58:06 +0100 | [diff] [blame] | 737 | "irqc", "intc-sys", "iic5", "iic4", "iic3"; |
Ulrich Hecht | a76809a | 2015-01-20 13:51:39 +0100 | [diff] [blame] | 738 | }; |
| 739 | mstp5_clks: mstp5_clks@e6150144 { |
| 740 | compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks"; |
| 741 | reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; |
| 742 | clocks = <&extal2_clk>, <&cpg_clocks R8A73A4_CLK_HP>; |
| 743 | #clock-cells = <1>; |
| 744 | clock-indices = < |
| 745 | R8A73A4_CLK_THERMAL R8A73A4_CLK_IIC8 |
| 746 | >; |
| 747 | clock-output-names = |
| 748 | "thermal", "iic8"; |
| 749 | }; |
| 750 | }; |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 751 | |
Geert Uytterhoeven | f027033 | 2016-11-14 19:37:09 +0100 | [diff] [blame] | 752 | prr: chipid@ff000044 { |
| 753 | compatible = "renesas,prr"; |
| 754 | reg = <0 0xff000044 0 4>; |
| 755 | }; |
| 756 | |
Geert Uytterhoeven | 7b9ad9a | 2015-02-17 16:43:02 +0100 | [diff] [blame] | 757 | sysc: system-controller@e6180000 { |
| 758 | compatible = "renesas,sysc-r8a73a4", "renesas,sysc-rmobile"; |
| 759 | reg = <0 0xe6180000 0 0x8000>, <0 0xe6188000 0 0x8000>; |
| 760 | |
| 761 | pm-domains { |
| 762 | pd_c5: c5 { |
| 763 | #address-cells = <1>; |
| 764 | #size-cells = <0>; |
| 765 | #power-domain-cells = <0>; |
| 766 | |
| 767 | pd_c4: c4@0 { |
| 768 | reg = <0>; |
| 769 | #address-cells = <1>; |
| 770 | #size-cells = <0>; |
| 771 | #power-domain-cells = <0>; |
| 772 | |
| 773 | pd_a3sg: a3sg@16 { |
| 774 | reg = <16>; |
| 775 | #power-domain-cells = <0>; |
| 776 | }; |
| 777 | |
| 778 | pd_a3ex: a3ex@17 { |
| 779 | reg = <17>; |
| 780 | #power-domain-cells = <0>; |
| 781 | }; |
| 782 | |
| 783 | pd_a3sp: a3sp@18 { |
| 784 | reg = <18>; |
| 785 | #address-cells = <1>; |
| 786 | #size-cells = <0>; |
| 787 | #power-domain-cells = <0>; |
| 788 | |
| 789 | pd_a2us: a2us@19 { |
| 790 | reg = <19>; |
| 791 | #power-domain-cells = <0>; |
| 792 | }; |
| 793 | }; |
| 794 | |
| 795 | pd_a3sm: a3sm@20 { |
| 796 | reg = <20>; |
| 797 | #address-cells = <1>; |
| 798 | #size-cells = <0>; |
| 799 | #power-domain-cells = <0>; |
| 800 | |
| 801 | pd_a2sl: a2sl@21 { |
| 802 | reg = <21>; |
| 803 | #power-domain-cells = <0>; |
| 804 | }; |
| 805 | }; |
| 806 | |
| 807 | pd_a3km: a3km@22 { |
| 808 | reg = <22>; |
| 809 | #address-cells = <1>; |
| 810 | #size-cells = <0>; |
| 811 | #power-domain-cells = <0>; |
| 812 | |
| 813 | pd_a2kl: a2kl@23 { |
| 814 | reg = <23>; |
| 815 | #power-domain-cells = <0>; |
| 816 | }; |
| 817 | }; |
| 818 | }; |
| 819 | |
| 820 | pd_c4ma: c4ma@1 { |
| 821 | reg = <1>; |
| 822 | #power-domain-cells = <0>; |
| 823 | }; |
| 824 | |
| 825 | pd_c4cl: c4cl@2 { |
| 826 | reg = <2>; |
| 827 | #power-domain-cells = <0>; |
| 828 | }; |
| 829 | |
| 830 | pd_d4: d4@3 { |
| 831 | reg = <3>; |
| 832 | #power-domain-cells = <0>; |
| 833 | }; |
| 834 | |
| 835 | pd_a4bc: a4bc@4 { |
| 836 | reg = <4>; |
| 837 | #address-cells = <1>; |
| 838 | #size-cells = <0>; |
| 839 | #power-domain-cells = <0>; |
| 840 | |
| 841 | pd_a3bc: a3bc@5 { |
| 842 | reg = <5>; |
| 843 | #power-domain-cells = <0>; |
| 844 | }; |
| 845 | }; |
| 846 | |
| 847 | pd_a4l: a4l@6 { |
| 848 | reg = <6>; |
| 849 | #power-domain-cells = <0>; |
| 850 | }; |
| 851 | |
| 852 | pd_a4lc: a4lc@7 { |
| 853 | reg = <7>; |
| 854 | #power-domain-cells = <0>; |
| 855 | }; |
| 856 | |
| 857 | pd_a4mp: a4mp@8 { |
| 858 | reg = <8>; |
| 859 | #address-cells = <1>; |
| 860 | #size-cells = <0>; |
| 861 | #power-domain-cells = <0>; |
| 862 | |
| 863 | pd_a3mp: a3mp@9 { |
| 864 | reg = <9>; |
| 865 | #power-domain-cells = <0>; |
| 866 | }; |
| 867 | |
| 868 | pd_a3vc: a3vc@10 { |
| 869 | reg = <10>; |
| 870 | #power-domain-cells = <0>; |
| 871 | }; |
| 872 | }; |
| 873 | |
| 874 | pd_a4sf: a4sf@11 { |
| 875 | reg = <11>; |
| 876 | #power-domain-cells = <0>; |
| 877 | }; |
| 878 | |
| 879 | pd_a3r: a3r@12 { |
| 880 | reg = <12>; |
| 881 | #address-cells = <1>; |
| 882 | #size-cells = <0>; |
| 883 | #power-domain-cells = <0>; |
| 884 | |
| 885 | pd_a2rv: a2rv@13 { |
| 886 | reg = <13>; |
| 887 | #power-domain-cells = <0>; |
| 888 | }; |
| 889 | |
| 890 | pd_a2is: a2is@14 { |
| 891 | reg = <14>; |
| 892 | #power-domain-cells = <0>; |
| 893 | }; |
| 894 | }; |
| 895 | }; |
| 896 | }; |
| 897 | }; |
Magnus Damm | eccf060 | 2013-03-26 10:34:24 +0900 | [diff] [blame] | 898 | }; |