blob: c330efd59a0e58be5e37a092b617b2851fc64947 [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
Paul Gortmaker2d1a8a42011-08-30 18:16:33 -040031#include <linux/export.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080032#include "drmP.h"
33#include "drm.h"
34#include "drm_crtc.h"
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +080035#include "drm_edid.h"
Chris Wilsonea5b2132010-08-04 13:50:23 +010036#include "intel_drv.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080037#include "i915_drm.h"
38#include "i915_drv.h"
39#include "intel_sdvo_regs.h"
40
Zhenyu Wang14571b42010-03-30 14:06:33 +080041#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
Chris Wilsona0b1c7a2011-09-30 22:56:41 +010044#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
Zhenyu Wang14571b42010-03-30 14:06:33 +080045
46#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
Akshay Joshi0206e352011-08-16 15:34:10 -040047 SDVO_TV_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080048
49#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
Chris Wilson139467432011-02-09 20:01:16 +000050#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080051#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010052#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Chris Wilson52220082011-06-20 14:45:50 +010053#define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080054
Jesse Barnes79e53942008-11-07 14:24:08 -080055
Chris Wilson2e88e402010-08-07 11:01:27 +010056static const char *tv_format_names[] = {
Zhao Yakuice6feab2009-08-24 13:50:26 +080057 "NTSC_M" , "NTSC_J" , "NTSC_443",
58 "PAL_B" , "PAL_D" , "PAL_G" ,
59 "PAL_H" , "PAL_I" , "PAL_M" ,
60 "PAL_N" , "PAL_NC" , "PAL_60" ,
61 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
62 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
63 "SECAM_60"
64};
65
66#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
67
Chris Wilsonea5b2132010-08-04 13:50:23 +010068struct intel_sdvo {
69 struct intel_encoder base;
70
Chris Wilsonf899fc62010-07-20 15:44:45 -070071 struct i2c_adapter *i2c;
Keith Packardf9c10a92009-05-30 12:16:25 -070072 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080073
Chris Wilsone957d772010-09-24 12:52:03 +010074 struct i2c_adapter ddc;
75
Jesse Barnese2f0ba92009-02-02 15:11:52 -080076 /* Register for the SDVO device: SDVOB or SDVOC */
Daniel Vettereef4eac2012-03-23 23:43:35 +010077 uint32_t sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080078
Jesse Barnese2f0ba92009-02-02 15:11:52 -080079 /* Active outputs controlled by this SDVO output */
80 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080081
Jesse Barnese2f0ba92009-02-02 15:11:52 -080082 /*
83 * Capabilities of the SDVO device returned by
84 * i830_sdvo_get_capabilities()
85 */
Jesse Barnes79e53942008-11-07 14:24:08 -080086 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080087
88 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080089 int pixel_clock_min, pixel_clock_max;
90
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080091 /*
92 * For multiple function SDVO device,
93 * this is for current attached outputs.
94 */
95 uint16_t attached_output;
96
Simon Farnsworthcc68c812011-09-21 17:13:30 +010097 /*
98 * Hotplug activation bits for this device
99 */
100 uint8_t hotplug_active[2];
101
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800102 /**
Chris Wilsone953fd72011-02-21 22:23:52 +0000103 * This is used to select the color range of RBG outputs in HDMI mode.
104 * It is only valid when using TMDS encoding and 8 bit per color mode.
105 */
106 uint32_t color_range;
107
108 /**
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800109 * This is set if we're going to treat the device as TV-out.
110 *
111 * While we have these nice friendly flags for output types that ought
112 * to decide this for us, the S-Video output on our HDMI+S-Video card
113 * shows up as RGB1 (VGA).
114 */
115 bool is_tv;
116
Daniel Vettereef4eac2012-03-23 23:43:35 +0100117 /* On different gens SDVOB is at different places. */
118 bool is_sdvob;
119
Zhao Yakuice6feab2009-08-24 13:50:26 +0800120 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100121 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800122
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800123 /**
124 * This is set if we treat the device as HDMI, instead of DVI.
125 */
126 bool is_hdmi;
Chris Wilsonda79de92010-11-22 11:12:46 +0000127 bool has_hdmi_monitor;
128 bool has_hdmi_audio;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800129
Ma Ling7086c872009-05-13 11:20:06 +0800130 /**
Chris Wilson6c9547f2010-08-25 10:05:17 +0100131 * This is set if we detect output of sdvo device as LVDS and
132 * have a valid fixed mode to use with the panel.
Ma Ling7086c872009-05-13 11:20:06 +0800133 */
134 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800135
136 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800137 * This is sdvo fixed pannel mode pointer
138 */
139 struct drm_display_mode *sdvo_lvds_fixed_mode;
140
Eric Anholtc751ce42010-03-25 11:48:48 -0700141 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800142 uint8_t ddc_bus;
143
Chris Wilson6c9547f2010-08-25 10:05:17 +0100144 /* Input timings for adjusted_mode */
145 struct intel_sdvo_dtd input_dtd;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800146};
147
148struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100149 struct intel_connector base;
150
Zhenyu Wang14571b42010-03-30 14:06:33 +0800151 /* Mark the type of connector */
152 uint16_t output_flag;
153
Daniel Vetterc3e5f672012-02-23 17:14:47 +0100154 enum hdmi_force_audio force_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100155
Zhenyu Wang14571b42010-03-30 14:06:33 +0800156 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100157 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800158 int format_supported_num;
Chris Wilsonc5521702010-08-04 13:50:28 +0100159 struct drm_property *tv_format;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800160
Zhao Yakuib9219c52009-09-10 15:45:46 +0800161 /* add the property for the SDVO-TV */
Chris Wilsonc5521702010-08-04 13:50:28 +0100162 struct drm_property *left;
163 struct drm_property *right;
164 struct drm_property *top;
165 struct drm_property *bottom;
166 struct drm_property *hpos;
167 struct drm_property *vpos;
168 struct drm_property *contrast;
169 struct drm_property *saturation;
170 struct drm_property *hue;
171 struct drm_property *sharpness;
172 struct drm_property *flicker_filter;
173 struct drm_property *flicker_filter_adaptive;
174 struct drm_property *flicker_filter_2d;
175 struct drm_property *tv_chroma_filter;
176 struct drm_property *tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100177 struct drm_property *dot_crawl;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800178
179 /* add the property for the SDVO-TV/LVDS */
Chris Wilsonc5521702010-08-04 13:50:28 +0100180 struct drm_property *brightness;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800181
182 /* Add variable to record current setting for the above property */
183 u32 left_margin, right_margin, top_margin, bottom_margin;
Chris Wilsonc5521702010-08-04 13:50:28 +0100184
Zhao Yakuib9219c52009-09-10 15:45:46 +0800185 /* this is to get the range of margin.*/
186 u32 max_hscan, max_vscan;
187 u32 max_hpos, cur_hpos;
188 u32 max_vpos, cur_vpos;
189 u32 cur_brightness, max_brightness;
190 u32 cur_contrast, max_contrast;
191 u32 cur_saturation, max_saturation;
192 u32 cur_hue, max_hue;
Chris Wilsonc5521702010-08-04 13:50:28 +0100193 u32 cur_sharpness, max_sharpness;
194 u32 cur_flicker_filter, max_flicker_filter;
195 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
196 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
197 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
198 u32 cur_tv_luma_filter, max_tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100199 u32 cur_dot_crawl, max_dot_crawl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800200};
201
Chris Wilson890f3352010-09-14 16:46:59 +0100202static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100203{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100204 return container_of(encoder, struct intel_sdvo, base.base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100205}
206
Chris Wilsondf0e9242010-09-09 16:20:55 +0100207static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
208{
209 return container_of(intel_attached_encoder(connector),
210 struct intel_sdvo, base);
211}
212
Chris Wilson615fb932010-08-04 13:50:24 +0100213static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
214{
215 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
216}
217
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800218static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100219intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100220static bool
221intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
222 struct intel_sdvo_connector *intel_sdvo_connector,
223 int type);
224static bool
225intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
226 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800227
Jesse Barnes79e53942008-11-07 14:24:08 -0800228/**
229 * Writes the SDVOB or SDVOC with the given value, but always writes both
230 * SDVOB and SDVOC to work around apparent hardware issues (according to
231 * comments in the BIOS).
232 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100233static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800234{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100235 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800236 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800237 u32 bval = val, cval = val;
238 int i;
239
Chris Wilsonea5b2132010-08-04 13:50:23 +0100240 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
241 I915_WRITE(intel_sdvo->sdvo_reg, val);
242 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800243 return;
244 }
245
Chris Wilsonea5b2132010-08-04 13:50:23 +0100246 if (intel_sdvo->sdvo_reg == SDVOB) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800247 cval = I915_READ(SDVOC);
248 } else {
249 bval = I915_READ(SDVOB);
250 }
251 /*
252 * Write the registers twice for luck. Sometimes,
253 * writing them only once doesn't appear to 'stick'.
254 * The BIOS does this too. Yay, magic
255 */
256 for (i = 0; i < 2; i++)
257 {
258 I915_WRITE(SDVOB, bval);
259 I915_READ(SDVOB);
260 I915_WRITE(SDVOC, cval);
261 I915_READ(SDVOC);
262 }
263}
264
Chris Wilson32aad862010-08-04 13:50:25 +0100265static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800266{
Jesse Barnes79e53942008-11-07 14:24:08 -0800267 struct i2c_msg msgs[] = {
268 {
Chris Wilsone957d772010-09-24 12:52:03 +0100269 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800270 .flags = 0,
271 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100272 .buf = &addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800273 },
274 {
Chris Wilsone957d772010-09-24 12:52:03 +0100275 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800276 .flags = I2C_M_RD,
277 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100278 .buf = ch,
Jesse Barnes79e53942008-11-07 14:24:08 -0800279 }
280 };
Chris Wilson32aad862010-08-04 13:50:25 +0100281 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800282
Chris Wilsonf899fc62010-07-20 15:44:45 -0700283 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800284 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800285
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800286 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800287 return false;
288}
289
Jesse Barnes79e53942008-11-07 14:24:08 -0800290#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
291/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100292static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800293 u8 cmd;
Chris Wilson2e88e402010-08-07 11:01:27 +0100294 const char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800295} sdvo_cmd_names[] = {
Akshay Joshi0206e352011-08-16 15:34:10 -0400296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Chris Wilsonc5521702010-08-04 13:50:28 +0100339
Akshay Joshi0206e352011-08-16 15:34:10 -0400340 /* Add the op code for SDVO enhancements */
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
Chris Wilsonc5521702010-08-04 13:50:28 +0100385
Akshay Joshi0206e352011-08-16 15:34:10 -0400386 /* HDMI op code */
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800407};
408
Daniel Vettereef4eac2012-03-23 23:43:35 +0100409#define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800410
Chris Wilsonea5b2132010-08-04 13:50:23 +0100411static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100412 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800413{
Jesse Barnes79e53942008-11-07 14:24:08 -0800414 int i;
415
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800416 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100417 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800418 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800419 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800420 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800421 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400422 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800423 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800424 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800425 break;
426 }
427 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400428 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800429 DRM_LOG_KMS("(%02X)", cmd);
430 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800431}
Jesse Barnes79e53942008-11-07 14:24:08 -0800432
Jesse Barnes79e53942008-11-07 14:24:08 -0800433static const char *cmd_status_names[] = {
434 "Power on",
435 "Success",
436 "Not supported",
437 "Invalid arg",
438 "Pending",
439 "Target not specified",
440 "Scaling not supported"
441};
442
Chris Wilsone957d772010-09-24 12:52:03 +0100443static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
444 const void *args, int args_len)
445{
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700446 u8 *buf, status;
447 struct i2c_msg *msgs;
448 int i, ret = true;
449
450 buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
451 if (!buf)
452 return false;
453
454 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
455 if (!msgs)
456 return false;
Chris Wilsone957d772010-09-24 12:52:03 +0100457
458 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
459
460 for (i = 0; i < args_len; i++) {
461 msgs[i].addr = intel_sdvo->slave_addr;
462 msgs[i].flags = 0;
463 msgs[i].len = 2;
464 msgs[i].buf = buf + 2 *i;
465 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
466 buf[2*i + 1] = ((u8*)args)[i];
467 }
468 msgs[i].addr = intel_sdvo->slave_addr;
469 msgs[i].flags = 0;
470 msgs[i].len = 2;
471 msgs[i].buf = buf + 2*i;
472 buf[2*i + 0] = SDVO_I2C_OPCODE;
473 buf[2*i + 1] = cmd;
474
475 /* the following two are to read the response */
476 status = SDVO_I2C_CMD_STATUS;
477 msgs[i+1].addr = intel_sdvo->slave_addr;
478 msgs[i+1].flags = 0;
479 msgs[i+1].len = 1;
480 msgs[i+1].buf = &status;
481
482 msgs[i+2].addr = intel_sdvo->slave_addr;
483 msgs[i+2].flags = I2C_M_RD;
484 msgs[i+2].len = 1;
485 msgs[i+2].buf = &status;
486
487 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
488 if (ret < 0) {
489 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700490 ret = false;
491 goto out;
Chris Wilsone957d772010-09-24 12:52:03 +0100492 }
493 if (ret != i+3) {
494 /* failure in I2C transfer */
495 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700496 ret = false;
Chris Wilsone957d772010-09-24 12:52:03 +0100497 }
498
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700499out:
500 kfree(msgs);
501 kfree(buf);
502 return ret;
Chris Wilsone957d772010-09-24 12:52:03 +0100503}
504
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100505static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
506 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800507{
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100508 u8 retry = 5;
509 u8 status;
Zhenyu Wang33b52962009-03-24 14:02:40 +0800510 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800511
Chris Wilsond121a5d2011-01-25 15:00:01 +0000512 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
513
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100514 /*
515 * The documentation states that all commands will be
516 * processed within 15µs, and that we need only poll
517 * the status byte a maximum of 3 times in order for the
518 * command to be complete.
519 *
520 * Check 5 times in case the hardware failed to read the docs.
521 */
Chris Wilsond121a5d2011-01-25 15:00:01 +0000522 if (!intel_sdvo_read_byte(intel_sdvo,
523 SDVO_I2C_CMD_STATUS,
524 &status))
525 goto log_fail;
526
527 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
528 udelay(15);
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100529 if (!intel_sdvo_read_byte(intel_sdvo,
530 SDVO_I2C_CMD_STATUS,
531 &status))
Chris Wilsond121a5d2011-01-25 15:00:01 +0000532 goto log_fail;
533 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100534
Jesse Barnes79e53942008-11-07 14:24:08 -0800535 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800536 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800537 else
yakui_zhao342dc382009-06-02 14:12:00 +0800538 DRM_LOG_KMS("(??? %d)", status);
Jesse Barnes79e53942008-11-07 14:24:08 -0800539
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100540 if (status != SDVO_CMD_STATUS_SUCCESS)
541 goto log_fail;
Jesse Barnes79e53942008-11-07 14:24:08 -0800542
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100543 /* Read the command response */
544 for (i = 0; i < response_len; i++) {
545 if (!intel_sdvo_read_byte(intel_sdvo,
546 SDVO_I2C_RETURN_0 + i,
547 &((u8 *)response)[i]))
548 goto log_fail;
Chris Wilsone957d772010-09-24 12:52:03 +0100549 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800550 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100551 DRM_LOG_KMS("\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100552 return true;
553
554log_fail:
Chris Wilsond121a5d2011-01-25 15:00:01 +0000555 DRM_LOG_KMS("... failed\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100556 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800557}
558
Hannes Ederb358d0a2008-12-18 21:18:47 +0100559static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800560{
561 if (mode->clock >= 100000)
562 return 1;
563 else if (mode->clock >= 50000)
564 return 2;
565 else
566 return 4;
567}
568
Chris Wilsone957d772010-09-24 12:52:03 +0100569static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
570 u8 ddc_bus)
Jesse Barnes79e53942008-11-07 14:24:08 -0800571{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000572 /* This must be the immediately preceding write before the i2c xfer */
Chris Wilsone957d772010-09-24 12:52:03 +0100573 return intel_sdvo_write_cmd(intel_sdvo,
574 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
575 &ddc_bus, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800576}
577
Chris Wilson32aad862010-08-04 13:50:25 +0100578static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
579{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000580 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
581 return false;
582
583 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100584}
585
586static bool
587intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
588{
589 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
590 return false;
591
592 return intel_sdvo_read_response(intel_sdvo, value, len);
593}
594
595static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800596{
597 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100598 return intel_sdvo_set_value(intel_sdvo,
599 SDVO_CMD_SET_TARGET_INPUT,
600 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800601}
602
603/**
604 * Return whether each input is trained.
605 *
606 * This function is making an assumption about the layout of the response,
607 * which should be checked against the docs.
608 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100609static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800610{
611 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800612
Chris Wilson1a3665c2011-01-25 13:59:37 +0000613 BUILD_BUG_ON(sizeof(response) != 1);
Chris Wilson32aad862010-08-04 13:50:25 +0100614 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
615 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800616 return false;
617
618 *input_1 = response.input0_trained;
619 *input_2 = response.input1_trained;
620 return true;
621}
622
Chris Wilsonea5b2132010-08-04 13:50:23 +0100623static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800624 u16 outputs)
625{
Chris Wilson32aad862010-08-04 13:50:25 +0100626 return intel_sdvo_set_value(intel_sdvo,
627 SDVO_CMD_SET_ACTIVE_OUTPUTS,
628 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800629}
630
Chris Wilsonea5b2132010-08-04 13:50:23 +0100631static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800632 int mode)
633{
Chris Wilson32aad862010-08-04 13:50:25 +0100634 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800635
636 switch (mode) {
637 case DRM_MODE_DPMS_ON:
638 state = SDVO_ENCODER_STATE_ON;
639 break;
640 case DRM_MODE_DPMS_STANDBY:
641 state = SDVO_ENCODER_STATE_STANDBY;
642 break;
643 case DRM_MODE_DPMS_SUSPEND:
644 state = SDVO_ENCODER_STATE_SUSPEND;
645 break;
646 case DRM_MODE_DPMS_OFF:
647 state = SDVO_ENCODER_STATE_OFF;
648 break;
649 }
650
Chris Wilson32aad862010-08-04 13:50:25 +0100651 return intel_sdvo_set_value(intel_sdvo,
652 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800653}
654
Chris Wilsonea5b2132010-08-04 13:50:23 +0100655static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800656 int *clock_min,
657 int *clock_max)
658{
659 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800660
Chris Wilson1a3665c2011-01-25 13:59:37 +0000661 BUILD_BUG_ON(sizeof(clocks) != 4);
Chris Wilson32aad862010-08-04 13:50:25 +0100662 if (!intel_sdvo_get_value(intel_sdvo,
663 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
664 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800665 return false;
666
667 /* Convert the values from units of 10 kHz to kHz. */
668 *clock_min = clocks.min * 10;
669 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800670 return true;
671}
672
Chris Wilsonea5b2132010-08-04 13:50:23 +0100673static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800674 u16 outputs)
675{
Chris Wilson32aad862010-08-04 13:50:25 +0100676 return intel_sdvo_set_value(intel_sdvo,
677 SDVO_CMD_SET_TARGET_OUTPUT,
678 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800679}
680
Chris Wilsonea5b2132010-08-04 13:50:23 +0100681static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800682 struct intel_sdvo_dtd *dtd)
683{
Chris Wilson32aad862010-08-04 13:50:25 +0100684 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
685 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800686}
687
Chris Wilsonea5b2132010-08-04 13:50:23 +0100688static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800689 struct intel_sdvo_dtd *dtd)
690{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100691 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800692 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
693}
694
Chris Wilsonea5b2132010-08-04 13:50:23 +0100695static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800696 struct intel_sdvo_dtd *dtd)
697{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100698 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800699 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
700}
701
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800702static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100703intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800704 uint16_t clock,
705 uint16_t width,
706 uint16_t height)
707{
708 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800709
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800710 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800711 args.clock = clock;
712 args.width = width;
713 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800714 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800715
Chris Wilsonea5b2132010-08-04 13:50:23 +0100716 if (intel_sdvo->is_lvds &&
717 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
718 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800719 args.scaled = 1;
720
Chris Wilson32aad862010-08-04 13:50:25 +0100721 return intel_sdvo_set_value(intel_sdvo,
722 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
723 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800724}
725
Chris Wilsonea5b2132010-08-04 13:50:23 +0100726static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800727 struct intel_sdvo_dtd *dtd)
728{
Chris Wilson1a3665c2011-01-25 13:59:37 +0000729 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
730 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
Chris Wilson32aad862010-08-04 13:50:25 +0100731 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
732 &dtd->part1, sizeof(dtd->part1)) &&
733 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
734 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800735}
Jesse Barnes79e53942008-11-07 14:24:08 -0800736
Chris Wilsonea5b2132010-08-04 13:50:23 +0100737static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800738{
Chris Wilson32aad862010-08-04 13:50:25 +0100739 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800740}
741
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800742static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100743 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800744{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800745 uint16_t width, height;
746 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
747 uint16_t h_sync_offset, v_sync_offset;
Jesse Barnes79e53942008-11-07 14:24:08 -0800748
749 width = mode->crtc_hdisplay;
750 height = mode->crtc_vdisplay;
751
752 /* do some mode translations */
753 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
754 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
755
756 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
757 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
758
759 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
760 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
761
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800762 dtd->part1.clock = mode->clock / 10;
763 dtd->part1.h_active = width & 0xff;
764 dtd->part1.h_blank = h_blank_len & 0xff;
765 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800766 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800767 dtd->part1.v_active = height & 0xff;
768 dtd->part1.v_blank = v_blank_len & 0xff;
769 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800770 ((v_blank_len >> 8) & 0xf);
771
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800772 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800773 dtd->part2.h_sync_width = h_sync_len & 0xff;
774 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800775 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800776 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800777 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
778 ((v_sync_len & 0x30) >> 4);
779
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800780 dtd->part2.dtd_flags = 0x18;
Jesse Barnes79e53942008-11-07 14:24:08 -0800781 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800782 dtd->part2.dtd_flags |= 0x2;
Jesse Barnes79e53942008-11-07 14:24:08 -0800783 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800784 dtd->part2.dtd_flags |= 0x4;
Jesse Barnes79e53942008-11-07 14:24:08 -0800785
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800786 dtd->part2.sdvo_flags = 0;
787 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
788 dtd->part2.reserved = 0;
789}
Jesse Barnes79e53942008-11-07 14:24:08 -0800790
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800791static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100792 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800793{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800794 mode->hdisplay = dtd->part1.h_active;
795 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
796 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800797 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800798 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
799 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
800 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
801 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
802
803 mode->vdisplay = dtd->part1.v_active;
804 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
805 mode->vsync_start = mode->vdisplay;
806 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800807 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800808 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
809 mode->vsync_end = mode->vsync_start +
810 (dtd->part2.v_sync_off_width & 0xf);
811 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
812 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
813 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
814
815 mode->clock = dtd->part1.clock * 10;
816
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800817 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800818 if (dtd->part2.dtd_flags & 0x2)
819 mode->flags |= DRM_MODE_FLAG_PHSYNC;
820 if (dtd->part2.dtd_flags & 0x4)
821 mode->flags |= DRM_MODE_FLAG_PVSYNC;
822}
823
Chris Wilsone27d8532010-10-22 09:15:22 +0100824static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800825{
Chris Wilsone27d8532010-10-22 09:15:22 +0100826 struct intel_sdvo_encode encode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800827
Chris Wilson1a3665c2011-01-25 13:59:37 +0000828 BUILD_BUG_ON(sizeof(encode) != 2);
Chris Wilsone27d8532010-10-22 09:15:22 +0100829 return intel_sdvo_get_value(intel_sdvo,
830 SDVO_CMD_GET_SUPP_ENCODE,
831 &encode, sizeof(encode));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800832}
833
Chris Wilsonea5b2132010-08-04 13:50:23 +0100834static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700835 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800836{
Chris Wilson32aad862010-08-04 13:50:25 +0100837 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800838}
839
Chris Wilsonea5b2132010-08-04 13:50:23 +0100840static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800841 uint8_t mode)
842{
Chris Wilson32aad862010-08-04 13:50:25 +0100843 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800844}
845
846#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100847static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800848{
849 int i, j;
850 uint8_t set_buf_index[2];
851 uint8_t av_split;
852 uint8_t buf_size;
853 uint8_t buf[48];
854 uint8_t *pos;
855
Chris Wilson32aad862010-08-04 13:50:25 +0100856 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800857
858 for (i = 0; i <= av_split; i++) {
859 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700860 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800861 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700862 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
863 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800864
865 pos = buf;
866 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700867 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800868 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700869 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800870 pos += 8;
871 }
872 }
873}
874#endif
875
David Härdeman3c17fe42010-09-24 21:44:32 +0200876static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800877{
878 struct dip_infoframe avi_if = {
879 .type = DIP_TYPE_AVI,
David Härdeman3c17fe42010-09-24 21:44:32 +0200880 .ver = DIP_VERSION_AVI,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800881 .len = DIP_LEN_AVI,
882 };
David Härdeman3c17fe42010-09-24 21:44:32 +0200883 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
884 uint8_t set_buf_index[2] = { 1, 0 };
885 uint64_t *data = (uint64_t *)&avi_if;
886 unsigned i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800887
David Härdeman3c17fe42010-09-24 21:44:32 +0200888 intel_dip_infoframe_csum(&avi_if);
889
Chris Wilsond121a5d2011-01-25 15:00:01 +0000890 if (!intel_sdvo_set_value(intel_sdvo,
891 SDVO_CMD_SET_HBUF_INDEX,
David Härdeman3c17fe42010-09-24 21:44:32 +0200892 set_buf_index, 2))
893 return false;
894
895 for (i = 0; i < sizeof(avi_if); i += 8) {
Chris Wilsond121a5d2011-01-25 15:00:01 +0000896 if (!intel_sdvo_set_value(intel_sdvo,
897 SDVO_CMD_SET_HBUF_DATA,
David Härdeman3c17fe42010-09-24 21:44:32 +0200898 data, 8))
899 return false;
900 data++;
901 }
902
Chris Wilsond121a5d2011-01-25 15:00:01 +0000903 return intel_sdvo_set_value(intel_sdvo,
904 SDVO_CMD_SET_HBUF_TXRATE,
David Härdeman3c17fe42010-09-24 21:44:32 +0200905 &tx_rate, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800906}
907
Chris Wilson32aad862010-08-04 13:50:25 +0100908static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800909{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800910 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +0100911 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800912
Chris Wilson40039752010-08-04 13:50:26 +0100913 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800914 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100915 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800916
Chris Wilson32aad862010-08-04 13:50:25 +0100917 BUILD_BUG_ON(sizeof(format) != 6);
918 return intel_sdvo_set_value(intel_sdvo,
919 SDVO_CMD_SET_TV_FORMAT,
920 &format, sizeof(format));
921}
Zhao Yakuice6feab2009-08-24 13:50:26 +0800922
Chris Wilson32aad862010-08-04 13:50:25 +0100923static bool
924intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
925 struct drm_display_mode *mode)
926{
927 struct intel_sdvo_dtd output_dtd;
928
929 if (!intel_sdvo_set_target_output(intel_sdvo,
930 intel_sdvo->attached_output))
931 return false;
932
933 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
934 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
935 return false;
936
937 return true;
938}
939
940static bool
941intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
942 struct drm_display_mode *mode,
943 struct drm_display_mode *adjusted_mode)
944{
Chris Wilson32aad862010-08-04 13:50:25 +0100945 /* Reset the input timing to the screen. Assume always input 0. */
946 if (!intel_sdvo_set_target_input(intel_sdvo))
947 return false;
948
949 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
950 mode->clock / 10,
951 mode->hdisplay,
952 mode->vdisplay))
953 return false;
954
955 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100956 &intel_sdvo->input_dtd))
Chris Wilson32aad862010-08-04 13:50:25 +0100957 return false;
958
Chris Wilson6c9547f2010-08-25 10:05:17 +0100959 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
Chris Wilson32aad862010-08-04 13:50:25 +0100960
Chris Wilson32aad862010-08-04 13:50:25 +0100961 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800962}
963
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800964static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
965 struct drm_display_mode *mode,
966 struct drm_display_mode *adjusted_mode)
967{
Chris Wilson890f3352010-09-14 16:46:59 +0100968 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100969 int multiplier;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800970
Chris Wilson32aad862010-08-04 13:50:25 +0100971 /* We need to construct preferred input timings based on our
972 * output timings. To do that, we have to set the output
973 * timings, even though this isn't really the right place in
974 * the sequence to do it. Oh well.
975 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100976 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +0100977 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800978 return false;
Chris Wilson32aad862010-08-04 13:50:25 +0100979
Pavel Roskinc74696b2010-09-02 14:46:34 -0400980 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
981 mode,
982 adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100983 } else if (intel_sdvo->is_lvds) {
Chris Wilson32aad862010-08-04 13:50:25 +0100984 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100985 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800986 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800987
Pavel Roskinc74696b2010-09-02 14:46:34 -0400988 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
989 mode,
990 adjusted_mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800991 }
Chris Wilson32aad862010-08-04 13:50:25 +0100992
993 /* Make the CRTC code factor in the SDVO pixel multiplier. The
Chris Wilson6c9547f2010-08-25 10:05:17 +0100994 * SDVO device will factor out the multiplier during mode_set.
Chris Wilson32aad862010-08-04 13:50:25 +0100995 */
Chris Wilson6c9547f2010-08-25 10:05:17 +0100996 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
997 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
Chris Wilson32aad862010-08-04 13:50:25 +0100998
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800999 return true;
1000}
1001
1002static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1003 struct drm_display_mode *mode,
1004 struct drm_display_mode *adjusted_mode)
1005{
1006 struct drm_device *dev = encoder->dev;
1007 struct drm_i915_private *dev_priv = dev->dev_private;
1008 struct drm_crtc *crtc = encoder->crtc;
1009 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Chris Wilson890f3352010-09-14 16:46:59 +01001010 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001011 u32 sdvox;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001012 struct intel_sdvo_in_out_map in_out;
1013 struct intel_sdvo_dtd input_dtd;
Chris Wilson6c9547f2010-08-25 10:05:17 +01001014 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1015 int rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001016
1017 if (!mode)
1018 return;
1019
1020 /* First, set the input mapping for the first input to our controlled
1021 * output. This is only correct if we're a single-input device, in
1022 * which case the first input is the output from the appropriate SDVO
1023 * channel on the motherboard. In a two-input device, the first input
1024 * will be SDVOB and the second SDVOC.
1025 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001026 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001027 in_out.in1 = 0;
1028
Pavel Roskinc74696b2010-09-02 14:46:34 -04001029 intel_sdvo_set_value(intel_sdvo,
1030 SDVO_CMD_SET_IN_OUT_MAP,
1031 &in_out, sizeof(in_out));
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001032
Chris Wilson6c9547f2010-08-25 10:05:17 +01001033 /* Set the output timings to the screen */
1034 if (!intel_sdvo_set_target_output(intel_sdvo,
1035 intel_sdvo->attached_output))
1036 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001037
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001038 /* We have tried to get input timing in mode_fixup, and filled into
Chris Wilson6c9547f2010-08-25 10:05:17 +01001039 * adjusted_mode.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001040 */
Chris Wilson6c9547f2010-08-25 10:05:17 +01001041 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1042 input_dtd = intel_sdvo->input_dtd;
1043 } else {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001044 /* Set the output timing to the screen */
Chris Wilson32aad862010-08-04 13:50:25 +01001045 if (!intel_sdvo_set_target_output(intel_sdvo,
1046 intel_sdvo->attached_output))
1047 return;
1048
Chris Wilson6c9547f2010-08-25 10:05:17 +01001049 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Pavel Roskinc74696b2010-09-02 14:46:34 -04001050 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001051 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001052
1053 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001054 if (!intel_sdvo_set_target_input(intel_sdvo))
1055 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001056
Chris Wilson97aaf912011-01-04 20:10:52 +00001057 if (intel_sdvo->has_hdmi_monitor) {
1058 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1059 intel_sdvo_set_colorimetry(intel_sdvo,
1060 SDVO_COLORIMETRY_RGB256);
1061 intel_sdvo_set_avi_infoframe(intel_sdvo);
1062 } else
1063 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001064
Chris Wilson6c9547f2010-08-25 10:05:17 +01001065 if (intel_sdvo->is_tv &&
1066 !intel_sdvo_set_tv_format(intel_sdvo))
1067 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001068
Pavel Roskinc74696b2010-09-02 14:46:34 -04001069 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
Jesse Barnes79e53942008-11-07 14:24:08 -08001070
Chris Wilson6c9547f2010-08-25 10:05:17 +01001071 switch (pixel_multiplier) {
1072 default:
Chris Wilson32aad862010-08-04 13:50:25 +01001073 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1074 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1075 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001076 }
Chris Wilson32aad862010-08-04 13:50:25 +01001077 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1078 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001079
1080 /* Set the SDVO control regs. */
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001081 if (INTEL_INFO(dev)->gen >= 4) {
Paulo Zanoniba68e082012-01-06 19:45:34 -02001082 /* The real mode polarity is set by the SDVO commands, using
1083 * struct intel_sdvo_dtd. */
1084 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
Chris Wilsone953fd72011-02-21 22:23:52 +00001085 if (intel_sdvo->is_hdmi)
1086 sdvox |= intel_sdvo->color_range;
Chris Wilson6714afb2010-12-17 04:10:51 +00001087 if (INTEL_INFO(dev)->gen < 5)
1088 sdvox |= SDVO_BORDER_ENABLE;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001089 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001090 sdvox = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001091 switch (intel_sdvo->sdvo_reg) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001092 case SDVOB:
1093 sdvox &= SDVOB_PRESERVE_MASK;
1094 break;
1095 case SDVOC:
1096 sdvox &= SDVOC_PRESERVE_MASK;
1097 break;
1098 }
1099 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1100 }
Paulo Zanoni3573c412011-10-14 18:16:22 -03001101
1102 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1103 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1104 else
1105 sdvox |= TRANSCODER(intel_crtc->pipe);
1106
Chris Wilsonda79de92010-11-22 11:12:46 +00001107 if (intel_sdvo->has_hdmi_audio)
Chris Wilson6c9547f2010-08-25 10:05:17 +01001108 sdvox |= SDVO_AUDIO_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -08001109
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001110 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001111 /* done in crtc_mode_set as the dpll_md reg must be written early */
1112 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1113 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001114 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001115 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
Jesse Barnes79e53942008-11-07 14:24:08 -08001116 }
1117
Chris Wilson6714afb2010-12-17 04:10:51 +00001118 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1119 INTEL_INFO(dev)->gen < 5)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001120 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001121 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001122}
1123
1124static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1125{
1126 struct drm_device *dev = encoder->dev;
1127 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson890f3352010-09-14 16:46:59 +01001128 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001129 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001130 u32 temp;
1131
1132 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001133 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001134 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001135 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001136
1137 if (mode == DRM_MODE_DPMS_OFF) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001138 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001139 if ((temp & SDVO_ENABLE) != 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001140 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001141 }
1142 }
1143 } else {
1144 bool input1, input2;
1145 int i;
1146 u8 status;
1147
Chris Wilsonea5b2132010-08-04 13:50:23 +01001148 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001149 if ((temp & SDVO_ENABLE) == 0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001150 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001151 for (i = 0; i < 2; i++)
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001152 intel_wait_for_vblank(dev, intel_crtc->pipe);
Jesse Barnes79e53942008-11-07 14:24:08 -08001153
Chris Wilson32aad862010-08-04 13:50:25 +01001154 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001155 /* Warn if the device reported failure to sync.
1156 * A lot of SDVO devices fail to notify of sync, but it's
1157 * a given it the status is a success, we succeeded.
1158 */
1159 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001160 DRM_DEBUG_KMS("First %s output reported failure to "
Chris Wilsonea5b2132010-08-04 13:50:23 +01001161 "sync\n", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001162 }
1163
1164 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001165 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1166 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001167 }
1168 return;
1169}
1170
Jesse Barnes79e53942008-11-07 14:24:08 -08001171static int intel_sdvo_mode_valid(struct drm_connector *connector,
1172 struct drm_display_mode *mode)
1173{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001174 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001175
1176 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1177 return MODE_NO_DBLESCAN;
1178
Chris Wilsonea5b2132010-08-04 13:50:23 +01001179 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001180 return MODE_CLOCK_LOW;
1181
Chris Wilsonea5b2132010-08-04 13:50:23 +01001182 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001183 return MODE_CLOCK_HIGH;
1184
Chris Wilson85454232010-08-08 14:28:23 +01001185 if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001186 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001187 return MODE_PANEL;
1188
Chris Wilsonea5b2132010-08-04 13:50:23 +01001189 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001190 return MODE_PANEL;
1191 }
1192
Jesse Barnes79e53942008-11-07 14:24:08 -08001193 return MODE_OK;
1194}
1195
Chris Wilsonea5b2132010-08-04 13:50:23 +01001196static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001197{
Chris Wilson1a3665c2011-01-25 13:59:37 +00001198 BUILD_BUG_ON(sizeof(*caps) != 8);
Chris Wilsone957d772010-09-24 12:52:03 +01001199 if (!intel_sdvo_get_value(intel_sdvo,
1200 SDVO_CMD_GET_DEVICE_CAPS,
1201 caps, sizeof(*caps)))
1202 return false;
1203
1204 DRM_DEBUG_KMS("SDVO capabilities:\n"
1205 " vendor_id: %d\n"
1206 " device_id: %d\n"
1207 " device_rev_id: %d\n"
1208 " sdvo_version_major: %d\n"
1209 " sdvo_version_minor: %d\n"
1210 " sdvo_inputs_mask: %d\n"
1211 " smooth_scaling: %d\n"
1212 " sharp_scaling: %d\n"
1213 " up_scaling: %d\n"
1214 " down_scaling: %d\n"
1215 " stall_support: %d\n"
1216 " output_flags: %d\n",
1217 caps->vendor_id,
1218 caps->device_id,
1219 caps->device_rev_id,
1220 caps->sdvo_version_major,
1221 caps->sdvo_version_minor,
1222 caps->sdvo_inputs_mask,
1223 caps->smooth_scaling,
1224 caps->sharp_scaling,
1225 caps->up_scaling,
1226 caps->down_scaling,
1227 caps->stall_support,
1228 caps->output_flags);
1229
1230 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001231}
1232
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001233static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -08001234{
1235 u8 response[2];
Jesse Barnes79e53942008-11-07 14:24:08 -08001236
Chris Wilson32aad862010-08-04 13:50:25 +01001237 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1238 &response, 2) && response[0];
Jesse Barnes79e53942008-11-07 14:24:08 -08001239}
1240
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001241static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001242{
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001243 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
Jesse Barnes79e53942008-11-07 14:24:08 -08001244
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001245 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001246}
1247
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001248static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001249intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001250{
Chris Wilsonbc652122011-01-25 13:28:29 +00001251 /* Is there more than one type of output? */
Adam Jackson22944882011-06-16 16:36:24 -04001252 return hweight16(intel_sdvo->caps.output_flags) > 1;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001253}
1254
Chris Wilsonf899fc62010-07-20 15:44:45 -07001255static struct edid *
Chris Wilsone957d772010-09-24 12:52:03 +01001256intel_sdvo_get_edid(struct drm_connector *connector)
Chris Wilsonf899fc62010-07-20 15:44:45 -07001257{
Chris Wilsone957d772010-09-24 12:52:03 +01001258 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1259 return drm_get_edid(connector, &sdvo->ddc);
Chris Wilsonf899fc62010-07-20 15:44:45 -07001260}
1261
Chris Wilsonff482d82010-09-15 10:40:38 +01001262/* Mac mini hack -- use the same DDC as the analog connector */
1263static struct edid *
1264intel_sdvo_get_analog_edid(struct drm_connector *connector)
1265{
Chris Wilsonf899fc62010-07-20 15:44:45 -07001266 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Chris Wilsonff482d82010-09-15 10:40:38 +01001267
Chris Wilson0c1dab82010-11-23 22:37:01 +00001268 return drm_get_edid(connector,
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001269 intel_gmbus_get_adapter(dev_priv,
1270 dev_priv->crt_ddc_pin));
Chris Wilsonff482d82010-09-15 10:40:38 +01001271}
1272
Ben Widawskyc43b5632012-04-16 14:07:40 -07001273static enum drm_connector_status
Adam Jackson8bf38482011-06-16 16:36:25 -04001274intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001275{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001276 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001277 enum drm_connector_status status;
1278 struct edid *edid;
Ma Ling9dff6af2009-04-02 13:13:26 +08001279
Chris Wilsone957d772010-09-24 12:52:03 +01001280 edid = intel_sdvo_get_edid(connector);
Keith Packard57cdaf92009-09-04 13:07:54 +08001281
Chris Wilsonea5b2132010-08-04 13:50:23 +01001282 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Chris Wilsone957d772010-09-24 12:52:03 +01001283 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001284
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001285 /*
1286 * Don't use the 1 as the argument of DDC bus switch to get
1287 * the EDID. It is used for SDVO SPD ROM.
1288 */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001289 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
Chris Wilsone957d772010-09-24 12:52:03 +01001290 intel_sdvo->ddc_bus = ddc;
1291 edid = intel_sdvo_get_edid(connector);
1292 if (edid)
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001293 break;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001294 }
Chris Wilsone957d772010-09-24 12:52:03 +01001295 /*
1296 * If we found the EDID on the other bus,
1297 * assume that is the correct DDC bus.
1298 */
1299 if (edid == NULL)
1300 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001301 }
Chris Wilson9d1a9032010-09-14 17:58:19 +01001302
1303 /*
1304 * When there is no edid and no monitor is connected with VGA
1305 * port, try to use the CRT ddc to read the EDID for DVI-connector.
Keith Packard57cdaf92009-09-04 13:07:54 +08001306 */
Chris Wilsonff482d82010-09-15 10:40:38 +01001307 if (edid == NULL)
1308 edid = intel_sdvo_get_analog_edid(connector);
Adam Jackson149c36a2010-04-29 14:05:18 -04001309
Chris Wilson2f551c82010-09-15 10:42:50 +01001310 status = connector_status_unknown;
Ma Ling9dff6af2009-04-02 13:13:26 +08001311 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001312 /* DDC bus is shared, match EDID to connector type */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001313 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1314 status = connector_status_connected;
Chris Wilsonda79de92010-11-22 11:12:46 +00001315 if (intel_sdvo->is_hdmi) {
1316 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1317 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1318 }
Chris Wilson139467432011-02-09 20:01:16 +00001319 } else
1320 status = connector_status_disconnected;
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001321 connector->display_info.raw_edid = NULL;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001322 kfree(edid);
1323 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001324
1325 if (status == connector_status_connected) {
1326 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001327 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1328 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001329 }
1330
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001331 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001332}
1333
Chris Wilson52220082011-06-20 14:45:50 +01001334static bool
1335intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1336 struct edid *edid)
1337{
1338 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1339 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1340
1341 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1342 connector_is_digital, monitor_is_digital);
1343 return connector_is_digital == monitor_is_digital;
1344}
1345
Chris Wilson7b334fc2010-09-09 23:51:02 +01001346static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +01001347intel_sdvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -08001348{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001349 uint16_t response;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001350 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001351 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001352 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001353
Chris Wilson32aad862010-08-04 13:50:25 +01001354 if (!intel_sdvo_write_cmd(intel_sdvo,
Chris Wilsone957d772010-09-24 12:52:03 +01001355 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
Chris Wilson32aad862010-08-04 13:50:25 +01001356 return connector_status_unknown;
Chris Wilsonba84cd12010-11-24 17:37:17 +00001357
1358 /* add 30ms delay when the output type might be TV */
Chris Wilsona0b1c7a2011-09-30 22:56:41 +01001359 if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
Zhao Yakuid09c23d2009-11-06 15:39:56 +08001360 mdelay(30);
Chris Wilsonba84cd12010-11-24 17:37:17 +00001361
Chris Wilson32aad862010-08-04 13:50:25 +01001362 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1363 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001364
Chris Wilsone957d772010-09-24 12:52:03 +01001365 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1366 response & 0xff, response >> 8,
1367 intel_sdvo_connector->output_flag);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001368
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001369 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001370 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001371
Chris Wilsonea5b2132010-08-04 13:50:23 +01001372 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001373
Chris Wilson97aaf912011-01-04 20:10:52 +00001374 intel_sdvo->has_hdmi_monitor = false;
1375 intel_sdvo->has_hdmi_audio = false;
1376
Chris Wilson615fb932010-08-04 13:50:24 +01001377 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001378 ret = connector_status_disconnected;
Chris Wilson139467432011-02-09 20:01:16 +00001379 else if (IS_TMDS(intel_sdvo_connector))
Adam Jackson8bf38482011-06-16 16:36:25 -04001380 ret = intel_sdvo_tmds_sink_detect(connector);
Chris Wilson139467432011-02-09 20:01:16 +00001381 else {
1382 struct edid *edid;
1383
1384 /* if we have an edid check it matches the connection */
1385 edid = intel_sdvo_get_edid(connector);
1386 if (edid == NULL)
1387 edid = intel_sdvo_get_analog_edid(connector);
1388 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001389 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1390 edid))
Chris Wilson139467432011-02-09 20:01:16 +00001391 ret = connector_status_connected;
Chris Wilson52220082011-06-20 14:45:50 +01001392 else
1393 ret = connector_status_disconnected;
1394
Chris Wilson139467432011-02-09 20:01:16 +00001395 connector->display_info.raw_edid = NULL;
1396 kfree(edid);
1397 } else
1398 ret = connector_status_connected;
1399 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001400
1401 /* May update encoder flag for like clock for SDVO TV, etc.*/
1402 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001403 intel_sdvo->is_tv = false;
1404 intel_sdvo->is_lvds = false;
1405 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001406
1407 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001408 intel_sdvo->is_tv = true;
1409 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001410 }
1411 if (response & SDVO_LVDS_MASK)
Chris Wilson85454232010-08-08 14:28:23 +01001412 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001413 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001414
1415 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001416}
1417
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001418static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001419{
Chris Wilsonff482d82010-09-15 10:40:38 +01001420 struct edid *edid;
Jesse Barnes79e53942008-11-07 14:24:08 -08001421
1422 /* set the bus switch and get the modes */
Chris Wilsone957d772010-09-24 12:52:03 +01001423 edid = intel_sdvo_get_edid(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001424
Keith Packard57cdaf92009-09-04 13:07:54 +08001425 /*
1426 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1427 * link between analog and digital outputs. So, if the regular SDVO
1428 * DDC fails, check to see if the analog output is disconnected, in
1429 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001430 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001431 if (edid == NULL)
1432 edid = intel_sdvo_get_analog_edid(connector);
1433
Chris Wilsonff482d82010-09-15 10:40:38 +01001434 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001435 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1436 edid)) {
Chris Wilson0c1dab82010-11-23 22:37:01 +00001437 drm_mode_connector_update_edid_property(connector, edid);
1438 drm_add_edid_modes(connector, edid);
1439 }
Chris Wilson139467432011-02-09 20:01:16 +00001440
Chris Wilsonff482d82010-09-15 10:40:38 +01001441 connector->display_info.raw_edid = NULL;
1442 kfree(edid);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001443 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001444}
1445
1446/*
1447 * Set of SDVO TV modes.
1448 * Note! This is in reply order (see loop in get_tv_modes).
1449 * XXX: all 60Hz refresh?
1450 */
Chris Wilsonb1f559e2011-01-26 09:49:47 +00001451static const struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001452 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1453 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001454 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001455 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1456 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001457 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001458 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1459 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001460 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001461 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1462 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001463 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001464 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1465 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001466 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001467 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1468 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001469 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001470 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1471 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001472 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001473 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1474 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001475 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001476 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1477 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001478 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001479 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1480 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001481 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001482 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1483 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001484 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001485 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1486 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001487 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001488 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1489 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001490 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001491 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1492 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001493 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001494 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1495 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001496 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001497 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1498 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001499 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001500 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1501 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001502 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001503 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1504 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001505 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001506 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1507 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001508 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1509};
1510
1511static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1512{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001513 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001514 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001515 uint32_t reply = 0, format_map = 0;
1516 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001517
1518 /* Read the list of supported input resolutions for the selected TV
1519 * format.
1520 */
Chris Wilson40039752010-08-04 13:50:26 +01001521 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001522 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001523 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001524
Chris Wilson32aad862010-08-04 13:50:25 +01001525 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1526 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001527
Chris Wilson32aad862010-08-04 13:50:25 +01001528 BUILD_BUG_ON(sizeof(tv_res) != 3);
Chris Wilsone957d772010-09-24 12:52:03 +01001529 if (!intel_sdvo_write_cmd(intel_sdvo,
1530 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
Chris Wilson32aad862010-08-04 13:50:25 +01001531 &tv_res, sizeof(tv_res)))
1532 return;
1533 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001534 return;
1535
1536 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001537 if (reply & (1 << i)) {
1538 struct drm_display_mode *nmode;
1539 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001540 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001541 if (nmode)
1542 drm_mode_probed_add(connector, nmode);
1543 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001544}
1545
Ma Ling7086c872009-05-13 11:20:06 +08001546static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1547{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001548 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Ma Ling7086c872009-05-13 11:20:06 +08001549 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001550 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001551
1552 /*
1553 * Attempt to get the mode list from DDC.
1554 * Assume that the preferred modes are
1555 * arranged in priority order.
1556 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001557 intel_ddc_get_modes(connector, intel_sdvo->i2c);
Ma Ling7086c872009-05-13 11:20:06 +08001558 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001559 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001560
1561 /* Fetch modes from VBT */
1562 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001563 newmode = drm_mode_duplicate(connector->dev,
1564 dev_priv->sdvo_lvds_vbt_mode);
1565 if (newmode != NULL) {
1566 /* Guarantee the mode is preferred */
1567 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1568 DRM_MODE_TYPE_DRIVER);
1569 drm_mode_probed_add(connector, newmode);
1570 }
1571 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001572
1573end:
1574 list_for_each_entry(newmode, &connector->probed_modes, head) {
1575 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001576 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001577 drm_mode_duplicate(connector->dev, newmode);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001578
1579 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1580 0);
1581
Chris Wilson85454232010-08-08 14:28:23 +01001582 intel_sdvo->is_lvds = true;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001583 break;
1584 }
1585 }
1586
Ma Ling7086c872009-05-13 11:20:06 +08001587}
1588
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001589static int intel_sdvo_get_modes(struct drm_connector *connector)
1590{
Chris Wilson615fb932010-08-04 13:50:24 +01001591 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001592
Chris Wilson615fb932010-08-04 13:50:24 +01001593 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001594 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001595 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001596 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001597 else
1598 intel_sdvo_get_ddc_modes(connector);
1599
Chris Wilson32aad862010-08-04 13:50:25 +01001600 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001601}
1602
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001603static void
1604intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001605{
Chris Wilson615fb932010-08-04 13:50:24 +01001606 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001607 struct drm_device *dev = connector->dev;
1608
Chris Wilsonc5521702010-08-04 13:50:28 +01001609 if (intel_sdvo_connector->left)
1610 drm_property_destroy(dev, intel_sdvo_connector->left);
1611 if (intel_sdvo_connector->right)
1612 drm_property_destroy(dev, intel_sdvo_connector->right);
1613 if (intel_sdvo_connector->top)
1614 drm_property_destroy(dev, intel_sdvo_connector->top);
1615 if (intel_sdvo_connector->bottom)
1616 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1617 if (intel_sdvo_connector->hpos)
1618 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1619 if (intel_sdvo_connector->vpos)
1620 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1621 if (intel_sdvo_connector->saturation)
1622 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1623 if (intel_sdvo_connector->contrast)
1624 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1625 if (intel_sdvo_connector->hue)
1626 drm_property_destroy(dev, intel_sdvo_connector->hue);
1627 if (intel_sdvo_connector->sharpness)
1628 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1629 if (intel_sdvo_connector->flicker_filter)
1630 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1631 if (intel_sdvo_connector->flicker_filter_2d)
1632 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1633 if (intel_sdvo_connector->flicker_filter_adaptive)
1634 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1635 if (intel_sdvo_connector->tv_luma_filter)
1636 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1637 if (intel_sdvo_connector->tv_chroma_filter)
1638 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
Chris Wilsone0442182010-08-04 13:50:29 +01001639 if (intel_sdvo_connector->dot_crawl)
1640 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
Chris Wilsonc5521702010-08-04 13:50:28 +01001641 if (intel_sdvo_connector->brightness)
1642 drm_property_destroy(dev, intel_sdvo_connector->brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001643}
1644
Jesse Barnes79e53942008-11-07 14:24:08 -08001645static void intel_sdvo_destroy(struct drm_connector *connector)
1646{
Chris Wilson615fb932010-08-04 13:50:24 +01001647 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001648
Chris Wilsonc5521702010-08-04 13:50:28 +01001649 if (intel_sdvo_connector->tv_format)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001650 drm_property_destroy(connector->dev,
Chris Wilsonc5521702010-08-04 13:50:28 +01001651 intel_sdvo_connector->tv_format);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001652
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001653 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001654 drm_sysfs_connector_remove(connector);
1655 drm_connector_cleanup(connector);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001656 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001657}
1658
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001659static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1660{
1661 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1662 struct edid *edid;
1663 bool has_audio = false;
1664
1665 if (!intel_sdvo->is_hdmi)
1666 return false;
1667
1668 edid = intel_sdvo_get_edid(connector);
1669 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1670 has_audio = drm_detect_monitor_audio(edid);
1671
1672 return has_audio;
1673}
1674
Zhao Yakuice6feab2009-08-24 13:50:26 +08001675static int
1676intel_sdvo_set_property(struct drm_connector *connector,
1677 struct drm_property *property,
1678 uint64_t val)
1679{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001680 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001681 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Chris Wilsone953fd72011-02-21 22:23:52 +00001682 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001683 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001684 uint8_t cmd;
1685 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001686
1687 ret = drm_connector_property_set_value(connector, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001688 if (ret)
1689 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001690
Chris Wilson3f43c482011-05-12 22:17:24 +01001691 if (property == dev_priv->force_audio_property) {
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001692 int i = val;
1693 bool has_audio;
1694
1695 if (i == intel_sdvo_connector->force_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001696 return 0;
1697
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001698 intel_sdvo_connector->force_audio = i;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001699
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001700 if (i == HDMI_AUDIO_AUTO)
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001701 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1702 else
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001703 has_audio = (i == HDMI_AUDIO_ON);
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001704
1705 if (has_audio == intel_sdvo->has_hdmi_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001706 return 0;
1707
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001708 intel_sdvo->has_hdmi_audio = has_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001709 goto done;
1710 }
1711
Chris Wilsone953fd72011-02-21 22:23:52 +00001712 if (property == dev_priv->broadcast_rgb_property) {
1713 if (val == !!intel_sdvo->color_range)
1714 return 0;
1715
1716 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001717 goto done;
1718 }
1719
Chris Wilsonc5521702010-08-04 13:50:28 +01001720#define CHECK_PROPERTY(name, NAME) \
1721 if (intel_sdvo_connector->name == property) { \
1722 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1723 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1724 cmd = SDVO_CMD_SET_##NAME; \
1725 intel_sdvo_connector->cur_##name = temp_value; \
1726 goto set_value; \
1727 }
1728
1729 if (property == intel_sdvo_connector->tv_format) {
Chris Wilson32aad862010-08-04 13:50:25 +01001730 if (val >= TV_FORMAT_NUM)
1731 return -EINVAL;
1732
Chris Wilson40039752010-08-04 13:50:26 +01001733 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01001734 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001735 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001736
Chris Wilson40039752010-08-04 13:50:26 +01001737 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Chris Wilsonc5521702010-08-04 13:50:28 +01001738 goto done;
Chris Wilson32aad862010-08-04 13:50:25 +01001739 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001740 temp_value = val;
Chris Wilsonc5521702010-08-04 13:50:28 +01001741 if (intel_sdvo_connector->left == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001742 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001743 intel_sdvo_connector->right, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001744 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001745 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001746
Chris Wilson615fb932010-08-04 13:50:24 +01001747 intel_sdvo_connector->left_margin = temp_value;
1748 intel_sdvo_connector->right_margin = temp_value;
1749 temp_value = intel_sdvo_connector->max_hscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001750 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001751 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001752 goto set_value;
1753 } else if (intel_sdvo_connector->right == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001754 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001755 intel_sdvo_connector->left, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001756 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001757 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001758
Chris Wilson615fb932010-08-04 13:50:24 +01001759 intel_sdvo_connector->left_margin = temp_value;
1760 intel_sdvo_connector->right_margin = temp_value;
1761 temp_value = intel_sdvo_connector->max_hscan -
1762 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001763 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001764 goto set_value;
1765 } else if (intel_sdvo_connector->top == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001766 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001767 intel_sdvo_connector->bottom, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001768 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001769 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001770
Chris Wilson615fb932010-08-04 13:50:24 +01001771 intel_sdvo_connector->top_margin = temp_value;
1772 intel_sdvo_connector->bottom_margin = temp_value;
1773 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001774 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001775 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001776 goto set_value;
1777 } else if (intel_sdvo_connector->bottom == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001778 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001779 intel_sdvo_connector->top, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001780 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001781 return 0;
1782
Chris Wilson615fb932010-08-04 13:50:24 +01001783 intel_sdvo_connector->top_margin = temp_value;
1784 intel_sdvo_connector->bottom_margin = temp_value;
1785 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001786 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001787 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001788 goto set_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001789 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001790 CHECK_PROPERTY(hpos, HPOS)
1791 CHECK_PROPERTY(vpos, VPOS)
1792 CHECK_PROPERTY(saturation, SATURATION)
1793 CHECK_PROPERTY(contrast, CONTRAST)
1794 CHECK_PROPERTY(hue, HUE)
1795 CHECK_PROPERTY(brightness, BRIGHTNESS)
1796 CHECK_PROPERTY(sharpness, SHARPNESS)
1797 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1798 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1799 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1800 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1801 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
Chris Wilsone0442182010-08-04 13:50:29 +01001802 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001803 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001804
1805 return -EINVAL; /* unknown property */
1806
1807set_value:
1808 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1809 return -EIO;
1810
1811
1812done:
Chris Wilsondf0e9242010-09-09 16:20:55 +01001813 if (intel_sdvo->base.base.crtc) {
1814 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001815 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
Chris Wilsonc5521702010-08-04 13:50:28 +01001816 crtc->y, crtc->fb);
1817 }
1818
Chris Wilson32aad862010-08-04 13:50:25 +01001819 return 0;
Chris Wilsonc5521702010-08-04 13:50:28 +01001820#undef CHECK_PROPERTY
Zhao Yakuice6feab2009-08-24 13:50:26 +08001821}
1822
Jesse Barnes79e53942008-11-07 14:24:08 -08001823static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1824 .dpms = intel_sdvo_dpms,
1825 .mode_fixup = intel_sdvo_mode_fixup,
1826 .prepare = intel_encoder_prepare,
1827 .mode_set = intel_sdvo_mode_set,
1828 .commit = intel_encoder_commit,
1829};
1830
1831static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Keith Packardc9fb15f2009-05-30 20:42:28 -07001832 .dpms = drm_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08001833 .detect = intel_sdvo_detect,
1834 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08001835 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08001836 .destroy = intel_sdvo_destroy,
1837};
1838
1839static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1840 .get_modes = intel_sdvo_get_modes,
1841 .mode_valid = intel_sdvo_mode_valid,
Chris Wilsondf0e9242010-09-09 16:20:55 +01001842 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08001843};
1844
Hannes Ederb358d0a2008-12-18 21:18:47 +01001845static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001846{
Chris Wilson890f3352010-09-14 16:46:59 +01001847 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001848
Chris Wilsonea5b2132010-08-04 13:50:23 +01001849 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001850 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001851 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001852
Chris Wilsone957d772010-09-24 12:52:03 +01001853 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001854 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001855}
1856
1857static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1858 .destroy = intel_sdvo_enc_destroy,
1859};
1860
Chris Wilsonb66d8422010-08-12 15:26:41 +01001861static void
1862intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1863{
1864 uint16_t mask = 0;
1865 unsigned int num_bits;
1866
1867 /* Make a mask of outputs less than or equal to our own priority in the
1868 * list.
1869 */
1870 switch (sdvo->controlled_output) {
1871 case SDVO_OUTPUT_LVDS1:
1872 mask |= SDVO_OUTPUT_LVDS1;
1873 case SDVO_OUTPUT_LVDS0:
1874 mask |= SDVO_OUTPUT_LVDS0;
1875 case SDVO_OUTPUT_TMDS1:
1876 mask |= SDVO_OUTPUT_TMDS1;
1877 case SDVO_OUTPUT_TMDS0:
1878 mask |= SDVO_OUTPUT_TMDS0;
1879 case SDVO_OUTPUT_RGB1:
1880 mask |= SDVO_OUTPUT_RGB1;
1881 case SDVO_OUTPUT_RGB0:
1882 mask |= SDVO_OUTPUT_RGB0;
1883 break;
1884 }
1885
1886 /* Count bits to find what number we are in the priority list. */
1887 mask &= sdvo->caps.output_flags;
1888 num_bits = hweight16(mask);
1889 /* If more than 3 outputs, default to DDC bus 3 for now. */
1890 if (num_bits > 3)
1891 num_bits = 3;
1892
1893 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1894 sdvo->ddc_bus = 1 << num_bits;
1895}
Jesse Barnes79e53942008-11-07 14:24:08 -08001896
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001897/**
1898 * Choose the appropriate DDC bus for control bus switch command for this
1899 * SDVO output based on the controlled output.
1900 *
1901 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1902 * outputs, then LVDS outputs.
1903 */
1904static void
Adam Jacksonb1083332010-04-23 16:07:40 -04001905intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001906 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001907{
Adam Jacksonb1083332010-04-23 16:07:40 -04001908 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001909
Daniel Vettereef4eac2012-03-23 23:43:35 +01001910 if (sdvo->is_sdvob)
Adam Jacksonb1083332010-04-23 16:07:40 -04001911 mapping = &(dev_priv->sdvo_mappings[0]);
1912 else
1913 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001914
Chris Wilsonb66d8422010-08-12 15:26:41 +01001915 if (mapping->initialized)
1916 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1917 else
1918 intel_sdvo_guess_ddc_bus(sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001919}
1920
Chris Wilsone957d772010-09-24 12:52:03 +01001921static void
1922intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1923 struct intel_sdvo *sdvo, u32 reg)
1924{
1925 struct sdvo_device_mapping *mapping;
Adam Jackson46eb3032011-06-16 16:36:23 -04001926 u8 pin;
Chris Wilsone957d772010-09-24 12:52:03 +01001927
Daniel Vettereef4eac2012-03-23 23:43:35 +01001928 if (sdvo->is_sdvob)
Chris Wilsone957d772010-09-24 12:52:03 +01001929 mapping = &dev_priv->sdvo_mappings[0];
1930 else
1931 mapping = &dev_priv->sdvo_mappings[1];
1932
1933 pin = GMBUS_PORT_DPB;
Adam Jackson46eb3032011-06-16 16:36:23 -04001934 if (mapping->initialized)
Chris Wilsone957d772010-09-24 12:52:03 +01001935 pin = mapping->i2c_pin;
Chris Wilsone957d772010-09-24 12:52:03 +01001936
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001937 if (intel_gmbus_is_port_valid(pin)) {
1938 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
Adam Jacksond5090b92011-06-16 16:36:28 -04001939 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
Chris Wilson63abf3e2010-12-08 16:48:21 +00001940 intel_gmbus_force_bit(sdvo->i2c, true);
Adam Jackson46eb3032011-06-16 16:36:23 -04001941 } else {
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001942 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
Adam Jackson46eb3032011-06-16 16:36:23 -04001943 }
Chris Wilsone957d772010-09-24 12:52:03 +01001944}
1945
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001946static bool
Chris Wilsone27d8532010-10-22 09:15:22 +01001947intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001948{
Chris Wilson97aaf912011-01-04 20:10:52 +00001949 return intel_sdvo_check_supp_encode(intel_sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001950}
1951
yakui_zhao714605e2009-05-31 17:18:07 +08001952static u8
Daniel Vettereef4eac2012-03-23 23:43:35 +01001953intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
yakui_zhao714605e2009-05-31 17:18:07 +08001954{
1955 struct drm_i915_private *dev_priv = dev->dev_private;
1956 struct sdvo_device_mapping *my_mapping, *other_mapping;
1957
Daniel Vettereef4eac2012-03-23 23:43:35 +01001958 if (sdvo->is_sdvob) {
yakui_zhao714605e2009-05-31 17:18:07 +08001959 my_mapping = &dev_priv->sdvo_mappings[0];
1960 other_mapping = &dev_priv->sdvo_mappings[1];
1961 } else {
1962 my_mapping = &dev_priv->sdvo_mappings[1];
1963 other_mapping = &dev_priv->sdvo_mappings[0];
1964 }
1965
1966 /* If the BIOS described our SDVO device, take advantage of it. */
1967 if (my_mapping->slave_addr)
1968 return my_mapping->slave_addr;
1969
1970 /* If the BIOS only described a different SDVO device, use the
1971 * address that it isn't using.
1972 */
1973 if (other_mapping->slave_addr) {
1974 if (other_mapping->slave_addr == 0x70)
1975 return 0x72;
1976 else
1977 return 0x70;
1978 }
1979
1980 /* No SDVO device info is found for another DVO port,
1981 * so use mapping assumption we had before BIOS parsing.
1982 */
Daniel Vettereef4eac2012-03-23 23:43:35 +01001983 if (sdvo->is_sdvob)
yakui_zhao714605e2009-05-31 17:18:07 +08001984 return 0x70;
1985 else
1986 return 0x72;
1987}
1988
Zhenyu Wang14571b42010-03-30 14:06:33 +08001989static void
Chris Wilsondf0e9242010-09-09 16:20:55 +01001990intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
1991 struct intel_sdvo *encoder)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001992{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001993 drm_connector_init(encoder->base.base.dev,
1994 &connector->base.base,
1995 &intel_sdvo_connector_funcs,
1996 connector->base.base.connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08001997
Chris Wilsondf0e9242010-09-09 16:20:55 +01001998 drm_connector_helper_add(&connector->base.base,
1999 &intel_sdvo_connector_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002000
Peter Ross8f4839e2012-01-28 14:49:25 +01002001 connector->base.base.interlace_allowed = 1;
Chris Wilsondf0e9242010-09-09 16:20:55 +01002002 connector->base.base.doublescan_allowed = 0;
2003 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002004
Chris Wilsondf0e9242010-09-09 16:20:55 +01002005 intel_connector_attach_encoder(&connector->base, &encoder->base);
2006 drm_sysfs_connector_add(&connector->base.base);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002007}
2008
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002009static void
2010intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2011{
2012 struct drm_device *dev = connector->base.base.dev;
2013
Chris Wilson3f43c482011-05-12 22:17:24 +01002014 intel_attach_force_audio_property(&connector->base.base);
Chris Wilsone953fd72011-02-21 22:23:52 +00002015 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2016 intel_attach_broadcast_rgb_property(&connector->base.base);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002017}
2018
Zhenyu Wang14571b42010-03-30 14:06:33 +08002019static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002020intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002021{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002022 struct drm_encoder *encoder = &intel_sdvo->base.base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002023 struct drm_connector *connector;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002024 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002025 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002026 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002027
Chris Wilson615fb932010-08-04 13:50:24 +01002028 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2029 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002030 return false;
2031
Zhenyu Wang14571b42010-03-30 14:06:33 +08002032 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002033 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002034 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002035 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002036 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002037 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002038 }
2039
Chris Wilson615fb932010-08-04 13:50:24 +01002040 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002041 connector = &intel_connector->base;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002042 if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2043 connector->polled = DRM_CONNECTOR_POLL_HPD;
2044 intel_sdvo->hotplug_active[0] |= 1 << device;
2045 /* Some SDVO devices have one-shot hotplug interrupts.
2046 * Ensure that they get re-enabled when an interrupt happens.
2047 */
2048 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2049 intel_sdvo_enable_hotplug(intel_encoder);
2050 }
2051 else
2052 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002053 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2054 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2055
Chris Wilsone27d8532010-10-22 09:15:22 +01002056 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002057 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
Chris Wilsone27d8532010-10-22 09:15:22 +01002058 intel_sdvo->is_hdmi = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002059 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002060 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2061 (1 << INTEL_ANALOG_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002062
Chris Wilsondf0e9242010-09-09 16:20:55 +01002063 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilsonf797d222010-12-23 09:43:48 +00002064 if (intel_sdvo->is_hdmi)
2065 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002066
2067 return true;
2068}
2069
2070static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002071intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002072{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002073 struct drm_encoder *encoder = &intel_sdvo->base.base;
2074 struct drm_connector *connector;
2075 struct intel_connector *intel_connector;
2076 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002077
Chris Wilson615fb932010-08-04 13:50:24 +01002078 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2079 if (!intel_sdvo_connector)
2080 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002081
Chris Wilson615fb932010-08-04 13:50:24 +01002082 intel_connector = &intel_sdvo_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002083 connector = &intel_connector->base;
2084 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2085 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002086
Chris Wilson4ef69c72010-09-09 15:14:28 +01002087 intel_sdvo->controlled_output |= type;
2088 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002089
Chris Wilson4ef69c72010-09-09 15:14:28 +01002090 intel_sdvo->is_tv = true;
2091 intel_sdvo->base.needs_tv_clock = true;
2092 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002093
Chris Wilsondf0e9242010-09-09 16:20:55 +01002094 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002095
Chris Wilson4ef69c72010-09-09 15:14:28 +01002096 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
Chris Wilson32aad862010-08-04 13:50:25 +01002097 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002098
Chris Wilson4ef69c72010-09-09 15:14:28 +01002099 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002100 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002101
Chris Wilson4ef69c72010-09-09 15:14:28 +01002102 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002103
2104err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002105 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002106 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002107}
2108
2109static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002110intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002111{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002112 struct drm_encoder *encoder = &intel_sdvo->base.base;
2113 struct drm_connector *connector;
2114 struct intel_connector *intel_connector;
2115 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002116
Chris Wilson615fb932010-08-04 13:50:24 +01002117 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2118 if (!intel_sdvo_connector)
2119 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002120
Chris Wilson615fb932010-08-04 13:50:24 +01002121 intel_connector = &intel_sdvo_connector->base;
2122 connector = &intel_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002123 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2124 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2125 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002126
Chris Wilson4ef69c72010-09-09 15:14:28 +01002127 if (device == 0) {
2128 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2129 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2130 } else if (device == 1) {
2131 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2132 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2133 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002134
Chris Wilson4ef69c72010-09-09 15:14:28 +01002135 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2136 (1 << INTEL_ANALOG_CLONE_BIT));
2137
Chris Wilsondf0e9242010-09-09 16:20:55 +01002138 intel_sdvo_connector_init(intel_sdvo_connector,
2139 intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002140 return true;
2141}
2142
2143static bool
2144intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2145{
2146 struct drm_encoder *encoder = &intel_sdvo->base.base;
2147 struct drm_connector *connector;
2148 struct intel_connector *intel_connector;
2149 struct intel_sdvo_connector *intel_sdvo_connector;
2150
2151 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2152 if (!intel_sdvo_connector)
2153 return false;
2154
2155 intel_connector = &intel_sdvo_connector->base;
2156 connector = &intel_connector->base;
2157 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2158 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2159
2160 if (device == 0) {
2161 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2162 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2163 } else if (device == 1) {
2164 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2165 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2166 }
2167
2168 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
Chris Wilsonea5b2132010-08-04 13:50:23 +01002169 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002170
Chris Wilsondf0e9242010-09-09 16:20:55 +01002171 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002172 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002173 goto err;
2174
2175 return true;
2176
2177err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002178 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002179 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002180}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002181
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002182static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002183intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002184{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002185 intel_sdvo->is_tv = false;
2186 intel_sdvo->base.needs_tv_clock = false;
2187 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002188
Zhenyu Wang14571b42010-03-30 14:06:33 +08002189 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002190
Zhenyu Wang14571b42010-03-30 14:06:33 +08002191 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002192 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002193 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002194
Zhenyu Wang14571b42010-03-30 14:06:33 +08002195 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002196 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002197 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002198
Zhenyu Wang14571b42010-03-30 14:06:33 +08002199 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7ff2010-03-29 23:16:13 +08002200 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002201 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002202 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002203
Zhenyu Wang14571b42010-03-30 14:06:33 +08002204 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002205 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002206 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002207
Chris Wilsona0b1c7a2011-09-30 22:56:41 +01002208 if (flags & SDVO_OUTPUT_YPRPB0)
2209 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2210 return false;
2211
Zhenyu Wang14571b42010-03-30 14:06:33 +08002212 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002213 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002214 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002215
Zhenyu Wang14571b42010-03-30 14:06:33 +08002216 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002217 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002218 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002219
Zhenyu Wang14571b42010-03-30 14:06:33 +08002220 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002221 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002222 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002223
Zhenyu Wang14571b42010-03-30 14:06:33 +08002224 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002225 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002226 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002227
Zhenyu Wang14571b42010-03-30 14:06:33 +08002228 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002229 unsigned char bytes[2];
2230
Chris Wilsonea5b2132010-08-04 13:50:23 +01002231 intel_sdvo->controlled_output = 0;
2232 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002233 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002234 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002235 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002236 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002237 }
Jesse Barnes27f82272011-09-02 12:54:37 -07002238 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002239
Zhenyu Wang14571b42010-03-30 14:06:33 +08002240 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002241}
2242
Chris Wilson32aad862010-08-04 13:50:25 +01002243static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2244 struct intel_sdvo_connector *intel_sdvo_connector,
2245 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002246{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002247 struct drm_device *dev = intel_sdvo->base.base.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002248 struct intel_sdvo_tv_format format;
2249 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002250
Chris Wilson32aad862010-08-04 13:50:25 +01002251 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2252 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002253
Chris Wilson1a3665c2011-01-25 13:59:37 +00002254 BUILD_BUG_ON(sizeof(format) != 6);
Chris Wilson32aad862010-08-04 13:50:25 +01002255 if (!intel_sdvo_get_value(intel_sdvo,
2256 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2257 &format, sizeof(format)))
2258 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002259
Chris Wilson32aad862010-08-04 13:50:25 +01002260 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002261
2262 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002263 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002264
Chris Wilson615fb932010-08-04 13:50:24 +01002265 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002266 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002267 if (format_map & (1 << i))
2268 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002269
2270
Chris Wilsonc5521702010-08-04 13:50:28 +01002271 intel_sdvo_connector->tv_format =
Chris Wilson32aad862010-08-04 13:50:25 +01002272 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2273 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonc5521702010-08-04 13:50:28 +01002274 if (!intel_sdvo_connector->tv_format)
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002275 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002276
Chris Wilson615fb932010-08-04 13:50:24 +01002277 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002278 drm_property_add_enum(
Chris Wilsonc5521702010-08-04 13:50:28 +01002279 intel_sdvo_connector->tv_format, i,
Chris Wilson40039752010-08-04 13:50:26 +01002280 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002281
Chris Wilson40039752010-08-04 13:50:26 +01002282 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Chris Wilson32aad862010-08-04 13:50:25 +01002283 drm_connector_attach_property(&intel_sdvo_connector->base.base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002284 intel_sdvo_connector->tv_format, 0);
Chris Wilson32aad862010-08-04 13:50:25 +01002285 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002286
2287}
2288
Chris Wilsonc5521702010-08-04 13:50:28 +01002289#define ENHANCEMENT(name, NAME) do { \
2290 if (enhancements.name) { \
2291 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2292 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2293 return false; \
2294 intel_sdvo_connector->max_##name = data_value[0]; \
2295 intel_sdvo_connector->cur_##name = response; \
2296 intel_sdvo_connector->name = \
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002297 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
Chris Wilsonc5521702010-08-04 13:50:28 +01002298 if (!intel_sdvo_connector->name) return false; \
Chris Wilsonc5521702010-08-04 13:50:28 +01002299 drm_connector_attach_property(connector, \
2300 intel_sdvo_connector->name, \
2301 intel_sdvo_connector->cur_##name); \
2302 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2303 data_value[0], data_value[1], response); \
2304 } \
Akshay Joshi0206e352011-08-16 15:34:10 -04002305} while (0)
Chris Wilsonc5521702010-08-04 13:50:28 +01002306
2307static bool
2308intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2309 struct intel_sdvo_connector *intel_sdvo_connector,
2310 struct intel_sdvo_enhancements_reply enhancements)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002311{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002312 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilson32aad862010-08-04 13:50:25 +01002313 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002314 uint16_t response, data_value[2];
2315
Chris Wilsonc5521702010-08-04 13:50:28 +01002316 /* when horizontal overscan is supported, Add the left/right property */
2317 if (enhancements.overscan_h) {
2318 if (!intel_sdvo_get_value(intel_sdvo,
2319 SDVO_CMD_GET_MAX_OVERSCAN_H,
2320 &data_value, 4))
2321 return false;
2322
2323 if (!intel_sdvo_get_value(intel_sdvo,
2324 SDVO_CMD_GET_OVERSCAN_H,
2325 &response, 2))
2326 return false;
2327
2328 intel_sdvo_connector->max_hscan = data_value[0];
2329 intel_sdvo_connector->left_margin = data_value[0] - response;
2330 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2331 intel_sdvo_connector->left =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002332 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002333 if (!intel_sdvo_connector->left)
2334 return false;
2335
Chris Wilsonc5521702010-08-04 13:50:28 +01002336 drm_connector_attach_property(connector,
2337 intel_sdvo_connector->left,
2338 intel_sdvo_connector->left_margin);
2339
2340 intel_sdvo_connector->right =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002341 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002342 if (!intel_sdvo_connector->right)
2343 return false;
2344
Chris Wilsonc5521702010-08-04 13:50:28 +01002345 drm_connector_attach_property(connector,
2346 intel_sdvo_connector->right,
2347 intel_sdvo_connector->right_margin);
2348 DRM_DEBUG_KMS("h_overscan: max %d, "
2349 "default %d, current %d\n",
2350 data_value[0], data_value[1], response);
2351 }
2352
2353 if (enhancements.overscan_v) {
2354 if (!intel_sdvo_get_value(intel_sdvo,
2355 SDVO_CMD_GET_MAX_OVERSCAN_V,
2356 &data_value, 4))
2357 return false;
2358
2359 if (!intel_sdvo_get_value(intel_sdvo,
2360 SDVO_CMD_GET_OVERSCAN_V,
2361 &response, 2))
2362 return false;
2363
2364 intel_sdvo_connector->max_vscan = data_value[0];
2365 intel_sdvo_connector->top_margin = data_value[0] - response;
2366 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2367 intel_sdvo_connector->top =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002368 drm_property_create_range(dev, 0,
2369 "top_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002370 if (!intel_sdvo_connector->top)
2371 return false;
2372
Chris Wilsonc5521702010-08-04 13:50:28 +01002373 drm_connector_attach_property(connector,
2374 intel_sdvo_connector->top,
2375 intel_sdvo_connector->top_margin);
2376
2377 intel_sdvo_connector->bottom =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002378 drm_property_create_range(dev, 0,
2379 "bottom_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002380 if (!intel_sdvo_connector->bottom)
2381 return false;
2382
Chris Wilsonc5521702010-08-04 13:50:28 +01002383 drm_connector_attach_property(connector,
2384 intel_sdvo_connector->bottom,
2385 intel_sdvo_connector->bottom_margin);
2386 DRM_DEBUG_KMS("v_overscan: max %d, "
2387 "default %d, current %d\n",
2388 data_value[0], data_value[1], response);
2389 }
2390
2391 ENHANCEMENT(hpos, HPOS);
2392 ENHANCEMENT(vpos, VPOS);
2393 ENHANCEMENT(saturation, SATURATION);
2394 ENHANCEMENT(contrast, CONTRAST);
2395 ENHANCEMENT(hue, HUE);
2396 ENHANCEMENT(sharpness, SHARPNESS);
2397 ENHANCEMENT(brightness, BRIGHTNESS);
2398 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2399 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2400 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2401 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2402 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2403
Chris Wilsone0442182010-08-04 13:50:29 +01002404 if (enhancements.dot_crawl) {
2405 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2406 return false;
2407
2408 intel_sdvo_connector->max_dot_crawl = 1;
2409 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2410 intel_sdvo_connector->dot_crawl =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002411 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
Chris Wilsone0442182010-08-04 13:50:29 +01002412 if (!intel_sdvo_connector->dot_crawl)
2413 return false;
2414
Chris Wilsone0442182010-08-04 13:50:29 +01002415 drm_connector_attach_property(connector,
2416 intel_sdvo_connector->dot_crawl,
2417 intel_sdvo_connector->cur_dot_crawl);
2418 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2419 }
2420
Chris Wilsonc5521702010-08-04 13:50:28 +01002421 return true;
2422}
2423
2424static bool
2425intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2426 struct intel_sdvo_connector *intel_sdvo_connector,
2427 struct intel_sdvo_enhancements_reply enhancements)
2428{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002429 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilsonc5521702010-08-04 13:50:28 +01002430 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2431 uint16_t response, data_value[2];
2432
2433 ENHANCEMENT(brightness, BRIGHTNESS);
2434
2435 return true;
2436}
2437#undef ENHANCEMENT
2438
2439static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2440 struct intel_sdvo_connector *intel_sdvo_connector)
2441{
2442 union {
2443 struct intel_sdvo_enhancements_reply reply;
2444 uint16_t response;
2445 } enhancements;
2446
Chris Wilson1a3665c2011-01-25 13:59:37 +00002447 BUILD_BUG_ON(sizeof(enhancements) != 2);
2448
Chris Wilsoncf9a2f32010-09-23 16:17:33 +01002449 enhancements.response = 0;
2450 intel_sdvo_get_value(intel_sdvo,
2451 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2452 &enhancements, sizeof(enhancements));
Chris Wilsonc5521702010-08-04 13:50:28 +01002453 if (enhancements.response == 0) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002454 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002455 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002456 }
Chris Wilson32aad862010-08-04 13:50:25 +01002457
Chris Wilsonc5521702010-08-04 13:50:28 +01002458 if (IS_TV(intel_sdvo_connector))
2459 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
Akshay Joshi0206e352011-08-16 15:34:10 -04002460 else if (IS_LVDS(intel_sdvo_connector))
Chris Wilsonc5521702010-08-04 13:50:28 +01002461 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2462 else
2463 return true;
Chris Wilsone957d772010-09-24 12:52:03 +01002464}
Chris Wilson32aad862010-08-04 13:50:25 +01002465
Chris Wilsone957d772010-09-24 12:52:03 +01002466static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2467 struct i2c_msg *msgs,
2468 int num)
2469{
2470 struct intel_sdvo *sdvo = adapter->algo_data;
2471
2472 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2473 return -EIO;
2474
2475 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2476}
2477
2478static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2479{
2480 struct intel_sdvo *sdvo = adapter->algo_data;
2481 return sdvo->i2c->algo->functionality(sdvo->i2c);
2482}
2483
2484static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2485 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2486 .functionality = intel_sdvo_ddc_proxy_func
2487};
2488
2489static bool
2490intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2491 struct drm_device *dev)
2492{
2493 sdvo->ddc.owner = THIS_MODULE;
2494 sdvo->ddc.class = I2C_CLASS_DDC;
2495 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2496 sdvo->ddc.dev.parent = &dev->pdev->dev;
2497 sdvo->ddc.algo_data = sdvo;
2498 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2499
2500 return i2c_add_adapter(&sdvo->ddc) == 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002501}
2502
Daniel Vettereef4eac2012-03-23 23:43:35 +01002503bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
Jesse Barnes79e53942008-11-07 14:24:08 -08002504{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002505 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002506 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002507 struct intel_sdvo *intel_sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08002508 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -08002509
Chris Wilsonea5b2132010-08-04 13:50:23 +01002510 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2511 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002512 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002513
Chris Wilson56184e32011-05-17 14:03:50 +01002514 intel_sdvo->sdvo_reg = sdvo_reg;
Daniel Vettereef4eac2012-03-23 23:43:35 +01002515 intel_sdvo->is_sdvob = is_sdvob;
2516 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
Chris Wilson56184e32011-05-17 14:03:50 +01002517 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
Chris Wilsone957d772010-09-24 12:52:03 +01002518 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2519 kfree(intel_sdvo);
2520 return false;
2521 }
2522
Chris Wilson56184e32011-05-17 14:03:50 +01002523 /* encoder type will be decided later */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002524 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002525 intel_encoder->type = INTEL_OUTPUT_SDVO;
Chris Wilson373a3cf2010-09-15 12:03:59 +01002526 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08002527
Jesse Barnes79e53942008-11-07 14:24:08 -08002528 /* Read the regs to test if we can talk to the device */
2529 for (i = 0; i < 0x40; i++) {
Chris Wilsonf899fc62010-07-20 15:44:45 -07002530 u8 byte;
2531
2532 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002533 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2534 SDVO_NAME(intel_sdvo));
Chris Wilsonf899fc62010-07-20 15:44:45 -07002535 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002536 }
2537 }
2538
Daniel Vettereef4eac2012-03-23 23:43:35 +01002539 if (intel_sdvo->is_sdvob)
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002540 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
Chris Wilsonf899fc62010-07-20 15:44:45 -07002541 else
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002542 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
Ma Ling619ac3b2009-05-18 16:12:46 +08002543
Chris Wilson4ef69c72010-09-09 15:14:28 +01002544 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002545
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002546 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002547 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002548 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002549
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002550 /* Set up hotplug command - note paranoia about contents of reply.
2551 * We assume that the hardware is in a sane state, and only touch
2552 * the bits we think we understand.
2553 */
2554 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2555 &intel_sdvo->hotplug_active, 2);
2556 intel_sdvo->hotplug_active[0] &= ~0x3;
2557
Chris Wilsonea5b2132010-08-04 13:50:23 +01002558 if (intel_sdvo_output_setup(intel_sdvo,
2559 intel_sdvo->caps.output_flags) != true) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002560 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2561 SDVO_NAME(intel_sdvo));
Chris Wilsonf899fc62010-07-20 15:44:45 -07002562 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002563 }
2564
Chris Wilsonea5b2132010-08-04 13:50:23 +01002565 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002566
Jesse Barnes79e53942008-11-07 14:24:08 -08002567 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002568 if (!intel_sdvo_set_target_input(intel_sdvo))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002569 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002570
Chris Wilson32aad862010-08-04 13:50:25 +01002571 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2572 &intel_sdvo->pixel_clock_min,
2573 &intel_sdvo->pixel_clock_max))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002574 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002575
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002576 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002577 "clock range %dMHz - %dMHz, "
2578 "input 1: %c, input 2: %c, "
2579 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002580 SDVO_NAME(intel_sdvo),
2581 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2582 intel_sdvo->caps.device_rev_id,
2583 intel_sdvo->pixel_clock_min / 1000,
2584 intel_sdvo->pixel_clock_max / 1000,
2585 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2586 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002587 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002588 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002589 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002590 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002591 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002592 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002593
Chris Wilsonf899fc62010-07-20 15:44:45 -07002594err:
Chris Wilson373a3cf2010-09-15 12:03:59 +01002595 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsone957d772010-09-24 12:52:03 +01002596 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002597 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002598
Eric Anholt7d573822009-01-02 13:33:00 -08002599 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002600}