Hartley Sweeten | 1cb17e2 | 2011-10-08 23:04:34 +0100 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-ep93xx/vision_ep9307.c |
| 3 | * Vision Engraving Systems EP9307 SoM support. |
| 4 | * |
| 5 | * Copyright (C) 2008-2011 Vision Engraving Systems |
| 6 | * H Hartley Sweeten <hsweeten@visionengravers.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or (at |
| 11 | * your option) any later version. |
| 12 | */ |
| 13 | |
| 14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 15 | |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/platform_device.h> |
| 19 | #include <linux/irq.h> |
| 20 | #include <linux/gpio.h> |
| 21 | #include <linux/fb.h> |
| 22 | #include <linux/io.h> |
| 23 | #include <linux/mtd/partitions.h> |
| 24 | #include <linux/i2c.h> |
| 25 | #include <linux/i2c-gpio.h> |
Vivien Didelot | 5877457 | 2013-08-29 15:24:14 -0400 | [diff] [blame] | 26 | #include <linux/platform_data/pca953x.h> |
Hartley Sweeten | 1cb17e2 | 2011-10-08 23:04:34 +0100 | [diff] [blame] | 27 | #include <linux/spi/spi.h> |
| 28 | #include <linux/spi/flash.h> |
| 29 | #include <linux/spi/mmc_spi.h> |
| 30 | #include <linux/mmc/host.h> |
| 31 | |
| 32 | #include <mach/hardware.h> |
Arnd Bergmann | a3b29245 | 2012-08-24 15:12:11 +0200 | [diff] [blame] | 33 | #include <linux/platform_data/video-ep93xx.h> |
| 34 | #include <linux/platform_data/spi-ep93xx.h> |
H Hartley Sweeten | e9c6c5d | 2012-02-08 09:53:44 -0700 | [diff] [blame] | 35 | #include <mach/gpio-ep93xx.h> |
Hartley Sweeten | 1cb17e2 | 2011-10-08 23:04:34 +0100 | [diff] [blame] | 36 | |
| 37 | #include <asm/mach-types.h> |
| 38 | #include <asm/mach/map.h> |
| 39 | #include <asm/mach/arch.h> |
| 40 | |
Ryan Mallon | 258249e | 2012-01-11 09:06:08 +1100 | [diff] [blame] | 41 | #include "soc.h" |
| 42 | |
Hartley Sweeten | 1cb17e2 | 2011-10-08 23:04:34 +0100 | [diff] [blame] | 43 | /************************************************************************* |
| 44 | * Static I/O mappings for the FPGA |
| 45 | *************************************************************************/ |
| 46 | #define VISION_PHYS_BASE EP93XX_CS7_PHYS_BASE |
| 47 | #define VISION_VIRT_BASE 0xfebff000 |
| 48 | |
| 49 | static struct map_desc vision_io_desc[] __initdata = { |
| 50 | { |
| 51 | .virtual = VISION_VIRT_BASE, |
| 52 | .pfn = __phys_to_pfn(VISION_PHYS_BASE), |
| 53 | .length = SZ_4K, |
| 54 | .type = MT_DEVICE, |
| 55 | }, |
| 56 | }; |
| 57 | |
| 58 | static void __init vision_map_io(void) |
| 59 | { |
| 60 | ep93xx_map_io(); |
| 61 | |
| 62 | iotable_init(vision_io_desc, ARRAY_SIZE(vision_io_desc)); |
| 63 | } |
| 64 | |
| 65 | /************************************************************************* |
| 66 | * Ethernet |
| 67 | *************************************************************************/ |
| 68 | static struct ep93xx_eth_data vision_eth_data __initdata = { |
| 69 | .phy_id = 1, |
| 70 | }; |
| 71 | |
| 72 | /************************************************************************* |
| 73 | * Framebuffer |
| 74 | *************************************************************************/ |
| 75 | #define VISION_LCD_ENABLE EP93XX_GPIO_LINE_EGPIO1 |
| 76 | |
| 77 | static int vision_lcd_setup(struct platform_device *pdev) |
| 78 | { |
| 79 | int err; |
| 80 | |
| 81 | err = gpio_request_one(VISION_LCD_ENABLE, GPIOF_INIT_HIGH, |
| 82 | dev_name(&pdev->dev)); |
| 83 | if (err) |
| 84 | return err; |
| 85 | |
| 86 | ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_RAS | |
| 87 | EP93XX_SYSCON_DEVCFG_RASONP3 | |
| 88 | EP93XX_SYSCON_DEVCFG_EXVC); |
| 89 | |
| 90 | return 0; |
| 91 | } |
| 92 | |
| 93 | static void vision_lcd_teardown(struct platform_device *pdev) |
| 94 | { |
| 95 | gpio_free(VISION_LCD_ENABLE); |
| 96 | } |
| 97 | |
| 98 | static void vision_lcd_blank(int blank_mode, struct fb_info *info) |
| 99 | { |
| 100 | if (blank_mode) |
| 101 | gpio_set_value(VISION_LCD_ENABLE, 0); |
| 102 | else |
| 103 | gpio_set_value(VISION_LCD_ENABLE, 1); |
| 104 | } |
| 105 | |
| 106 | static struct ep93xxfb_mach_info ep93xxfb_info __initdata = { |
| 107 | .num_modes = EP93XXFB_USE_MODEDB, |
| 108 | .bpp = 16, |
| 109 | .flags = EP93XXFB_USE_SDCSN0 | EP93XXFB_PCLK_FALLING, |
| 110 | .setup = vision_lcd_setup, |
| 111 | .teardown = vision_lcd_teardown, |
| 112 | .blank = vision_lcd_blank, |
| 113 | }; |
| 114 | |
| 115 | |
| 116 | /************************************************************************* |
| 117 | * GPIO Expanders |
| 118 | *************************************************************************/ |
| 119 | #define PCA9539_74_GPIO_BASE (EP93XX_GPIO_LINE_MAX + 1) |
| 120 | #define PCA9539_75_GPIO_BASE (PCA9539_74_GPIO_BASE + 16) |
| 121 | #define PCA9539_76_GPIO_BASE (PCA9539_75_GPIO_BASE + 16) |
| 122 | #define PCA9539_77_GPIO_BASE (PCA9539_76_GPIO_BASE + 16) |
| 123 | |
| 124 | static struct pca953x_platform_data pca953x_74_gpio_data = { |
| 125 | .gpio_base = PCA9539_74_GPIO_BASE, |
| 126 | .irq_base = EP93XX_BOARD_IRQ(0), |
| 127 | }; |
| 128 | |
| 129 | static struct pca953x_platform_data pca953x_75_gpio_data = { |
| 130 | .gpio_base = PCA9539_75_GPIO_BASE, |
| 131 | .irq_base = -1, |
| 132 | }; |
| 133 | |
| 134 | static struct pca953x_platform_data pca953x_76_gpio_data = { |
| 135 | .gpio_base = PCA9539_76_GPIO_BASE, |
| 136 | .irq_base = -1, |
| 137 | }; |
| 138 | |
| 139 | static struct pca953x_platform_data pca953x_77_gpio_data = { |
| 140 | .gpio_base = PCA9539_77_GPIO_BASE, |
| 141 | .irq_base = -1, |
| 142 | }; |
| 143 | |
| 144 | /************************************************************************* |
| 145 | * I2C Bus |
| 146 | *************************************************************************/ |
| 147 | static struct i2c_gpio_platform_data vision_i2c_gpio_data __initdata = { |
| 148 | .sda_pin = EP93XX_GPIO_LINE_EEDAT, |
| 149 | .scl_pin = EP93XX_GPIO_LINE_EECLK, |
| 150 | }; |
| 151 | |
| 152 | static struct i2c_board_info vision_i2c_info[] __initdata = { |
| 153 | { |
| 154 | I2C_BOARD_INFO("isl1208", 0x6f), |
| 155 | .irq = IRQ_EP93XX_EXT1, |
| 156 | }, { |
| 157 | I2C_BOARD_INFO("pca9539", 0x74), |
| 158 | .platform_data = &pca953x_74_gpio_data, |
Hartley Sweeten | 1cb17e2 | 2011-10-08 23:04:34 +0100 | [diff] [blame] | 159 | }, { |
| 160 | I2C_BOARD_INFO("pca9539", 0x75), |
| 161 | .platform_data = &pca953x_75_gpio_data, |
| 162 | }, { |
| 163 | I2C_BOARD_INFO("pca9539", 0x76), |
| 164 | .platform_data = &pca953x_76_gpio_data, |
| 165 | }, { |
| 166 | I2C_BOARD_INFO("pca9539", 0x77), |
| 167 | .platform_data = &pca953x_77_gpio_data, |
| 168 | }, |
| 169 | }; |
| 170 | |
| 171 | /************************************************************************* |
| 172 | * SPI Flash |
| 173 | *************************************************************************/ |
| 174 | #define VISION_SPI_FLASH_CS EP93XX_GPIO_LINE_EGPIO7 |
| 175 | |
| 176 | static struct mtd_partition vision_spi_flash_partitions[] = { |
| 177 | { |
| 178 | .name = "SPI bootstrap", |
| 179 | .offset = 0, |
| 180 | .size = SZ_4K, |
| 181 | }, { |
| 182 | .name = "Bootstrap config", |
| 183 | .offset = MTDPART_OFS_APPEND, |
| 184 | .size = SZ_4K, |
| 185 | }, { |
| 186 | .name = "System config", |
| 187 | .offset = MTDPART_OFS_APPEND, |
| 188 | .size = MTDPART_SIZ_FULL, |
| 189 | }, |
| 190 | }; |
| 191 | |
| 192 | static struct flash_platform_data vision_spi_flash_data = { |
| 193 | .name = "SPI Flash", |
| 194 | .parts = vision_spi_flash_partitions, |
| 195 | .nr_parts = ARRAY_SIZE(vision_spi_flash_partitions), |
| 196 | }; |
| 197 | |
| 198 | static int vision_spi_flash_hw_setup(struct spi_device *spi) |
| 199 | { |
| 200 | return gpio_request_one(VISION_SPI_FLASH_CS, GPIOF_INIT_HIGH, |
| 201 | spi->modalias); |
| 202 | } |
| 203 | |
| 204 | static void vision_spi_flash_hw_cleanup(struct spi_device *spi) |
| 205 | { |
| 206 | gpio_free(VISION_SPI_FLASH_CS); |
| 207 | } |
| 208 | |
| 209 | static void vision_spi_flash_hw_cs_control(struct spi_device *spi, int value) |
| 210 | { |
| 211 | gpio_set_value(VISION_SPI_FLASH_CS, value); |
| 212 | } |
| 213 | |
| 214 | static struct ep93xx_spi_chip_ops vision_spi_flash_hw = { |
| 215 | .setup = vision_spi_flash_hw_setup, |
| 216 | .cleanup = vision_spi_flash_hw_cleanup, |
| 217 | .cs_control = vision_spi_flash_hw_cs_control, |
| 218 | }; |
| 219 | |
| 220 | /************************************************************************* |
| 221 | * SPI SD/MMC host |
| 222 | *************************************************************************/ |
| 223 | #define VISION_SPI_MMC_CS EP93XX_GPIO_LINE_G(2) |
| 224 | #define VISION_SPI_MMC_WP EP93XX_GPIO_LINE_F(0) |
| 225 | #define VISION_SPI_MMC_CD EP93XX_GPIO_LINE_EGPIO15 |
| 226 | |
Hartley Sweeten | 1cb17e2 | 2011-10-08 23:04:34 +0100 | [diff] [blame] | 227 | static struct mmc_spi_platform_data vision_spi_mmc_data = { |
Hartley Sweeten | 1cb17e2 | 2011-10-08 23:04:34 +0100 | [diff] [blame] | 228 | .detect_delay = 100, |
| 229 | .powerup_msecs = 100, |
| 230 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, |
Laurent Pinchart | 2a4f6b1 | 2013-08-08 12:38:33 +0200 | [diff] [blame] | 231 | .flags = MMC_SPI_USE_CD_GPIO | MMC_SPI_USE_RO_GPIO, |
| 232 | .cd_gpio = VISION_SPI_MMC_CD, |
| 233 | .cd_debounce = 1, |
| 234 | .ro_gpio = VISION_SPI_MMC_WP, |
| 235 | .caps2 = MMC_CAP2_RO_ACTIVE_HIGH, |
Hartley Sweeten | 1cb17e2 | 2011-10-08 23:04:34 +0100 | [diff] [blame] | 236 | }; |
| 237 | |
| 238 | static int vision_spi_mmc_hw_setup(struct spi_device *spi) |
| 239 | { |
| 240 | return gpio_request_one(VISION_SPI_MMC_CS, GPIOF_INIT_HIGH, |
| 241 | spi->modalias); |
| 242 | } |
| 243 | |
| 244 | static void vision_spi_mmc_hw_cleanup(struct spi_device *spi) |
| 245 | { |
| 246 | gpio_free(VISION_SPI_MMC_CS); |
| 247 | } |
| 248 | |
| 249 | static void vision_spi_mmc_hw_cs_control(struct spi_device *spi, int value) |
| 250 | { |
| 251 | gpio_set_value(VISION_SPI_MMC_CS, value); |
| 252 | } |
| 253 | |
| 254 | static struct ep93xx_spi_chip_ops vision_spi_mmc_hw = { |
| 255 | .setup = vision_spi_mmc_hw_setup, |
| 256 | .cleanup = vision_spi_mmc_hw_cleanup, |
| 257 | .cs_control = vision_spi_mmc_hw_cs_control, |
| 258 | }; |
| 259 | |
| 260 | /************************************************************************* |
| 261 | * SPI Bus |
| 262 | *************************************************************************/ |
| 263 | static struct spi_board_info vision_spi_board_info[] __initdata = { |
| 264 | { |
| 265 | .modalias = "sst25l", |
| 266 | .platform_data = &vision_spi_flash_data, |
| 267 | .controller_data = &vision_spi_flash_hw, |
| 268 | .max_speed_hz = 20000000, |
| 269 | .bus_num = 0, |
| 270 | .chip_select = 0, |
| 271 | .mode = SPI_MODE_3, |
| 272 | }, { |
| 273 | .modalias = "mmc_spi", |
| 274 | .platform_data = &vision_spi_mmc_data, |
| 275 | .controller_data = &vision_spi_mmc_hw, |
| 276 | .max_speed_hz = 20000000, |
| 277 | .bus_num = 0, |
| 278 | .chip_select = 1, |
| 279 | .mode = SPI_MODE_3, |
| 280 | }, |
| 281 | }; |
| 282 | |
| 283 | static struct ep93xx_spi_info vision_spi_master __initdata = { |
| 284 | .num_chipselect = ARRAY_SIZE(vision_spi_board_info), |
| 285 | }; |
| 286 | |
| 287 | /************************************************************************* |
| 288 | * Machine Initialization |
| 289 | *************************************************************************/ |
| 290 | static void __init vision_init_machine(void) |
| 291 | { |
| 292 | ep93xx_init_devices(); |
| 293 | ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_64M); |
| 294 | ep93xx_register_eth(&vision_eth_data, 1); |
| 295 | ep93xx_register_fb(&ep93xxfb_info); |
| 296 | ep93xx_register_pwm(1, 0); |
| 297 | |
| 298 | /* |
| 299 | * Request the gpio expander's interrupt gpio line now to prevent |
| 300 | * the kernel from doing a WARN in gpiolib:gpio_ensure_requested(). |
| 301 | */ |
| 302 | if (gpio_request_one(EP93XX_GPIO_LINE_F(7), GPIOF_DIR_IN, |
| 303 | "pca9539:74")) |
| 304 | pr_warn("cannot request interrupt gpio for pca9539:74\n"); |
| 305 | |
H Hartley Sweeten | e9c6c5d | 2012-02-08 09:53:44 -0700 | [diff] [blame] | 306 | vision_i2c_info[1].irq = gpio_to_irq(EP93XX_GPIO_LINE_F(7)); |
| 307 | |
Hartley Sweeten | 1cb17e2 | 2011-10-08 23:04:34 +0100 | [diff] [blame] | 308 | ep93xx_register_i2c(&vision_i2c_gpio_data, vision_i2c_info, |
| 309 | ARRAY_SIZE(vision_i2c_info)); |
| 310 | ep93xx_register_spi(&vision_spi_master, vision_spi_board_info, |
| 311 | ARRAY_SIZE(vision_spi_board_info)); |
| 312 | } |
| 313 | |
| 314 | MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307") |
| 315 | /* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */ |
Arnd Bergmann | a7fadac | 2011-10-31 23:58:06 +0100 | [diff] [blame] | 316 | .atag_offset = 0x100, |
Hartley Sweeten | 1cb17e2 | 2011-10-08 23:04:34 +0100 | [diff] [blame] | 317 | .map_io = vision_map_io, |
| 318 | .init_irq = ep93xx_init_irq, |
Stephen Warren | 6bb27d7 | 2012-11-08 12:40:59 -0700 | [diff] [blame] | 319 | .init_time = ep93xx_timer_init, |
Hartley Sweeten | 1cb17e2 | 2011-10-08 23:04:34 +0100 | [diff] [blame] | 320 | .init_machine = vision_init_machine, |
Shawn Guo | c914283 | 2012-04-26 10:05:15 +0800 | [diff] [blame] | 321 | .init_late = ep93xx_init_late, |
Russell King | 3275166 | 2011-11-05 09:54:14 +0000 | [diff] [blame] | 322 | .restart = ep93xx_restart, |
Hartley Sweeten | 1cb17e2 | 2011-10-08 23:04:34 +0100 | [diff] [blame] | 323 | MACHINE_END |