David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 1 | #ifndef _UAPI_ASM_X86_SIGCONTEXT_H |
| 2 | #define _UAPI_ASM_X86_SIGCONTEXT_H |
| 3 | |
Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 4 | /* |
| 5 | * Linux signal context definitions. The sigcontext includes a complex hierarchy of CPU |
| 6 | * and FPU state, available to user-space (on the stack) when a signal handler is |
| 7 | * executed. |
| 8 | * |
| 9 | * As over the years this ABI grew from its very simple roots towards supporting more and |
| 10 | * more CPU state organically, some of the details (which were rather clever hacks back |
| 11 | * in the days) became a bit quirky by today. |
| 12 | * |
| 13 | * The current ABI includes flexible provisions for future extensions, so we won't have |
| 14 | * to grow new quirks for quite some time. Promise! |
| 15 | */ |
| 16 | |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 17 | #include <linux/compiler.h> |
| 18 | #include <linux/types.h> |
| 19 | |
Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 20 | #define FP_XSTATE_MAGIC1 0x46505853U |
| 21 | #define FP_XSTATE_MAGIC2 0x46505845U |
| 22 | #define FP_XSTATE_MAGIC2_SIZE sizeof(FP_XSTATE_MAGIC2) |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 23 | |
| 24 | /* |
Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 25 | * Bytes 464..511 in the current 512-byte layout of the FXSAVE/FXRSTOR frame |
| 26 | * are reserved for SW usage. On CPUs supporting XSAVE/XRSTOR, these bytes |
| 27 | * are used to extend the fpstate pointer in the sigcontext, which now |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 28 | * includes the extended state information along with fpstate information. |
| 29 | * |
Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 30 | * If sw_reserved.magic1 == FP_XSTATE_MAGIC1 then there's a sw_reserved.extended_size |
| 31 | * bytes large extended context area present. (The last 32-bit word of this extended |
| 32 | * area (at the fpstate+extended_size-FP_XSTATE_MAGIC2_SIZE address) is set to |
| 33 | * FP_XSTATE_MAGIC2 so that you can sanity check your size calculations.) |
| 34 | * |
| 35 | * This extended area typically grows with newer CPUs that have larger and larger |
| 36 | * XSAVE areas. |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 37 | */ |
| 38 | struct _fpx_sw_bytes { |
Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 39 | /* If set to FP_XSTATE_MAGIC1 then this is an xstate context. 0 if a legacy frame. */ |
| 40 | __u32 magic1; |
| 41 | |
| 42 | /* |
| 43 | * Total size of the fpstate area: |
| 44 | * |
| 45 | * - if magic1 == 0 then it's sizeof(struct _fpstate) |
| 46 | * - if magic1 == FP_XSTATE_MAGIC1 then it's sizeof(struct _xstate) plus extensions (if any) |
| 47 | */ |
| 48 | __u32 extended_size; |
| 49 | |
| 50 | /* |
| 51 | * Feature bit mask (including FP/SSE/extended state) that is present |
| 52 | * in the memory layout: |
| 53 | */ |
| 54 | __u64 xfeatures; |
| 55 | |
| 56 | /* |
| 57 | * Actual XSAVE state size, based on the xfeatures saved in the layout. |
| 58 | * 'extended_size' is greater than 'xstate_size': |
| 59 | */ |
| 60 | __u32 xstate_size; |
| 61 | |
| 62 | /* For future use: */ |
| 63 | __u32 padding[7]; |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 64 | }; |
| 65 | |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 66 | /* |
Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 67 | * As documented in the iBCS2 standard: |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 68 | * |
| 69 | * The first part of "struct _fpstate" is just the normal i387 |
| 70 | * hardware setup, the extra "status" word is used to save the |
| 71 | * coprocessor status word before entering the handler. |
| 72 | * |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 73 | * The FPU state data structure has had to grow to accommodate the |
| 74 | * extended FPU state required by the Streaming SIMD Extensions. |
| 75 | * There is no documented standard to accomplish this at the moment. |
| 76 | */ |
Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 77 | |
| 78 | /* 10-byte legacy floating point register: */ |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 79 | struct _fpreg { |
Ingo Molnar | 3f623a5 | 2015-09-05 09:32:33 +0200 | [diff] [blame] | 80 | __u16 significand[4]; |
| 81 | __u16 exponent; |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 82 | }; |
| 83 | |
Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 84 | /* 16-byte floating point register: */ |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 85 | struct _fpxreg { |
Ingo Molnar | 3f623a5 | 2015-09-05 09:32:33 +0200 | [diff] [blame] | 86 | __u16 significand[4]; |
| 87 | __u16 exponent; |
| 88 | __u16 padding[3]; |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 89 | }; |
| 90 | |
Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 91 | /* 16-byte XMM register: */ |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 92 | struct _xmmreg { |
Ingo Molnar | 3f623a5 | 2015-09-05 09:32:33 +0200 | [diff] [blame] | 93 | __u32 element[4]; |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 94 | }; |
| 95 | |
Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 96 | #define X86_FXSR_MAGIC 0x0000 |
| 97 | |
Ingo Molnar | 7bb0dc2 | 2015-09-05 09:32:35 +0200 | [diff] [blame] | 98 | /* |
| 99 | * The 32-bit FPU frame: |
| 100 | */ |
| 101 | struct _fpstate_32 { |
Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 102 | /* Legacy FPU environment: */ |
Ingo Molnar | 3f623a5 | 2015-09-05 09:32:33 +0200 | [diff] [blame] | 103 | __u32 cw; |
| 104 | __u32 sw; |
| 105 | __u32 tag; |
| 106 | __u32 ipoff; |
| 107 | __u32 cssel; |
| 108 | __u32 dataoff; |
| 109 | __u32 datasel; |
Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 110 | struct _fpreg _st[8]; |
Ingo Molnar | 3f623a5 | 2015-09-05 09:32:33 +0200 | [diff] [blame] | 111 | __u16 status; |
| 112 | __u16 magic; /* 0xffff: regular FPU data only */ |
Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 113 | /* 0x0000: FXSR FPU data */ |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 114 | |
| 115 | /* FXSR FPU environment */ |
Ingo Molnar | 3f623a5 | 2015-09-05 09:32:33 +0200 | [diff] [blame] | 116 | __u32 _fxsr_env[6]; /* FXSR FPU env is ignored */ |
| 117 | __u32 mxcsr; |
| 118 | __u32 reserved; |
Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 119 | struct _fpxreg _fxsr_st[8]; /* FXSR FPU reg data is ignored */ |
| 120 | struct _xmmreg _xmm[8]; /* First 8 XMM registers */ |
Ingo Molnar | 7bb0dc2 | 2015-09-05 09:32:35 +0200 | [diff] [blame] | 121 | union { |
| 122 | __u32 padding1[44]; /* Second 8 XMM registers plus padding */ |
| 123 | __u32 padding[44]; /* Alias name for old user-space */ |
| 124 | }; |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 125 | |
| 126 | union { |
Ingo Molnar | 3f623a5 | 2015-09-05 09:32:33 +0200 | [diff] [blame] | 127 | __u32 padding2[12]; |
Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 128 | struct _fpx_sw_bytes sw_reserved; /* Potential extended state is encoded here */ |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 129 | }; |
| 130 | }; |
| 131 | |
Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 132 | /* |
Ingo Molnar | 7bb0dc2 | 2015-09-05 09:32:35 +0200 | [diff] [blame] | 133 | * The 64-bit FPU frame. (FXSAVE format and later) |
Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 134 | * |
| 135 | * Note1: If sw_reserved.magic1 == FP_XSTATE_MAGIC1 then the structure is |
| 136 | * larger: 'struct _xstate'. Note that 'struct _xstate' embedds |
| 137 | * 'struct _fpstate' so that you can always assume the _fpstate portion |
| 138 | * exists so that you can check the magic value. |
| 139 | * |
| 140 | * Note2: Reserved fields may someday contain valuable data. Always save/restore |
| 141 | * them when you change signal frames. |
| 142 | */ |
Ingo Molnar | 7bb0dc2 | 2015-09-05 09:32:35 +0200 | [diff] [blame] | 143 | struct _fpstate_64 { |
Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 144 | __u16 cwd; |
| 145 | __u16 swd; |
| 146 | /* Note this is not the same as the 32-bit/x87/FSAVE twd: */ |
| 147 | __u16 twd; |
| 148 | __u16 fop; |
| 149 | __u64 rip; |
| 150 | __u64 rdp; |
| 151 | __u32 mxcsr; |
| 152 | __u32 mxcsr_mask; |
| 153 | __u32 st_space[32]; /* 8x FP registers, 16 bytes each */ |
| 154 | __u32 xmm_space[64]; /* 16x XMM registers, 16 bytes each */ |
| 155 | __u32 reserved2[12]; |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 156 | union { |
Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 157 | __u32 reserved3[12]; |
| 158 | struct _fpx_sw_bytes sw_reserved; /* Potential extended state is encoded here */ |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 159 | }; |
| 160 | }; |
| 161 | |
Ingo Molnar | 7bb0dc2 | 2015-09-05 09:32:35 +0200 | [diff] [blame] | 162 | #ifdef __i386__ |
| 163 | # define _fpstate _fpstate_32 |
| 164 | #else |
| 165 | # define _fpstate _fpstate_64 |
| 166 | #endif |
| 167 | |
Ingo Molnar | 128f825 | 2015-09-05 09:32:32 +0200 | [diff] [blame] | 168 | struct _header { |
| 169 | __u64 xfeatures; |
| 170 | __u64 reserved1[2]; |
| 171 | __u64 reserved2[5]; |
| 172 | }; |
| 173 | |
| 174 | struct _ymmh_state { |
| 175 | /* 16x YMM registers, 16 bytes each: */ |
| 176 | __u32 ymmh_space[64]; |
| 177 | }; |
| 178 | |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 179 | /* |
Ingo Molnar | 128f825 | 2015-09-05 09:32:32 +0200 | [diff] [blame] | 180 | * Extended state pointed to by sigcontext::fpstate. |
| 181 | * |
| 182 | * In addition to the fpstate, information encoded in _xstate::xstate_hdr |
| 183 | * indicates the presence of other extended state information supported |
| 184 | * by the CPU and kernel: |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 185 | */ |
Ingo Molnar | 128f825 | 2015-09-05 09:32:32 +0200 | [diff] [blame] | 186 | struct _xstate { |
| 187 | struct _fpstate fpstate; |
| 188 | struct _header xstate_hdr; |
| 189 | struct _ymmh_state ymmh; |
| 190 | /* New processor state extensions go here: */ |
| 191 | }; |
| 192 | |
Ingo Molnar | f2c609b | 2015-09-05 09:32:38 +0200 | [diff] [blame] | 193 | struct sigcontext_32 { |
| 194 | __u16 gs, __gsh; |
| 195 | __u16 fs, __fsh; |
| 196 | __u16 es, __esh; |
| 197 | __u16 ds, __dsh; |
| 198 | __u32 di; |
| 199 | __u32 si; |
| 200 | __u32 bp; |
| 201 | __u32 sp; |
| 202 | __u32 bx; |
| 203 | __u32 dx; |
| 204 | __u32 cx; |
| 205 | __u32 ax; |
| 206 | __u32 trapno; |
| 207 | __u32 err; |
| 208 | __u32 ip; |
| 209 | __u16 cs, __csh; |
| 210 | __u32 flags; |
| 211 | __u32 sp_at_signal; |
| 212 | __u16 ss, __ssh; |
| 213 | |
| 214 | /* |
| 215 | * fpstate is really (struct _fpstate *) or (struct _xstate *) |
| 216 | * depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved |
| 217 | * bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end |
| 218 | * of extended memory layout. See comments at the definition of |
| 219 | * (struct _fpx_sw_bytes) |
| 220 | */ |
Ingo Molnar | 530e5c8 | 2015-09-05 09:32:39 +0200 | [diff] [blame^] | 221 | __u32 fpstate; /* Zero when no FPU/extended context */ |
Ingo Molnar | f2c609b | 2015-09-05 09:32:38 +0200 | [diff] [blame] | 222 | __u32 oldmask; |
| 223 | __u32 cr2; |
| 224 | }; |
| 225 | |
| 226 | struct sigcontext_64 { |
| 227 | __u64 r8; |
| 228 | __u64 r9; |
| 229 | __u64 r10; |
| 230 | __u64 r11; |
| 231 | __u64 r12; |
| 232 | __u64 r13; |
| 233 | __u64 r14; |
| 234 | __u64 r15; |
| 235 | __u64 di; |
| 236 | __u64 si; |
| 237 | __u64 bp; |
| 238 | __u64 bx; |
| 239 | __u64 dx; |
| 240 | __u64 ax; |
| 241 | __u64 cx; |
| 242 | __u64 sp; |
| 243 | __u64 ip; |
| 244 | __u64 flags; |
| 245 | __u16 cs; |
| 246 | __u16 gs; |
| 247 | __u16 fs; |
| 248 | __u16 __pad0; |
| 249 | __u64 err; |
| 250 | __u64 trapno; |
| 251 | __u64 oldmask; |
| 252 | __u64 cr2; |
| 253 | |
| 254 | /* |
| 255 | * fpstate is really (struct _fpstate *) or (struct _xstate *) |
| 256 | * depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved |
| 257 | * bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end |
| 258 | * of extended memory layout. See comments at the definition of |
| 259 | * (struct _fpx_sw_bytes) |
| 260 | */ |
Ingo Molnar | 530e5c8 | 2015-09-05 09:32:39 +0200 | [diff] [blame^] | 261 | __u64 fpstate; /* Zero when no FPU/extended context */ |
Ingo Molnar | f2c609b | 2015-09-05 09:32:38 +0200 | [diff] [blame] | 262 | __u64 reserved1[8]; |
| 263 | }; |
| 264 | |
| 265 | /* |
| 266 | * Create the real 'struct sigcontext' type: |
| 267 | */ |
| 268 | #ifdef __KERNEL__ |
| 269 | # ifdef __i386__ |
| 270 | # define sigcontext sigcontext_32 |
| 271 | # else |
| 272 | # define sigcontext sigcontext_64 |
| 273 | # endif |
| 274 | #endif |
| 275 | |
Ingo Molnar | 128f825 | 2015-09-05 09:32:32 +0200 | [diff] [blame] | 276 | /* |
| 277 | * The old user-space sigcontext definition, just in case user-space still |
| 278 | * relies on it. The kernel definition (in asm/sigcontext.h) has unified |
| 279 | * field names but otherwise the same layout. |
| 280 | */ |
| 281 | #ifndef __KERNEL__ |
Ingo Molnar | 86e9fc3 | 2015-09-05 09:32:36 +0200 | [diff] [blame] | 282 | |
| 283 | #define _fpstate_ia32 _fpstate_32 |
| 284 | |
Ingo Molnar | 128f825 | 2015-09-05 09:32:32 +0200 | [diff] [blame] | 285 | # ifdef __i386__ |
| 286 | struct sigcontext { |
Ingo Molnar | 3f623a5 | 2015-09-05 09:32:33 +0200 | [diff] [blame] | 287 | __u16 gs, __gsh; |
| 288 | __u16 fs, __fsh; |
| 289 | __u16 es, __esh; |
| 290 | __u16 ds, __dsh; |
| 291 | __u32 edi; |
| 292 | __u32 esi; |
| 293 | __u32 ebp; |
| 294 | __u32 esp; |
| 295 | __u32 ebx; |
| 296 | __u32 edx; |
| 297 | __u32 ecx; |
| 298 | __u32 eax; |
| 299 | __u32 trapno; |
| 300 | __u32 err; |
| 301 | __u32 eip; |
| 302 | __u16 cs, __csh; |
| 303 | __u32 eflags; |
| 304 | __u32 esp_at_signal; |
| 305 | __u16 ss, __ssh; |
Ingo Molnar | 128f825 | 2015-09-05 09:32:32 +0200 | [diff] [blame] | 306 | struct _fpstate __user *fpstate; |
Ingo Molnar | 3f623a5 | 2015-09-05 09:32:33 +0200 | [diff] [blame] | 307 | __u32 oldmask; |
| 308 | __u32 cr2; |
Ingo Molnar | 128f825 | 2015-09-05 09:32:32 +0200 | [diff] [blame] | 309 | }; |
| 310 | # else /* __x86_64__: */ |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 311 | struct sigcontext { |
Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 312 | __u64 r8; |
| 313 | __u64 r9; |
| 314 | __u64 r10; |
| 315 | __u64 r11; |
| 316 | __u64 r12; |
| 317 | __u64 r13; |
| 318 | __u64 r14; |
| 319 | __u64 r15; |
| 320 | __u64 rdi; |
| 321 | __u64 rsi; |
| 322 | __u64 rbp; |
| 323 | __u64 rbx; |
| 324 | __u64 rdx; |
| 325 | __u64 rax; |
| 326 | __u64 rcx; |
| 327 | __u64 rsp; |
| 328 | __u64 rip; |
| 329 | __u64 eflags; /* RFLAGS */ |
| 330 | __u16 cs; |
| 331 | __u16 gs; |
| 332 | __u16 fs; |
| 333 | __u16 __pad0; |
| 334 | __u64 err; |
| 335 | __u64 trapno; |
| 336 | __u64 oldmask; |
| 337 | __u64 cr2; |
| 338 | struct _fpstate __user *fpstate; /* Zero when no FPU context */ |
| 339 | # ifdef __ILP32__ |
| 340 | __u32 __fpstate_pad; |
| 341 | # endif |
| 342 | __u64 reserved1[8]; |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 343 | }; |
Ingo Molnar | 128f825 | 2015-09-05 09:32:32 +0200 | [diff] [blame] | 344 | # endif /* __x86_64__ */ |
| 345 | #endif /* !__KERNEL__ */ |
David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 346 | |
| 347 | #endif /* _UAPI_ASM_X86_SIGCONTEXT_H */ |