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Peter Ujfalusi3f187f82012-07-26 17:01:32 +03001/*
2 * Device Tree Source for OMAP2420 SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
Florian Vaussard98ef79572013-05-31 14:32:55 +020011#include "omap2.dtsi"
Peter Ujfalusi3f187f82012-07-26 17:01:32 +030012
13/ {
14 compatible = "ti,omap2420", "ti,omap2";
15
16 ocp {
Tero Kristo72b10ac2015-02-12 10:38:16 +020017 l4: l4@48000000 {
18 compatible = "ti,omap2-l4", "simple-bus";
Tony Lindgren679e3312012-09-10 10:34:51 -070019 #address-cells = <1>;
Tero Kristo72b10ac2015-02-12 10:38:16 +020020 #size-cells = <1>;
21 ranges = <0 0x48000000 0x100000>;
22
23 prcm: prcm@8000 {
24 compatible = "ti,omap2-prcm";
25 reg = <0x8000 0x1000>;
26
27 prcm_clocks: clocks {
28 #address-cells = <1>;
29 #size-cells = <0>;
30 };
31
32 prcm_clockdomains: clockdomains {
33 };
34 };
35
36 scm: scm@0 {
37 compatible = "ti,omap2-scm", "simple-bus";
38 reg = <0x0 0x1000>;
39 #address-cells = <1>;
40 #size-cells = <1>;
41 ranges = <0 0x0 0x1000>;
42
43 omap2420_pmx: pinmux@30 {
44 compatible = "ti,omap2420-padconf",
45 "pinctrl-single";
46 reg = <0x30 0x0113>;
47 #address-cells = <1>;
48 #size-cells = <0>;
49 pinctrl-single,register-width = <8>;
50 pinctrl-single,function-mask = <0x3f>;
51 };
52
53 scm_conf: scm_conf@270 {
54 compatible = "syscon";
55 reg = <0x270 0x100>;
56 #address-cells = <1>;
57 #size-cells = <1>;
58
59 scm_clocks: clocks {
60 #address-cells = <1>;
61 #size-cells = <0>;
62 };
63 };
64
65 scm_clockdomains: clockdomains {
66 };
67 };
68
69 counter32k: counter@4000 {
70 compatible = "ti,omap-counter32k";
71 reg = <0x4000 0x20>;
72 ti,hwmods = "counter_32k";
73 };
Tony Lindgren679e3312012-09-10 10:34:51 -070074 };
75
Jon Hunter423182e2013-02-28 15:32:00 -060076 gpio1: gpio@48018000 {
77 compatible = "ti,omap2-gpio";
78 reg = <0x48018000 0x200>;
79 interrupts = <29>;
80 ti,hwmods = "gpio1";
Jon Huntere4b9b9f2013-04-04 15:16:16 -050081 ti,gpio-always-on;
Jon Hunter423182e2013-02-28 15:32:00 -060082 #gpio-cells = <2>;
83 gpio-controller;
84 #interrupt-cells = <2>;
85 interrupt-controller;
86 };
87
88 gpio2: gpio@4801a000 {
89 compatible = "ti,omap2-gpio";
90 reg = <0x4801a000 0x200>;
91 interrupts = <30>;
92 ti,hwmods = "gpio2";
Jon Huntere4b9b9f2013-04-04 15:16:16 -050093 ti,gpio-always-on;
Jon Hunter423182e2013-02-28 15:32:00 -060094 #gpio-cells = <2>;
95 gpio-controller;
96 #interrupt-cells = <2>;
97 interrupt-controller;
98 };
99
100 gpio3: gpio@4801c000 {
101 compatible = "ti,omap2-gpio";
102 reg = <0x4801c000 0x200>;
103 interrupts = <31>;
104 ti,hwmods = "gpio3";
Jon Huntere4b9b9f2013-04-04 15:16:16 -0500105 ti,gpio-always-on;
Jon Hunter423182e2013-02-28 15:32:00 -0600106 #gpio-cells = <2>;
107 gpio-controller;
108 #interrupt-cells = <2>;
109 interrupt-controller;
110 };
111
112 gpio4: gpio@4801e000 {
113 compatible = "ti,omap2-gpio";
114 reg = <0x4801e000 0x200>;
115 interrupts = <32>;
116 ti,hwmods = "gpio4";
Jon Huntere4b9b9f2013-04-04 15:16:16 -0500117 ti,gpio-always-on;
Jon Hunter423182e2013-02-28 15:32:00 -0600118 #gpio-cells = <2>;
119 gpio-controller;
120 #interrupt-cells = <2>;
121 interrupt-controller;
122 };
123
Jon Hunter1c7dbb52013-02-22 15:33:31 -0600124 gpmc: gpmc@6800a000 {
125 compatible = "ti,omap2420-gpmc";
126 reg = <0x6800a000 0x1000>;
127 #address-cells = <2>;
128 #size-cells = <1>;
129 interrupts = <20>;
130 gpmc,num-cs = <8>;
131 gpmc,num-waitpins = <4>;
132 ti,hwmods = "gpmc";
Roger Quadrosffee5bf2016-04-07 13:25:28 +0300133 interrupt-controller;
134 #interrupt-cells = <2>;
135 gpio-controller;
136 #gpio-cells = <2>;
Jon Hunter1c7dbb52013-02-22 15:33:31 -0600137 };
138
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300139 mcbsp1: mcbsp@48074000 {
140 compatible = "ti,omap2420-mcbsp";
141 reg = <0x48074000 0xff>;
142 reg-names = "mpu";
143 interrupts = <59>, /* TX interrupt */
144 <60>; /* RX interrupt */
145 interrupt-names = "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300146 ti,hwmods = "mcbsp1";
Sebastien Guiriec4e4ead72013-03-11 08:50:21 +0100147 dmas = <&sdma 31>,
148 <&sdma 32>;
149 dma-names = "tx", "rx";
Peter Ujfalusifaa00de2014-01-24 10:19:06 +0200150 status = "disabled";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300151 };
152
153 mcbsp2: mcbsp@48076000 {
154 compatible = "ti,omap2420-mcbsp";
155 reg = <0x48076000 0xff>;
156 reg-names = "mpu";
157 interrupts = <62>, /* TX interrupt */
158 <63>; /* RX interrupt */
159 interrupt-names = "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300160 ti,hwmods = "mcbsp2";
Sebastien Guiriec4e4ead72013-03-11 08:50:21 +0100161 dmas = <&sdma 33>,
162 <&sdma 34>;
163 dma-names = "tx", "rx";
Peter Ujfalusifaa00de2014-01-24 10:19:06 +0200164 status = "disabled";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300165 };
Jon Hunterfab8ad02012-10-19 09:59:00 -0500166
Tony Lindgren467f4bd2013-11-14 15:25:09 -0800167 msdi1: mmc@4809c000 {
168 compatible = "ti,omap2420-mmc";
169 ti,hwmods = "msdi1";
170 reg = <0x4809c000 0x80>;
171 interrupts = <83>;
172 dmas = <&sdma 61 &sdma 62>;
173 dma-names = "tx", "rx";
174 };
175
Suman Anna4fe5bd52014-04-22 17:23:36 -0500176 mailbox: mailbox@48094000 {
177 compatible = "ti,omap2-mailbox";
178 reg = <0x48094000 0x200>;
179 interrupts = <26>, <34>;
180 interrupt-names = "dsp", "iva";
181 ti,hwmods = "mailbox";
Suman Anna24df0452014-11-03 17:07:35 -0600182 #mbox-cells = <1>;
Suman Anna41ffada2014-07-11 16:44:34 -0500183 ti,mbox-num-users = <4>;
184 ti,mbox-num-fifos = <6>;
Suman Annad27704d2014-09-10 14:27:23 -0500185 mbox_dsp: dsp {
186 ti,mbox-tx = <0 0 0>;
187 ti,mbox-rx = <1 0 0>;
188 };
189 mbox_iva: iva {
190 ti,mbox-tx = <2 1 3>;
191 ti,mbox-rx = <3 1 3>;
192 };
Suman Anna4fe5bd52014-04-22 17:23:36 -0500193 };
194
Jon Hunterfab8ad02012-10-19 09:59:00 -0500195 timer1: timer@48028000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500196 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500197 reg = <0x48028000 0x400>;
198 interrupts = <37>;
199 ti,hwmods = "timer1";
200 ti,timer-alwon;
201 };
Tony Lindgren467f4bd2013-11-14 15:25:09 -0800202
203 wd_timer2: wdt@48022000 {
204 compatible = "ti,omap2-wdt";
205 ti,hwmods = "wd_timer2";
206 reg = <0x48022000 0x80>;
207 };
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300208 };
209};
Tony Lindgren467f4bd2013-11-14 15:25:09 -0800210
211&i2c1 {
212 compatible = "ti,omap2420-i2c";
213};
214
215&i2c2 {
216 compatible = "ti,omap2420-i2c";
217};
Tero Kristo69a1e7a2014-02-24 18:51:05 +0200218
219/include/ "omap24xx-clocks.dtsi"
220/include/ "omap2420-clocks.dtsi"