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Martyn Welch54508212008-09-16 10:57:47 +01001/*
Martyn Welch948e78c2010-03-01 14:41:59 +00002 * GE SBC610 Device Tree Source
Martyn Welch54508212008-09-16 10:57:47 +01003 *
Martyn Welch948e78c2010-03-01 14:41:59 +00004 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
Martyn Welch54508212008-09-16 10:57:47 +01005 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * Based on: SBS CM6 Device Tree Source
12 * Copyright 2007 SBS Technologies GmbH & Co. KG
13 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 */
16
17/*
18 * Compiled with dtc -I dts -O dtb -o gef_sbc610.dtb gef_sbc610.dts
19 */
20
Alessio Igor Bogani334479d2016-03-04 11:09:11 +010021/include/ "mpc8641si-pre.dtsi"
Martyn Welch54508212008-09-16 10:57:47 +010022
23/ {
24 model = "GEF_SBC610";
25 compatible = "gef,sbc610";
Martyn Welch54508212008-09-16 10:57:47 +010026
27 memory {
28 device_type = "memory";
29 reg = <0x0 0x40000000>; // set by uboot
30 };
31
Alessio Igor Bogani334479d2016-03-04 11:09:11 +010032 lbc: localbus@fef05000 {
Martyn Welchac4dff22009-02-27 15:53:10 +000033 reg = <0xfef05000 0x1000>;
Martyn Welch3a470242008-10-01 09:32:39 +010034
Martyn Welchae1f7552010-01-11 12:23:31 +000035 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
36 1 0 0xe8000000 0x08000000 // Paged Flash 0
37 2 0 0xe0000000 0x08000000 // Paged Flash 1
38 3 0 0xfc100000 0x00020000 // NVRAM
39 4 0 0xfc000000 0x00008000 // FPGA
40 5 0 0xfc008000 0x00008000 // AFIX FPGA
41 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
42 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
43
44 /* flash@0,0 is a mirror of part of the memory in flash@1,0
45 flash@0,0 {
46 compatible = "gef,sbc610-firmware-mirror", "cfi-flash";
47 reg = <0x0 0x0 0x1000000>;
48 bank-width = <4>;
49 device-width = <2>;
50 #address-cells = <1>;
51 #size-cells = <1>;
52 partition@0 {
53 label = "firmware";
54 reg = <0x0 0x1000000>;
55 read-only;
56 };
57 };
58 */
59
60 flash@1,0 {
61 compatible = "gef,sbc610-paged-flash", "cfi-flash";
62 reg = <0x1 0x0 0x8000000>;
63 bank-width = <4>;
64 device-width = <2>;
65 #address-cells = <1>;
66 #size-cells = <1>;
67 partition@0 {
68 label = "user";
69 reg = <0x0 0x7800000>;
70 };
71 partition@7800000 {
72 label = "firmware";
73 reg = <0x7800000 0x800000>;
74 read-only;
75 };
76 };
Martyn Welch3a470242008-10-01 09:32:39 +010077
Martyn Welch0d81df82009-07-02 17:12:31 +010078 nvram@3,0 {
79 device_type = "nvram";
80 compatible = "simtek,stk14ca8";
81 reg = <0x3 0x0 0x20000>;
82 };
83
Martyn Welch66758472008-10-13 16:16:45 +010084 fpga@4,0 {
85 compatible = "gef,fpga-regs";
86 reg = <0x4 0x0 0x40>;
87 };
Martyn Welch6ec9eae2008-11-10 12:31:33 +000088
89 wdt@4,2000 {
90 compatible = "gef,fpga-wdt";
91 reg = <0x4 0x2000 0x8>;
92 interrupts = <0x1a 0x4>;
93 interrupt-parent = <&gef_pic>;
94 };
95 /* Second watchdog available, driver currently supports one.
96 wdt@4,2010 {
97 compatible = "gef,fpga-wdt";
98 reg = <0x4 0x2010 0x8>;
99 interrupts = <0x1b 0x4>;
100 interrupt-parent = <&gef_pic>;
101 };
102 */
Martyn Welch3a470242008-10-01 09:32:39 +0100103 gef_pic: pic@4,4000 {
104 #interrupt-cells = <1>;
105 interrupt-controller;
106 compatible = "gef,fpga-pic";
107 reg = <0x4 0x4000 0x20>;
Alessio Igor Bogani595207b2016-03-04 11:09:10 +0100108 interrupts = <0x8 0x9 0 0>;
Martyn Welch3a470242008-10-01 09:32:39 +0100109
110 };
Martyn Welch965dc5f2008-11-07 14:15:42 +0000111 gef_gpio: gpio@7,14000 {
112 #gpio-cells = <2>;
113 compatible = "gef,sbc610-gpio";
114 reg = <0x7 0x14000 0x24>;
115 gpio-controller;
116 };
Martyn Welch3a470242008-10-01 09:32:39 +0100117 };
118
Alessio Igor Bogani334479d2016-03-04 11:09:11 +0100119 soc: soc@fef00000 {
Martyn Welch54508212008-09-16 10:57:47 +0100120 ranges = <0x0 0xfef00000 0x00100000>;
Kumar Galada385782009-04-27 11:02:16 -0500121
Alessio Igor Bogani595207b2016-03-04 11:09:10 +0100122 i2c@3000 {
Martyn Welch7a5c62f2009-05-19 10:40:57 +0100123 hwmon@48 {
124 compatible = "national,lm92";
125 reg = <0x48>;
126 };
127
128 hwmon@4c {
129 compatible = "adi,adt7461";
130 reg = <0x4c>;
131 };
132
Martyn Welchd3a8cda2008-11-20 08:52:09 +0000133 rtc@51 {
134 compatible = "epson,rx8581";
135 reg = <0x00000051>;
136 };
137
Martyn Welch54508212008-09-16 10:57:47 +0100138 eti@6b {
139 compatible = "dallas,ds1682";
140 reg = <0x6b>;
141 };
142 };
143
Martyn Welch54508212008-09-16 10:57:47 +0100144 enet0: ethernet@24000 {
Martyn Welch62f3de92011-11-03 17:37:47 +0000145 tbi-handle = <&tbi0>;
Martyn Welch54508212008-09-16 10:57:47 +0100146 phy-handle = <&phy0>;
147 phy-connection-type = "gmii";
Alessio Igor Bogani334479d2016-03-04 11:09:11 +0100148 };
Anton Vorontsovd8bc55f2009-03-19 21:01:51 +0300149
Alessio Igor Bogani334479d2016-03-04 11:09:11 +0100150 mdio@24520 {
151 phy0: ethernet-phy@0 {
152 interrupt-parent = <&gef_pic>;
153 interrupts = <0x9 0x4>;
154 reg = <1>;
155 };
156 phy2: ethernet-phy@2 {
157 interrupt-parent = <&gef_pic>;
158 interrupts = <0x8 0x4>;
159 reg = <3>;
160 };
161 tbi0: tbi-phy@11 {
162 reg = <0x11>;
163 device_type = "tbi-phy";
Anton Vorontsovd8bc55f2009-03-19 21:01:51 +0300164 };
Martyn Welch54508212008-09-16 10:57:47 +0100165 };
166
167 enet1: ethernet@26000 {
Martyn Welch62f3de92011-11-03 17:37:47 +0000168 tbi-handle = <&tbi2>;
Martyn Welch54508212008-09-16 10:57:47 +0100169 phy-handle = <&phy2>;
170 phy-connection-type = "gmii";
Alessio Igor Bogani334479d2016-03-04 11:09:11 +0100171 };
Martyn Welch62f3de92011-11-03 17:37:47 +0000172
Alessio Igor Bogani334479d2016-03-04 11:09:11 +0100173 mdio@26520 {
174 tbi2: tbi-phy@11 {
175 reg = <0x11>;
176 device_type = "tbi-phy";
Martyn Welch62f3de92011-11-03 17:37:47 +0000177 };
Martyn Welch54508212008-09-16 10:57:47 +0100178 };
179
Alessio Igor Bogani334479d2016-03-04 11:09:11 +0100180 enet2: ethernet@25000 {
181 status = "disabled";
Martyn Welch54508212008-09-16 10:57:47 +0100182 };
183
Alessio Igor Bogani334479d2016-03-04 11:09:11 +0100184 mdio@25520 {
185 status = "disabled";
Martyn Welch54508212008-09-16 10:57:47 +0100186 };
187
Alessio Igor Bogani334479d2016-03-04 11:09:11 +0100188 enet3: ethernet@27000 {
189 status = "disabled";
Martyn Welch54508212008-09-16 10:57:47 +0100190 };
191
Alessio Igor Bogani334479d2016-03-04 11:09:11 +0100192 mdio@27520 {
193 status = "disabled";
Martyn Welch54508212008-09-16 10:57:47 +0100194 };
195 };
196
197 pci0: pcie@fef08000 {
Martyn Welch54508212008-09-16 10:57:47 +0100198 reg = <0xfef08000 0x1000>;
Martyn Welch54508212008-09-16 10:57:47 +0100199 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
200 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
Martyn Welch54508212008-09-16 10:57:47 +0100201
202 pcie@0 {
Martyn Welch54508212008-09-16 10:57:47 +0100203 ranges = <0x02000000 0x0 0x80000000
204 0x02000000 0x0 0x80000000
205 0x0 0x40000000
206
207 0x01000000 0x0 0x00000000
208 0x01000000 0x0 0x00000000
209 0x0 0x00400000>;
210 };
211 };
Alessio Igor Bogania66639d2016-04-20 10:18:29 +0200212
213 pci1: pcie@fef09000 {
214 status = "disabled";
215 };
Martyn Welch54508212008-09-16 10:57:47 +0100216};
Alessio Igor Bogani334479d2016-03-04 11:09:11 +0100217
218/include/ "mpc8641si-post.dtsi"