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Jouni Malinenff1d2762005-05-12 22:54:16 -04001#ifndef HOSTAP_WLAN_H
2#define HOSTAP_WLAN_H
3
Adrian Bunk5fad5a22006-01-14 03:09:34 +01004#include <linux/wireless.h>
5#include <linux/netdevice.h>
Matthias Kaehlcke36230602007-07-30 07:40:04 +02006#include <linux/mutex.h>
Adrian Bunk5fad5a22006-01-14 03:09:34 +01007#include <net/iw_handler.h>
8
Jouni Malinenff1d2762005-05-12 22:54:16 -04009#include "hostap_config.h"
Jouni Malinenff1d2762005-05-12 22:54:16 -040010#include "hostap_common.h"
11
12#define MAX_PARM_DEVICES 8
13#define PARM_MIN_MAX "1-" __MODULE_STRING(MAX_PARM_DEVICES)
14#define DEF_INTS -1, -1, -1, -1, -1, -1, -1
15#define GET_INT_PARM(var,idx) var[var[idx] < 0 ? 0 : idx]
16
17
18/* Specific skb->protocol value that indicates that the packet already contains
19 * txdesc header.
20 * FIX: This might need own value that would be allocated especially for Prism2
21 * txdesc; ETH_P_CONTROL is commented as "Card specific control frames".
22 * However, these skb's should have only minimal path in the kernel side since
23 * prism2_send_mgmt() sends these with dev_queue_xmit() to prism2_tx(). */
24#define ETH_P_HOSTAP ETH_P_CONTROL
25
Jouni Malinenff1d2762005-05-12 22:54:16 -040026/* ARPHRD_IEEE80211_PRISM uses a bloated version of Prism2 RX frame header
27 * (from linux-wlan-ng) */
28struct linux_wlan_ng_val {
29 u32 did;
30 u16 status, len;
31 u32 data;
32} __attribute__ ((packed));
33
34struct linux_wlan_ng_prism_hdr {
35 u32 msgcode, msglen;
36 char devname[16];
37 struct linux_wlan_ng_val hosttime, mactime, channel, rssi, sq, signal,
38 noise, rate, istx, frmlen;
39} __attribute__ ((packed));
40
41struct linux_wlan_ng_cap_hdr {
42 u32 version;
43 u32 length;
44 u64 mactime;
45 u64 hosttime;
46 u32 phytype;
47 u32 channel;
48 u32 datarate;
49 u32 antenna;
50 u32 priority;
51 u32 ssi_type;
52 s32 ssi_signal;
53 s32 ssi_noise;
54 u32 preamble;
55 u32 encoding;
56} __attribute__ ((packed));
57
58#define LWNG_CAP_DID_BASE (4 | (1 << 6)) /* section 4, group 1 */
59#define LWNG_CAPHDR_VERSION 0x80211001
60
61struct hfa384x_rx_frame {
62 /* HFA384X RX frame descriptor */
63 u16 status; /* HFA384X_RX_STATUS_ flags */
64 u32 time; /* timestamp, 1 microsecond resolution */
65 u8 silence; /* 27 .. 154; seems to be 0 */
66 u8 signal; /* 27 .. 154 */
67 u8 rate; /* 10, 20, 55, or 110 */
68 u8 rxflow;
69 u32 reserved;
70
71 /* 802.11 */
72 u16 frame_control;
73 u16 duration_id;
74 u8 addr1[6];
75 u8 addr2[6];
76 u8 addr3[6];
77 u16 seq_ctrl;
78 u8 addr4[6];
79 u16 data_len;
80
81 /* 802.3 */
82 u8 dst_addr[6];
83 u8 src_addr[6];
84 u16 len;
85
86 /* followed by frame data; max 2304 bytes */
87} __attribute__ ((packed));
88
89
90struct hfa384x_tx_frame {
91 /* HFA384X TX frame descriptor */
92 u16 status; /* HFA384X_TX_STATUS_ flags */
93 u16 reserved1;
94 u16 reserved2;
95 u32 sw_support;
96 u8 retry_count; /* not yet implemented */
97 u8 tx_rate; /* Host AP only; 0 = firmware, or 10, 20, 55, 110 */
98 u16 tx_control; /* HFA384X_TX_CTRL_ flags */
99
100 /* 802.11 */
101 u16 frame_control; /* parts not used */
102 u16 duration_id;
103 u8 addr1[6];
104 u8 addr2[6]; /* filled by firmware */
105 u8 addr3[6];
106 u16 seq_ctrl; /* filled by firmware */
107 u8 addr4[6];
108 u16 data_len;
109
110 /* 802.3 */
111 u8 dst_addr[6];
112 u8 src_addr[6];
113 u16 len;
114
115 /* followed by frame data; max 2304 bytes */
116} __attribute__ ((packed));
117
118
119struct hfa384x_rid_hdr
120{
121 u16 len;
122 u16 rid;
123} __attribute__ ((packed));
124
125
126/* Macro for converting signal levels (range 27 .. 154) to wireless ext
127 * dBm value with some accuracy */
128#define HFA384X_LEVEL_TO_dBm(v) 0x100 + (v) * 100 / 255 - 100
129
130#define HFA384X_LEVEL_TO_dBm_sign(v) (v) * 100 / 255 - 100
131
132struct hfa384x_scan_request {
133 u16 channel_list;
134 u16 txrate; /* HFA384X_RATES_* */
135} __attribute__ ((packed));
136
137struct hfa384x_hostscan_request {
138 u16 channel_list;
139 u16 txrate;
140 u16 target_ssid_len;
141 u8 target_ssid[32];
142} __attribute__ ((packed));
143
144struct hfa384x_join_request {
145 u8 bssid[6];
146 u16 channel;
147} __attribute__ ((packed));
148
149struct hfa384x_info_frame {
150 u16 len;
151 u16 type;
152} __attribute__ ((packed));
153
154struct hfa384x_comm_tallies {
155 u16 tx_unicast_frames;
156 u16 tx_multicast_frames;
157 u16 tx_fragments;
158 u16 tx_unicast_octets;
159 u16 tx_multicast_octets;
160 u16 tx_deferred_transmissions;
161 u16 tx_single_retry_frames;
162 u16 tx_multiple_retry_frames;
163 u16 tx_retry_limit_exceeded;
164 u16 tx_discards;
165 u16 rx_unicast_frames;
166 u16 rx_multicast_frames;
167 u16 rx_fragments;
168 u16 rx_unicast_octets;
169 u16 rx_multicast_octets;
170 u16 rx_fcs_errors;
171 u16 rx_discards_no_buffer;
172 u16 tx_discards_wrong_sa;
173 u16 rx_discards_wep_undecryptable;
174 u16 rx_message_in_msg_fragments;
175 u16 rx_message_in_bad_msg_fragments;
176} __attribute__ ((packed));
177
178struct hfa384x_comm_tallies32 {
179 u32 tx_unicast_frames;
180 u32 tx_multicast_frames;
181 u32 tx_fragments;
182 u32 tx_unicast_octets;
183 u32 tx_multicast_octets;
184 u32 tx_deferred_transmissions;
185 u32 tx_single_retry_frames;
186 u32 tx_multiple_retry_frames;
187 u32 tx_retry_limit_exceeded;
188 u32 tx_discards;
189 u32 rx_unicast_frames;
190 u32 rx_multicast_frames;
191 u32 rx_fragments;
192 u32 rx_unicast_octets;
193 u32 rx_multicast_octets;
194 u32 rx_fcs_errors;
195 u32 rx_discards_no_buffer;
196 u32 tx_discards_wrong_sa;
197 u32 rx_discards_wep_undecryptable;
198 u32 rx_message_in_msg_fragments;
199 u32 rx_message_in_bad_msg_fragments;
200} __attribute__ ((packed));
201
202struct hfa384x_scan_result_hdr {
203 u16 reserved;
204 u16 scan_reason;
205#define HFA384X_SCAN_IN_PROGRESS 0 /* no results available yet */
206#define HFA384X_SCAN_HOST_INITIATED 1
207#define HFA384X_SCAN_FIRMWARE_INITIATED 2
208#define HFA384X_SCAN_INQUIRY_FROM_HOST 3
209} __attribute__ ((packed));
210
211#define HFA384X_SCAN_MAX_RESULTS 32
212
213struct hfa384x_scan_result {
214 u16 chid;
215 u16 anl;
216 u16 sl;
217 u8 bssid[6];
218 u16 beacon_interval;
219 u16 capability;
220 u16 ssid_len;
221 u8 ssid[32];
222 u8 sup_rates[10];
223 u16 rate;
224} __attribute__ ((packed));
225
226struct hfa384x_hostscan_result {
227 u16 chid;
228 u16 anl;
229 u16 sl;
230 u8 bssid[6];
231 u16 beacon_interval;
232 u16 capability;
233 u16 ssid_len;
234 u8 ssid[32];
235 u8 sup_rates[10];
236 u16 rate;
237 u16 atim;
238} __attribute__ ((packed));
239
240struct comm_tallies_sums {
241 unsigned int tx_unicast_frames;
242 unsigned int tx_multicast_frames;
243 unsigned int tx_fragments;
244 unsigned int tx_unicast_octets;
245 unsigned int tx_multicast_octets;
246 unsigned int tx_deferred_transmissions;
247 unsigned int tx_single_retry_frames;
248 unsigned int tx_multiple_retry_frames;
249 unsigned int tx_retry_limit_exceeded;
250 unsigned int tx_discards;
251 unsigned int rx_unicast_frames;
252 unsigned int rx_multicast_frames;
253 unsigned int rx_fragments;
254 unsigned int rx_unicast_octets;
255 unsigned int rx_multicast_octets;
256 unsigned int rx_fcs_errors;
257 unsigned int rx_discards_no_buffer;
258 unsigned int tx_discards_wrong_sa;
259 unsigned int rx_discards_wep_undecryptable;
260 unsigned int rx_message_in_msg_fragments;
261 unsigned int rx_message_in_bad_msg_fragments;
262};
263
264
265struct hfa384x_regs {
266 u16 cmd;
267 u16 evstat;
268 u16 offset0;
269 u16 offset1;
270 u16 swsupport0;
271};
272
273
274#if defined(PRISM2_PCCARD) || defined(PRISM2_PLX)
275/* I/O ports for HFA384X Controller access */
276#define HFA384X_CMD_OFF 0x00
277#define HFA384X_PARAM0_OFF 0x02
278#define HFA384X_PARAM1_OFF 0x04
279#define HFA384X_PARAM2_OFF 0x06
280#define HFA384X_STATUS_OFF 0x08
281#define HFA384X_RESP0_OFF 0x0A
282#define HFA384X_RESP1_OFF 0x0C
283#define HFA384X_RESP2_OFF 0x0E
284#define HFA384X_INFOFID_OFF 0x10
285#define HFA384X_CONTROL_OFF 0x14
286#define HFA384X_SELECT0_OFF 0x18
287#define HFA384X_SELECT1_OFF 0x1A
288#define HFA384X_OFFSET0_OFF 0x1C
289#define HFA384X_OFFSET1_OFF 0x1E
290#define HFA384X_RXFID_OFF 0x20
291#define HFA384X_ALLOCFID_OFF 0x22
292#define HFA384X_TXCOMPLFID_OFF 0x24
293#define HFA384X_SWSUPPORT0_OFF 0x28
294#define HFA384X_SWSUPPORT1_OFF 0x2A
295#define HFA384X_SWSUPPORT2_OFF 0x2C
296#define HFA384X_EVSTAT_OFF 0x30
297#define HFA384X_INTEN_OFF 0x32
298#define HFA384X_EVACK_OFF 0x34
299#define HFA384X_DATA0_OFF 0x36
300#define HFA384X_DATA1_OFF 0x38
301#define HFA384X_AUXPAGE_OFF 0x3A
302#define HFA384X_AUXOFFSET_OFF 0x3C
303#define HFA384X_AUXDATA_OFF 0x3E
304#endif /* PRISM2_PCCARD || PRISM2_PLX */
305
306#ifdef PRISM2_PCI
307/* Memory addresses for ISL3874 controller access */
308#define HFA384X_CMD_OFF 0x00
309#define HFA384X_PARAM0_OFF 0x04
310#define HFA384X_PARAM1_OFF 0x08
311#define HFA384X_PARAM2_OFF 0x0C
312#define HFA384X_STATUS_OFF 0x10
313#define HFA384X_RESP0_OFF 0x14
314#define HFA384X_RESP1_OFF 0x18
315#define HFA384X_RESP2_OFF 0x1C
316#define HFA384X_INFOFID_OFF 0x20
317#define HFA384X_CONTROL_OFF 0x28
318#define HFA384X_SELECT0_OFF 0x30
319#define HFA384X_SELECT1_OFF 0x34
320#define HFA384X_OFFSET0_OFF 0x38
321#define HFA384X_OFFSET1_OFF 0x3C
322#define HFA384X_RXFID_OFF 0x40
323#define HFA384X_ALLOCFID_OFF 0x44
324#define HFA384X_TXCOMPLFID_OFF 0x48
325#define HFA384X_PCICOR_OFF 0x4C
326#define HFA384X_SWSUPPORT0_OFF 0x50
327#define HFA384X_SWSUPPORT1_OFF 0x54
328#define HFA384X_SWSUPPORT2_OFF 0x58
329#define HFA384X_PCIHCR_OFF 0x5C
330#define HFA384X_EVSTAT_OFF 0x60
331#define HFA384X_INTEN_OFF 0x64
332#define HFA384X_EVACK_OFF 0x68
333#define HFA384X_DATA0_OFF 0x6C
334#define HFA384X_DATA1_OFF 0x70
335#define HFA384X_AUXPAGE_OFF 0x74
336#define HFA384X_AUXOFFSET_OFF 0x78
337#define HFA384X_AUXDATA_OFF 0x7C
338#define HFA384X_PCI_M0_ADDRH_OFF 0x80
339#define HFA384X_PCI_M0_ADDRL_OFF 0x84
340#define HFA384X_PCI_M0_LEN_OFF 0x88
341#define HFA384X_PCI_M0_CTL_OFF 0x8C
342#define HFA384X_PCI_STATUS_OFF 0x98
343#define HFA384X_PCI_M1_ADDRH_OFF 0xA0
344#define HFA384X_PCI_M1_ADDRL_OFF 0xA4
345#define HFA384X_PCI_M1_LEN_OFF 0xA8
346#define HFA384X_PCI_M1_CTL_OFF 0xAC
347
348/* PCI bus master control bits (these are undocumented; based on guessing and
349 * experimenting..) */
350#define HFA384X_PCI_CTL_FROM_BAP (BIT(5) | BIT(1) | BIT(0))
351#define HFA384X_PCI_CTL_TO_BAP (BIT(5) | BIT(0))
352
353#endif /* PRISM2_PCI */
354
355
356/* Command codes for CMD reg. */
357#define HFA384X_CMDCODE_INIT 0x00
358#define HFA384X_CMDCODE_ENABLE 0x01
359#define HFA384X_CMDCODE_DISABLE 0x02
360#define HFA384X_CMDCODE_ALLOC 0x0A
361#define HFA384X_CMDCODE_TRANSMIT 0x0B
362#define HFA384X_CMDCODE_INQUIRE 0x11
363#define HFA384X_CMDCODE_ACCESS 0x21
364#define HFA384X_CMDCODE_ACCESS_WRITE (0x21 | BIT(8))
365#define HFA384X_CMDCODE_DOWNLOAD 0x22
366#define HFA384X_CMDCODE_READMIF 0x30
367#define HFA384X_CMDCODE_WRITEMIF 0x31
368#define HFA384X_CMDCODE_TEST 0x38
369
370#define HFA384X_CMDCODE_MASK 0x3F
371
372/* Test mode operations */
373#define HFA384X_TEST_CHANGE_CHANNEL 0x08
374#define HFA384X_TEST_MONITOR 0x0B
375#define HFA384X_TEST_STOP 0x0F
376#define HFA384X_TEST_CFG_BITS 0x15
377#define HFA384X_TEST_CFG_BIT_ALC BIT(3)
378
379#define HFA384X_CMD_BUSY BIT(15)
380
381#define HFA384X_CMD_TX_RECLAIM BIT(8)
382
383#define HFA384X_OFFSET_ERR BIT(14)
384#define HFA384X_OFFSET_BUSY BIT(15)
385
386
387/* ProgMode for download command */
388#define HFA384X_PROGMODE_DISABLE 0
389#define HFA384X_PROGMODE_ENABLE_VOLATILE 1
390#define HFA384X_PROGMODE_ENABLE_NON_VOLATILE 2
391#define HFA384X_PROGMODE_PROGRAM_NON_VOLATILE 3
392
393#define HFA384X_AUX_MAGIC0 0xfe01
394#define HFA384X_AUX_MAGIC1 0xdc23
395#define HFA384X_AUX_MAGIC2 0xba45
396
397#define HFA384X_AUX_PORT_DISABLED 0
398#define HFA384X_AUX_PORT_DISABLE BIT(14)
399#define HFA384X_AUX_PORT_ENABLE BIT(15)
400#define HFA384X_AUX_PORT_ENABLED (BIT(14) | BIT(15))
401#define HFA384X_AUX_PORT_MASK (BIT(14) | BIT(15))
402
403#define PRISM2_PDA_SIZE 1024
404
405
406/* Events; EvStat, Interrupt mask (IntEn), and acknowledge bits (EvAck) */
407#define HFA384X_EV_TICK BIT(15)
408#define HFA384X_EV_WTERR BIT(14)
409#define HFA384X_EV_INFDROP BIT(13)
410#ifdef PRISM2_PCI
411#define HFA384X_EV_PCI_M1 BIT(9)
412#define HFA384X_EV_PCI_M0 BIT(8)
413#endif /* PRISM2_PCI */
414#define HFA384X_EV_INFO BIT(7)
415#define HFA384X_EV_DTIM BIT(5)
416#define HFA384X_EV_CMD BIT(4)
417#define HFA384X_EV_ALLOC BIT(3)
418#define HFA384X_EV_TXEXC BIT(2)
419#define HFA384X_EV_TX BIT(1)
420#define HFA384X_EV_RX BIT(0)
421
422
423/* HFA384X Information frames */
424#define HFA384X_INFO_HANDOVERADDR 0xF000 /* AP f/w ? */
425#define HFA384X_INFO_HANDOVERDEAUTHADDR 0xF001 /* AP f/w 1.3.7 */
426#define HFA384X_INFO_COMMTALLIES 0xF100
427#define HFA384X_INFO_SCANRESULTS 0xF101
428#define HFA384X_INFO_CHANNELINFORESULTS 0xF102 /* AP f/w only */
429#define HFA384X_INFO_HOSTSCANRESULTS 0xF103
430#define HFA384X_INFO_LINKSTATUS 0xF200
431#define HFA384X_INFO_ASSOCSTATUS 0xF201 /* ? */
432#define HFA384X_INFO_AUTHREQ 0xF202 /* ? */
433#define HFA384X_INFO_PSUSERCNT 0xF203 /* ? */
434#define HFA384X_INFO_KEYIDCHANGED 0xF204 /* ? */
435
436enum { HFA384X_LINKSTATUS_CONNECTED = 1,
437 HFA384X_LINKSTATUS_DISCONNECTED = 2,
438 HFA384X_LINKSTATUS_AP_CHANGE = 3,
439 HFA384X_LINKSTATUS_AP_OUT_OF_RANGE = 4,
440 HFA384X_LINKSTATUS_AP_IN_RANGE = 5,
441 HFA384X_LINKSTATUS_ASSOC_FAILED = 6 };
442
443enum { HFA384X_PORTTYPE_BSS = 1, HFA384X_PORTTYPE_WDS = 2,
444 HFA384X_PORTTYPE_PSEUDO_IBSS = 3, HFA384X_PORTTYPE_IBSS = 0,
445 HFA384X_PORTTYPE_HOSTAP = 6 };
446
447#define HFA384X_RATES_1MBPS BIT(0)
448#define HFA384X_RATES_2MBPS BIT(1)
449#define HFA384X_RATES_5MBPS BIT(2)
450#define HFA384X_RATES_11MBPS BIT(3)
451
452#define HFA384X_ROAMING_FIRMWARE 1
453#define HFA384X_ROAMING_HOST 2
454#define HFA384X_ROAMING_DISABLED 3
455
456#define HFA384X_WEPFLAGS_PRIVACYINVOKED BIT(0)
457#define HFA384X_WEPFLAGS_EXCLUDEUNENCRYPTED BIT(1)
458#define HFA384X_WEPFLAGS_HOSTENCRYPT BIT(4)
459#define HFA384X_WEPFLAGS_HOSTDECRYPT BIT(7)
460
461#define HFA384X_RX_STATUS_MSGTYPE (BIT(15) | BIT(14) | BIT(13))
462#define HFA384X_RX_STATUS_PCF BIT(12)
463#define HFA384X_RX_STATUS_MACPORT (BIT(10) | BIT(9) | BIT(8))
464#define HFA384X_RX_STATUS_UNDECR BIT(1)
465#define HFA384X_RX_STATUS_FCSERR BIT(0)
466
467#define HFA384X_RX_STATUS_GET_MSGTYPE(s) \
468(((s) & HFA384X_RX_STATUS_MSGTYPE) >> 13)
469#define HFA384X_RX_STATUS_GET_MACPORT(s) \
470(((s) & HFA384X_RX_STATUS_MACPORT) >> 8)
471
472enum { HFA384X_RX_MSGTYPE_NORMAL = 0, HFA384X_RX_MSGTYPE_RFC1042 = 1,
473 HFA384X_RX_MSGTYPE_BRIDGETUNNEL = 2, HFA384X_RX_MSGTYPE_MGMT = 4 };
474
475
476#define HFA384X_TX_CTRL_ALT_RTRY BIT(5)
477#define HFA384X_TX_CTRL_802_11 BIT(3)
478#define HFA384X_TX_CTRL_802_3 0
479#define HFA384X_TX_CTRL_TX_EX BIT(2)
480#define HFA384X_TX_CTRL_TX_OK BIT(1)
481
482#define HFA384X_TX_STATUS_RETRYERR BIT(0)
483#define HFA384X_TX_STATUS_AGEDERR BIT(1)
484#define HFA384X_TX_STATUS_DISCON BIT(2)
485#define HFA384X_TX_STATUS_FORMERR BIT(3)
486
487/* HFA3861/3863 (BBP) Control Registers */
488#define HFA386X_CR_TX_CONFIGURE 0x12 /* CR9 */
489#define HFA386X_CR_RX_CONFIGURE 0x14 /* CR10 */
490#define HFA386X_CR_A_D_TEST_MODES2 0x1A /* CR13 */
491#define HFA386X_CR_MANUAL_TX_POWER 0x3E /* CR31 */
492#define HFA386X_CR_MEASURED_TX_POWER 0x74 /* CR58 */
493
494
495#ifdef __KERNEL__
496
497#define PRISM2_TXFID_COUNT 8
498#define PRISM2_DATA_MAXLEN 2304
499#define PRISM2_TXFID_LEN (PRISM2_DATA_MAXLEN + sizeof(struct hfa384x_tx_frame))
500#define PRISM2_TXFID_EMPTY 0xffff
501#define PRISM2_TXFID_RESERVED 0xfffe
502#define PRISM2_DUMMY_FID 0xffff
503#define MAX_SSID_LEN 32
504#define MAX_NAME_LEN 32 /* this is assumed to be equal to MAX_SSID_LEN */
505
506#define PRISM2_DUMP_RX_HDR BIT(0)
507#define PRISM2_DUMP_TX_HDR BIT(1)
508#define PRISM2_DUMP_TXEXC_HDR BIT(2)
509
510struct hostap_tx_callback_info {
511 u16 idx;
512 void (*func)(struct sk_buff *, int ok, void *);
513 void *data;
514 struct hostap_tx_callback_info *next;
515};
516
517
518/* IEEE 802.11 requires that STA supports concurrent reception of at least
519 * three fragmented frames. This define can be increased to support more
520 * concurrent frames, but it should be noted that each entry can consume about
521 * 2 kB of RAM and increasing cache size will slow down frame reassembly. */
522#define PRISM2_FRAG_CACHE_LEN 4
523
524struct prism2_frag_entry {
525 unsigned long first_frag_time;
526 unsigned int seq;
527 unsigned int last_frag;
528 struct sk_buff *skb;
529 u8 src_addr[ETH_ALEN];
530 u8 dst_addr[ETH_ALEN];
531};
532
533
Jouni Malinenff1d2762005-05-12 22:54:16 -0400534struct hostap_cmd_queue {
535 struct list_head list;
536 wait_queue_head_t compl;
537 volatile enum { CMD_SLEEP, CMD_CALLBACK, CMD_COMPLETED } type;
Pavel Roskinb15eff22005-07-30 12:50:05 -0700538 void (*callback)(struct net_device *dev, long context, u16 resp0,
Jouni Malinenff1d2762005-05-12 22:54:16 -0400539 u16 res);
Pavel Roskinb15eff22005-07-30 12:50:05 -0700540 long context;
Jouni Malinenff1d2762005-05-12 22:54:16 -0400541 u16 cmd, param0, param1;
542 u16 resp0, res;
543 volatile int issued, issuing;
544
545 atomic_t usecnt;
546 int del_req;
547};
548
549/* options for hw_shutdown */
550#define HOSTAP_HW_NO_DISABLE BIT(0)
551#define HOSTAP_HW_ENABLE_CMDCOMPL BIT(1)
552
553typedef struct local_info local_info_t;
554
555struct prism2_helper_functions {
556 /* these functions are defined in hardware model specific files
557 * (hostap_{cs,plx,pci}.c */
558 int (*card_present)(local_info_t *local);
559 void (*cor_sreset)(local_info_t *local);
Jouni Malinenff1d2762005-05-12 22:54:16 -0400560 void (*genesis_reset)(local_info_t *local, int hcr);
561
562 /* the following functions are from hostap_hw.c, but they may have some
563 * hardware model specific code */
564
565 /* FIX: low-level commands like cmd might disappear at some point to
566 * make it easier to change them if needed (e.g., cmd would be replaced
567 * with write_mif/read_mif/testcmd/inquire); at least get_rid and
568 * set_rid might move to hostap_{cs,plx,pci}.c */
569 int (*cmd)(struct net_device *dev, u16 cmd, u16 param0, u16 *param1,
570 u16 *resp0);
571 void (*read_regs)(struct net_device *dev, struct hfa384x_regs *regs);
572 int (*get_rid)(struct net_device *dev, u16 rid, void *buf, int len,
573 int exact_len);
574 int (*set_rid)(struct net_device *dev, u16 rid, void *buf, int len);
575 int (*hw_enable)(struct net_device *dev, int initial);
576 int (*hw_config)(struct net_device *dev, int initial);
577 void (*hw_reset)(struct net_device *dev);
578 void (*hw_shutdown)(struct net_device *dev, int no_disable);
579 int (*reset_port)(struct net_device *dev);
580 void (*schedule_reset)(local_info_t *local);
581 int (*download)(local_info_t *local,
582 struct prism2_download_param *param);
583 int (*tx)(struct sk_buff *skb, struct net_device *dev);
584 int (*set_tim)(struct net_device *dev, int aid, int set);
585 int (*read_aux)(struct net_device *dev, unsigned addr, int len,
586 u8 *buf);
587
588 int need_tx_headroom; /* number of bytes of headroom needed before
589 * IEEE 802.11 header */
590 enum { HOSTAP_HW_PCCARD, HOSTAP_HW_PLX, HOSTAP_HW_PCI } hw_type;
591};
592
593
594struct prism2_download_data {
595 u32 dl_cmd;
596 u32 start_addr;
597 u32 num_areas;
598 struct prism2_download_data_area {
599 u32 addr; /* wlan card address */
600 u32 len;
601 u8 *data; /* allocated data */
602 } data[0];
603};
604
605
606#define HOSTAP_MAX_BSS_COUNT 64
607#define MAX_WPA_IE_LEN 64
608
609struct hostap_bss_info {
610 struct list_head list;
611 unsigned long last_update;
612 unsigned int count;
613 u8 bssid[ETH_ALEN];
614 u16 capab_info;
615 u8 ssid[32];
616 size_t ssid_len;
617 u8 wpa_ie[MAX_WPA_IE_LEN];
618 size_t wpa_ie_len;
619 u8 rsn_ie[MAX_WPA_IE_LEN];
620 size_t rsn_ie_len;
621 int chan;
622 int included;
623};
624
625
626/* Per radio private Host AP data - shared by all net devices interfaces used
627 * by each radio (wlan#, wlan#ap, wlan#sta, WDS).
628 * ((struct hostap_interface *) netdev_priv(dev))->local points to this
629 * structure. */
630struct local_info {
631 struct module *hw_module;
632 int card_idx;
633 int dev_enabled;
634 int master_dev_auto_open; /* was master device opened automatically */
635 int num_dev_open; /* number of open devices */
636 struct net_device *dev; /* master radio device */
637 struct net_device *ddev; /* main data device */
638 struct list_head hostap_interfaces; /* Host AP interface list (contains
639 * struct hostap_interface entries)
640 */
641 rwlock_t iface_lock; /* hostap_interfaces read lock; use write lock
642 * when removing entries from the list.
643 * TX and RX paths can use read lock. */
644 spinlock_t cmdlock, baplock, lock;
Matthias Kaehlcke36230602007-07-30 07:40:04 +0200645 struct mutex rid_bap_mtx;
Jouni Malinenff1d2762005-05-12 22:54:16 -0400646 u16 infofid; /* MAC buffer id for info frame */
647 /* txfid, intransmitfid, next_txtid, and next_alloc are protected by
648 * txfidlock */
649 spinlock_t txfidlock;
650 int txfid_len; /* length of allocated TX buffers */
651 u16 txfid[PRISM2_TXFID_COUNT]; /* buffer IDs for TX frames */
652 /* buffer IDs for intransmit frames or PRISM2_TXFID_EMPTY if
653 * corresponding txfid is free for next TX frame */
654 u16 intransmitfid[PRISM2_TXFID_COUNT];
655 int next_txfid; /* index to the next txfid to be checked for
656 * availability */
657 int next_alloc; /* index to the next intransmitfid to be checked for
658 * allocation events */
659
660 /* bitfield for atomic bitops */
661#define HOSTAP_BITS_TRANSMIT 0
662#define HOSTAP_BITS_BAP_TASKLET 1
663#define HOSTAP_BITS_BAP_TASKLET2 2
Al Viro64b33612007-10-14 19:35:20 +0100664 unsigned long bits;
Jouni Malinenff1d2762005-05-12 22:54:16 -0400665
666 struct ap_data *ap;
667
668 char essid[MAX_SSID_LEN + 1];
669 char name[MAX_NAME_LEN + 1];
670 int name_set;
Jouni Malinen72ca9c62005-07-30 12:50:01 -0700671 u16 channel_mask; /* mask of allowed channels */
672 u16 scan_channel_mask; /* mask of channels to be scanned */
Jouni Malinenff1d2762005-05-12 22:54:16 -0400673 struct comm_tallies_sums comm_tallies;
674 struct net_device_stats stats;
675 struct proc_dir_entry *proc;
676 int iw_mode; /* operating mode (IW_MODE_*) */
677 int pseudo_adhoc; /* 0: IW_MODE_ADHOC is real 802.11 compliant IBSS
678 * 1: IW_MODE_ADHOC is "pseudo IBSS" */
679 char bssid[ETH_ALEN];
680 int channel;
681 int beacon_int;
682 int dtim_period;
683 int mtu;
684 int frame_dump; /* dump RX/TX frame headers, PRISM2_DUMP_ flags */
685 int fw_tx_rate_control;
686 u16 tx_rate_control;
687 u16 basic_rates;
688 int hw_resetting;
689 int hw_ready;
690 int hw_reset_tries; /* how many times reset has been tried */
691 int hw_downloading;
692 int shutdown;
693 int pri_only;
694 int no_pri; /* no PRI f/w present */
695 int sram_type; /* 8 = x8 SRAM, 16 = x16 SRAM, -1 = unknown */
696
697 enum {
698 PRISM2_TXPOWER_AUTO = 0, PRISM2_TXPOWER_OFF,
699 PRISM2_TXPOWER_FIXED, PRISM2_TXPOWER_UNKNOWN
700 } txpower_type;
701 int txpower; /* if txpower_type == PRISM2_TXPOWER_FIXED */
702
703 /* command queue for hfa384x_cmd(); protected with cmdlock */
704 struct list_head cmd_queue;
705 /* max_len for cmd_queue; in addition, cmd_callback can use two
706 * additional entries to prevent sleeping commands from stopping
707 * transmits */
708#define HOSTAP_CMD_QUEUE_MAX_LEN 16
709 int cmd_queue_len; /* number of entries in cmd_queue */
710
711 /* if card timeout is detected in interrupt context, reset_queue is
712 * used to schedule card reseting to be done in user context */
713 struct work_struct reset_queue;
714
715 /* For scheduling a change of the promiscuous mode RID */
716 int is_promisc;
717 struct work_struct set_multicast_list_queue;
718
719 struct work_struct set_tim_queue;
720 struct list_head set_tim_list;
721 spinlock_t set_tim_lock;
722
723 int wds_max_connections;
724 int wds_connections;
725#define HOSTAP_WDS_BROADCAST_RA BIT(0)
726#define HOSTAP_WDS_AP_CLIENT BIT(1)
727#define HOSTAP_WDS_STANDARD_FRAME BIT(2)
728 u32 wds_type;
729 u16 tx_control; /* flags to be used in TX description */
730 int manual_retry_count; /* -1 = use f/w default; otherwise retry count
731 * to be used with all frames */
732
733 struct iw_statistics wstats;
734 unsigned long scan_timestamp; /* Time started to scan */
735 enum {
736 PRISM2_MONITOR_80211 = 0, PRISM2_MONITOR_PRISM = 1,
737 PRISM2_MONITOR_CAPHDR = 2
738 } monitor_type;
Jouni Malinenff1d2762005-05-12 22:54:16 -0400739 int monitor_allow_fcserr;
740
741 int hostapd; /* whether user space daemon, hostapd, is used for AP
742 * management */
743 int hostapd_sta; /* whether hostapd is used with an extra STA interface
744 */
745 struct net_device *apdev;
746 struct net_device_stats apdevstats;
747
748 char assoc_ap_addr[ETH_ALEN];
749 struct net_device *stadev;
750 struct net_device_stats stadevstats;
751
752#define WEP_KEYS 4
753#define WEP_KEY_LEN 13
Jouni Malinen62fe7e32005-07-30 20:43:20 -0700754 struct ieee80211_crypt_data *crypt[WEP_KEYS];
Jouni Malinenff1d2762005-05-12 22:54:16 -0400755 int tx_keyidx; /* default TX key index (crypt[tx_keyidx]) */
756 struct timer_list crypt_deinit_timer;
757 struct list_head crypt_deinit_list;
758
759 int open_wep; /* allow unencrypted frames */
760 int host_encrypt;
761 int host_decrypt;
762 int privacy_invoked; /* force privacy invoked flag even if no keys are
763 * configured */
764 int fw_encrypt_ok; /* whether firmware-based WEP encrypt is working
765 * in Host AP mode (STA f/w 1.4.9 or newer) */
766 int bcrx_sta_key; /* use individual keys to override default keys even
767 * with RX of broad/multicast frames */
768
769 struct prism2_frag_entry frag_cache[PRISM2_FRAG_CACHE_LEN];
770 unsigned int frag_next_idx;
771
772 int ieee_802_1x; /* is IEEE 802.1X used */
773
774 int antsel_tx, antsel_rx;
775 int rts_threshold; /* dot11RTSThreshold */
776 int fragm_threshold; /* dot11FragmentationThreshold */
777 int auth_algs; /* PRISM2_AUTH_ flags */
778
779 int enh_sec; /* cnfEnhSecurity options (broadcast SSID hide/ignore) */
780 int tallies32; /* 32-bit tallies in use */
781
782 struct prism2_helper_functions *func;
783
Jouni Malinenff1d2762005-05-12 22:54:16 -0400784 u8 *pda;
785 int fw_ap;
786#define PRISM2_FW_VER(major, minor, variant) \
787(((major) << 16) | ((minor) << 8) | variant)
788 u32 sta_fw_ver;
789
790 /* Tasklets for handling hardware IRQ related operations outside hw IRQ
791 * handler */
792 struct tasklet_struct bap_tasklet;
793
794 struct tasklet_struct info_tasklet;
795 struct sk_buff_head info_list; /* info frames as skb's for
796 * info_tasklet */
797
798 struct hostap_tx_callback_info *tx_callback; /* registered TX callbacks
799 */
800
801 struct tasklet_struct rx_tasklet;
802 struct sk_buff_head rx_list;
803
804 struct tasklet_struct sta_tx_exc_tasklet;
805 struct sk_buff_head sta_tx_exc_list;
806
807 int host_roaming;
808 unsigned long last_join_time; /* time of last JoinRequest */
Jouni Malinen2e4fd062005-07-30 12:50:02 -0700809 struct hfa384x_hostscan_result *last_scan_results;
Jouni Malinenff1d2762005-05-12 22:54:16 -0400810 int last_scan_results_count;
Jouni Malinenff1d2762005-05-12 22:54:16 -0400811 enum { PRISM2_SCAN, PRISM2_HOSTSCAN } last_scan_type;
812 struct work_struct info_queue;
813 long pending_info; /* bit field of pending info_queue items */
814#define PRISM2_INFO_PENDING_LINKSTATUS 0
815#define PRISM2_INFO_PENDING_SCANRESULTS 1
816 int prev_link_status; /* previous received LinkStatus info */
817 int prev_linkstatus_connected;
818 u8 preferred_ap[6]; /* use this AP if possible */
819
820#ifdef PRISM2_CALLBACK
821 void *callback_data; /* Can be used in callbacks; e.g., allocate
822 * on enable event and free on disable event.
823 * Host AP driver code does not touch this. */
824#endif /* PRISM2_CALLBACK */
825
826 wait_queue_head_t hostscan_wq;
827
828 /* Passive scan in Host AP mode */
829 struct timer_list passive_scan_timer;
830 int passive_scan_interval; /* in seconds, 0 = disabled */
831 int passive_scan_channel;
832 enum { PASSIVE_SCAN_WAIT, PASSIVE_SCAN_LISTEN } passive_scan_state;
833
834 struct timer_list tick_timer;
835 unsigned long last_tick_timer;
836 unsigned int sw_tick_stuck;
837
838 /* commsQuality / dBmCommsQuality data from periodic polling; only
839 * valid for Managed and Ad-hoc modes */
840 unsigned long last_comms_qual_update;
841 int comms_qual; /* in some odd unit.. */
842 int avg_signal; /* in dB (note: negative) */
843 int avg_noise; /* in dB (note: negative) */
844 struct work_struct comms_qual_update;
845
846 /* RSSI to dBm adjustment (for RX descriptor fields) */
847 int rssi_to_dBm; /* substract from RSSI to get approximate dBm value */
848
849 /* BSS list / protected by local->lock */
850 struct list_head bss_list;
851 int num_bss_info;
852 int wpa; /* WPA support enabled */
853 int tkip_countermeasures;
854 int drop_unencrypted;
855 /* Generic IEEE 802.11 info element to be added to
856 * ProbeResp/Beacon/(Re)AssocReq */
857 u8 *generic_elem;
858 size_t generic_elem_len;
859
860#ifdef PRISM2_DOWNLOAD_SUPPORT
861 /* Persistent volatile download data */
862 struct prism2_download_data *dl_pri;
863 struct prism2_download_data *dl_sec;
864#endif /* PRISM2_DOWNLOAD_SUPPORT */
865
866#ifdef PRISM2_IO_DEBUG
867#define PRISM2_IO_DEBUG_SIZE 10000
868 u32 io_debug[PRISM2_IO_DEBUG_SIZE];
869 int io_debug_head;
870 int io_debug_enabled;
871#endif /* PRISM2_IO_DEBUG */
872
Jouni Malinen67e0e472005-08-14 19:08:41 -0700873 /* Pointer to hardware model specific (cs,pci,plx) private data. */
874 void *hw_priv;
Jouni Malinenff1d2762005-05-12 22:54:16 -0400875};
876
877
878/* Per interface private Host AP data
879 * Allocated for each net device that Host AP uses (wlan#, wlan#ap, wlan#sta,
880 * WDS) and netdev_priv(dev) points to this structure. */
881struct hostap_interface {
882 struct list_head list; /* list entry in Host AP interface list */
883 struct net_device *dev; /* pointer to this device */
884 struct local_info *local; /* pointer to shared private data */
885 struct net_device_stats stats;
886 struct iw_spy_data spy_data; /* iwspy support */
887 struct iw_public_data wireless_data;
888
889 enum {
890 HOSTAP_INTERFACE_MASTER,
891 HOSTAP_INTERFACE_MAIN,
892 HOSTAP_INTERFACE_AP,
893 HOSTAP_INTERFACE_STA,
894 HOSTAP_INTERFACE_WDS,
895 } type;
896
897 union {
898 struct hostap_interface_wds {
899 u8 remote_addr[ETH_ALEN];
900 } wds;
901 } u;
902};
903
904
905#define HOSTAP_SKB_TX_DATA_MAGIC 0xf08a36a2
906
Jouni Malinen5bee7202005-08-14 19:08:39 -0700907/*
908 * TX meta data - stored in skb->cb buffer, so this must not be increased over
909 * the 40-byte limit
910 */
Jouni Malinenff1d2762005-05-12 22:54:16 -0400911struct hostap_skb_tx_data {
Jouni Malinen5bee7202005-08-14 19:08:39 -0700912 u32 magic; /* HOSTAP_SKB_TX_DATA_MAGIC */
913 u8 rate; /* transmit rate */
914#define HOSTAP_TX_FLAGS_WDS BIT(0)
915#define HOSTAP_TX_FLAGS_BUFFERED_FRAME BIT(1)
916#define HOSTAP_TX_FLAGS_ADD_MOREDATA BIT(2)
917 u8 flags; /* HOSTAP_TX_FLAGS_* */
918 u16 tx_cb_idx;
Jouni Malinenff1d2762005-05-12 22:54:16 -0400919 struct hostap_interface *iface;
920 unsigned long jiffies; /* queueing timestamp */
Jouni Malinenff1d2762005-05-12 22:54:16 -0400921 unsigned short ethertype;
Jouni Malinenff1d2762005-05-12 22:54:16 -0400922};
923
924
925#ifndef PRISM2_NO_DEBUG
926
927#define DEBUG_FID BIT(0)
928#define DEBUG_PS BIT(1)
929#define DEBUG_FLOW BIT(2)
930#define DEBUG_AP BIT(3)
931#define DEBUG_HW BIT(4)
932#define DEBUG_EXTRA BIT(5)
933#define DEBUG_EXTRA2 BIT(6)
934#define DEBUG_PS2 BIT(7)
935#define DEBUG_MASK (DEBUG_PS | DEBUG_AP | DEBUG_HW | DEBUG_EXTRA)
936#define PDEBUG(n, args...) \
937do { if ((n) & DEBUG_MASK) printk(KERN_DEBUG args); } while (0)
938#define PDEBUG2(n, args...) \
939do { if ((n) & DEBUG_MASK) printk(args); } while (0)
940
941#else /* PRISM2_NO_DEBUG */
942
943#define PDEBUG(n, args...)
944#define PDEBUG2(n, args...)
945
946#endif /* PRISM2_NO_DEBUG */
947
948enum { BAP0 = 0, BAP1 = 1 };
949
950#define PRISM2_IO_DEBUG_CMD_INB 0
951#define PRISM2_IO_DEBUG_CMD_INW 1
952#define PRISM2_IO_DEBUG_CMD_INSW 2
953#define PRISM2_IO_DEBUG_CMD_OUTB 3
954#define PRISM2_IO_DEBUG_CMD_OUTW 4
955#define PRISM2_IO_DEBUG_CMD_OUTSW 5
956#define PRISM2_IO_DEBUG_CMD_ERROR 6
957#define PRISM2_IO_DEBUG_CMD_INTERRUPT 7
958
959#ifdef PRISM2_IO_DEBUG
960
961#define PRISM2_IO_DEBUG_ENTRY(cmd, reg, value) \
962(((cmd) << 24) | ((reg) << 16) | value)
963
964static inline void prism2_io_debug_add(struct net_device *dev, int cmd,
965 int reg, int value)
966{
967 struct hostap_interface *iface = netdev_priv(dev);
968 local_info_t *local = iface->local;
969
970 if (!local->io_debug_enabled)
971 return;
972
973 local->io_debug[local->io_debug_head] = jiffies & 0xffffffff;
974 if (++local->io_debug_head >= PRISM2_IO_DEBUG_SIZE)
975 local->io_debug_head = 0;
976 local->io_debug[local->io_debug_head] =
977 PRISM2_IO_DEBUG_ENTRY(cmd, reg, value);
978 if (++local->io_debug_head >= PRISM2_IO_DEBUG_SIZE)
979 local->io_debug_head = 0;
980}
981
982
983static inline void prism2_io_debug_error(struct net_device *dev, int err)
984{
985 struct hostap_interface *iface = netdev_priv(dev);
986 local_info_t *local = iface->local;
987 unsigned long flags;
988
989 if (!local->io_debug_enabled)
990 return;
991
992 spin_lock_irqsave(&local->lock, flags);
993 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_ERROR, 0, err);
994 if (local->io_debug_enabled == 1) {
995 local->io_debug_enabled = 0;
996 printk(KERN_DEBUG "%s: I/O debug stopped\n", dev->name);
997 }
998 spin_unlock_irqrestore(&local->lock, flags);
999}
1000
1001#else /* PRISM2_IO_DEBUG */
1002
1003static inline void prism2_io_debug_add(struct net_device *dev, int cmd,
1004 int reg, int value)
1005{
1006}
1007
1008static inline void prism2_io_debug_error(struct net_device *dev, int err)
1009{
1010}
1011
1012#endif /* PRISM2_IO_DEBUG */
1013
1014
1015#ifdef PRISM2_CALLBACK
1016enum {
1017 /* Called when card is enabled */
1018 PRISM2_CALLBACK_ENABLE,
1019
1020 /* Called when card is disabled */
1021 PRISM2_CALLBACK_DISABLE,
1022
1023 /* Called when RX/TX starts/ends */
1024 PRISM2_CALLBACK_RX_START, PRISM2_CALLBACK_RX_END,
1025 PRISM2_CALLBACK_TX_START, PRISM2_CALLBACK_TX_END
1026};
1027void prism2_callback(local_info_t *local, int event);
1028#else /* PRISM2_CALLBACK */
1029#define prism2_callback(d, e) do { } while (0)
1030#endif /* PRISM2_CALLBACK */
1031
1032#endif /* __KERNEL__ */
1033
1034#endif /* HOSTAP_WLAN_H */